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+ +/* Rx offloads which cannot be disabled */ +static uint64_t dev_rx_offloads_nodis = + DEV_RX_OFFLOAD_IPV4_CKSUM | + DEV_RX_OFFLOAD_UDP_CKSUM | + DEV_RX_OFFLOAD_TCP_CKSUM | + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_RX_OFFLOAD_CRC_STRIP | + DEV_RX_OFFLOAD_SCATTER; + +/* Supported Tx offloads */ +static uint64_t dev_tx_offloads_sup; + +/* Tx offloads which cannot be disabled */ +static uint64_t dev_tx_offloads_nodis = + DEV_TX_OFFLOAD_IPV4_CKSUM | + DEV_TX_OFFLOAD_UDP_CKSUM | + DEV_TX_OFFLOAD_TCP_CKSUM | + DEV_TX_OFFLOAD_SCTP_CKSUM | + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_TX_OFFLOAD_MULTI_SEGS | + DEV_TX_OFFLOAD_MT_LOCKFREE | + DEV_TX_OFFLOAD_MBUF_FAST_FREE; + /* Keep track of whether QMAN and BMAN have been globally initialized */ static int is_global_init; /* At present we only allow up to 4 push mode queues - as each of this queue @@ -143,35 +170,41 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev) { struct dpaa_if *dpaa_intf = dev->data->dev_private; struct rte_eth_conf *eth_conf = &dev->data->dev_conf; - struct rte_eth_dev_info dev_info; uint64_t rx_offloads = eth_conf->rxmode.offloads; uint64_t tx_offloads = eth_conf->txmode.offloads; PMD_INIT_FUNC_TRACE(); - dpaa_eth_dev_info(dev, &dev_info); - if (((~(dev_info.rx_offload_capa) & rx_offloads) != 0)) { - DPAA_PMD_ERR("Some Rx offloads are not supported " - "requested 0x%" PRIx64 " supported 0x%" PRIx64, - rx_offloads, dev_info.rx_offload_capa); - return -ENOTSUP; + /* Rx offloads validation */ + if (dev_rx_offloads_nodis & ~rx_offloads) { + DPAA_PMD_WARN( + "Rx offloads non configurable - requested 0x%" PRIx64 + " ignored 0x%" PRIx64, + rx_offloads, dev_rx_offloads_nodis); } - - if (((~(dev_info.tx_offload_capa) & tx_offloads) != 0)) { - DPAA_PMD_ERR("Some Tx offloads are not supported " - "requested 0x%" PRIx64 " supported 0x%" PRIx64, - tx_offloads, dev_info.tx_offload_capa); + if (~(dev_rx_offloads_sup | dev_rx_offloads_nodis) & rx_offloads) { + DPAA_PMD_ERR( + "Rx offloads non supported - requested 0x%" PRIx64 + " supported 0x%" PRIx64, + rx_offloads, + dev_rx_offloads_sup | dev_rx_offloads_nodis); return -ENOTSUP; } - if (((rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM) == 0) || - ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) == 0) || - ((rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) == 0) || - ((tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) == 0) || - ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) == 0) || - ((tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) == 0)) { - DPAA_PMD_ERR(" Cksum offloading is enabled by default " - " Cannot be disabled. So ignoring this configuration "); + /* Tx offloads validation */ + if (dev_tx_offloads_nodis & ~tx_offloads) { + DPAA_PMD_WARN( + "Tx offloads non configurable - requested 0x%" PRIx64 + " ignored 0x%" PRIx64, + tx_offloads, dev_tx_offloads_nodis); + } + if (~(dev_tx_offloads_sup | dev_tx_offloads_nodis) & tx_offloads) { + DPAA_PMD_ERR( + "Tx offloads non supported - requested 0x%" PRIx64 + " supported 0x%" PRIx64, + tx_offloads, + dev_tx_offloads_sup | dev_tx_offloads_nodis); + return -ENOTSUP; } if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { @@ -290,18 +323,10 @@ static void dpaa_eth_dev_info(struct rte_eth_dev *dev, dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; dev_info->speed_capa = (ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G); - dev_info->rx_offload_capa = - (DEV_RX_OFFLOAD_IPV4_CKSUM | - DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM) | - DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_SCATTER; - dev_info->tx_offload_capa = - (DEV_TX_OFFLOAD_IPV4_CKSUM | - DEV_TX_OFFLOAD_UDP_CKSUM | - DEV_TX_OFFLOAD_TCP_CKSUM) | - DEV_TX_OFFLOAD_MBUF_FAST_FREE | - DEV_TX_OFFLOAD_MULTI_SEGS; + dev_info->rx_offload_capa = dev_rx_offloads_sup | + dev_rx_offloads_nodis; + dev_info->tx_offload_capa = dev_tx_offloads_sup | + dev_tx_offloads_nodis; } static int dpaa_eth_link_update(struct rte_eth_dev *dev, From patchwork Tue Apr 24 15:06:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 134110 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp2352767lji; Tue, 24 Apr 2018 08:09:06 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+Y6banMJUlFJOs6xODtQ9YzBagEAx71UhMLQ2nqgcBMVt3r63hwezBcRcDkrng/qf9wlfy X-Received: by 2002:adf:b595:: with SMTP id c21-v6mr21237448wre.233.1524582546633; Tue, 24 Apr 2018 08:09:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524582546; cv=none; d=google.com; s=arc-20160816; b=Ag5DUspeaVNu0CbXm27riiF71bhCrQqwXDX2xsJ5VZeqHB+qCBpopZ+KpZKGF/4YbF E/fjS0GvlZ5w8QbXzDu6Om13Fr2uQW1FW787glx2qKKzs1mUHtUQ8MBCPDaxGIpuFkNy rClxqsfhPyPzAqoU4KPACFUT3BqqfouIJbpwl0+ZMYUit1dzTYthz6S5GFgFoUqVMMJs sztHnNPOYUvchW9kf5dUoWFObSlOxLtL+/CWD0+Dti0Hqb+LeABXUtzhvSYymY2xuVBg 74VXjTpbT05OCvEi3XjIOmxIXfB25H86y9W0wJ37z7AJEcNijOQWOeNww9VNf2wiJXiG 88DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:spamdiagnosticmetadata :spamdiagnosticoutput:mime-version:references:in-reply-to:message-id :date:cc:to:from:dkim-signature:arc-authentication-results; bh=Fvx5l7SHly/2B0anC45Ova2NIYdCj9fnV+zVFiuvdk4=; b=Q62xzl+yYI90QdXmRAWiSzgw0OEfxqI4dmSKilCx8HmYCaiOcNC0GXcwcJR2Vq9PA4 kpC+hjwLdRRgq8WZZG/maHjC8QSyQMB+QkhlGeA11TExI/wIwd2rdmvYnFUF8HFEo2eQ mlMxQCwuERWoaOhEDmclFgeqDcHTUGuYO7WU3Vvgy0f+OieojMNUqVxmFWkR9GlIpree zO+fOyYqHYGFUHZ8Yi9AuI1Q4t461/RqF0hPlc+Lw3cnR7yzybhdY4eHVKWxPstOIkEQ oCpZIzhhqzT0VSNz/2QpR/OFsb6WrIFA31M8JSKPMyc7VqlSiogu7hXkQVwLB7Y7rM1N l8sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@nxp.com header.s=selector1 header.b=W9grKupS; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. 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+ +/* Rx offloads which cannot be disabled */ +static uint64_t dev_rx_offloads_nodis = + DEV_RX_OFFLOAD_CRC_STRIP | + DEV_RX_OFFLOAD_SCATTER; + +/* Supported Tx offloads */ +static uint64_t dev_tx_offloads_sup = + DEV_TX_OFFLOAD_VLAN_INSERT | + DEV_TX_OFFLOAD_IPV4_CKSUM | + DEV_TX_OFFLOAD_UDP_CKSUM | + DEV_TX_OFFLOAD_TCP_CKSUM | + DEV_TX_OFFLOAD_SCTP_CKSUM | + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; + +/* Tx offloads which cannot be disabled */ +static uint64_t dev_tx_offloads_nodis = + DEV_TX_OFFLOAD_MULTI_SEGS | + DEV_TX_OFFLOAD_MT_LOCKFREE | + DEV_TX_OFFLOAD_MBUF_FAST_FREE; + struct rte_dpaa2_xstats_name_off { char name[RTE_ETH_XSTATS_NAME_SIZE]; uint8_t page_id; /* dpni statistics page id */ @@ -170,24 +200,10 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; - dev_info->rx_offload_capa = - DEV_RX_OFFLOAD_IPV4_CKSUM | - DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM | - DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_VLAN_STRIP | - DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_SCATTER; - dev_info->tx_offload_capa = - DEV_TX_OFFLOAD_IPV4_CKSUM | - DEV_TX_OFFLOAD_UDP_CKSUM | - DEV_TX_OFFLOAD_TCP_CKSUM | - DEV_TX_OFFLOAD_SCTP_CKSUM | - DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_TX_OFFLOAD_VLAN_INSERT | - DEV_TX_OFFLOAD_MBUF_FAST_FREE | - DEV_TX_OFFLOAD_MULTI_SEGS; + dev_info->rx_offload_capa = dev_rx_offloads_sup | + dev_rx_offloads_nodis; + dev_info->tx_offload_capa = dev_tx_offloads_sup | + dev_tx_offloads_nodis; dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G | ETH_LINK_SPEED_10G; @@ -277,7 +293,6 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev) struct dpaa2_dev_priv *priv = dev->data->dev_private; struct fsl_mc_io *dpni = priv->hw; struct rte_eth_conf *eth_conf = &dev->data->dev_conf; - struct rte_eth_dev_info dev_info; uint64_t rx_offloads = eth_conf->rxmode.offloads; uint64_t tx_offloads = eth_conf->txmode.offloads; int rx_l3_csum_offload = false; @@ -288,18 +303,35 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); - dpaa2_dev_info_get(dev, &dev_info); - if ((~(dev_info.rx_offload_capa) & rx_offloads) != 0) { - DPAA2_PMD_ERR("Some Rx offloads are not supported " - "requested 0x%" PRIx64 " supported 0x%" PRIx64, - rx_offloads, dev_info.rx_offload_capa); + /* Rx offloads validation */ + if (dev_rx_offloads_nodis & ~rx_offloads) { + DPAA2_PMD_WARN( + "Rx offloads non configurable - requested 0x%" PRIx64 + " ignored 0x%" PRIx64, + rx_offloads, dev_rx_offloads_nodis); + } + if (~(dev_rx_offloads_sup | dev_rx_offloads_nodis) & rx_offloads) { + DPAA2_PMD_ERR( + "Rx offloads non supported - requested 0x%" PRIx64 + " supported 0x%" PRIx64, + rx_offloads, + dev_rx_offloads_sup | dev_rx_offloads_nodis); return -ENOTSUP; } - if ((~(dev_info.tx_offload_capa) & tx_offloads) != 0) { - DPAA2_PMD_ERR("Some Tx offloads are not supported " - "requested 0x%" PRIx64 " supported 0x%" PRIx64, - tx_offloads, dev_info.tx_offload_capa); + /* Tx offloads validation */ + if (dev_tx_offloads_nodis & ~tx_offloads) { + DPAA2_PMD_WARN( + "Tx offloads non configurable - requested 0x%" PRIx64 + " ignored 0x%" PRIx64, + tx_offloads, dev_tx_offloads_nodis); + } + if (~(dev_tx_offloads_sup | dev_tx_offloads_nodis) & tx_offloads) { + DPAA2_PMD_ERR( + "Tx offloads non supported - requested 0x%" PRIx64 + " supported 0x%" PRIx64, + tx_offloads, + dev_tx_offloads_sup | dev_tx_offloads_nodis); return -ENOTSUP; }