From patchwork Wed Mar 10 15:59:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396750 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp499489jai; Wed, 10 Mar 2021 08:07:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJwmCVJcHTAw0FBJtemirnhQ8R88mrbyI0db924YjNk8FLuOdUhRPuXqQ4Pc5bIDUteR3jck X-Received: by 2002:a1f:7846:: with SMTP id t67mr1921967vkc.21.1615392476719; Wed, 10 Mar 2021 08:07:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392476; cv=none; d=google.com; s=arc-20160816; b=TJXNEEvTsQRJlM51sVcv3kyMbprgiTvifwakMCN3uRFvrbnex++OMKsNzY6n9rTo3R 2vjyUD3LcBARZIE145VMScRFNYiJPH7fvQDE+IyhyJAl2nwj3ci/fPXPUAn0Zi90SuxV g/jFS5WfGKfFXWP6wWGlXKmStTi5i+nlbfZHJB18vUeczNRj+k97INvBnU0I1ulASm6X ak3ZupBWIWcW4UoA9OVx2WGtyRYAaT8sI2VBXqdosn7uctkIqVFNOBipSXXT2K+HGvOb //S6Ca2YoyLxpRt+NgNt2CKPfUsUltoGxXXxRG+X7Hu+t6HMiXZiJ4sqJC+xY+ofgRpn O5Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=5ig15pshghu+eCUM7ti/ab+kHioEFzPWJ0umuCSDYnY=; b=yRs13yRED6vOCOLWsOubs8KAT5+NP+yKI0dtP92GcXOMGPajiHPPINlgdJDnsQAcnJ bBhF1YCGgV2VldRLoCIx0VnUllFoDpxOolp/L/smUCqvIrQL1zQ2Kli78CZTJcFs/jMw e18i5Z2xKhZmREX5KPKKrbrrsDY6gr/zt2cTYnVL+MPSbBvTt2YvFoa+XQXFPIBFZuSc wymgOgfftW+o+rtc+U28/poK4kL0LK9pBvP+pN/bSoSlD5l5+0CsVc6MJf24CuHfHHf+ /mQF92vqIdHVAgLQBZs+hVHtAIZZyMiBLnwCaDe26Roqa8jK6h5PkECkj3AzveK/JDV7 Gnsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ewjws9Ws; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id q2si3076324vsp.339.2021.03.10.08.07.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:07:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Ewjws9Ws; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34416 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1NM-0000st-18 for patch@linaro.org; Wed, 10 Mar 2021 11:07:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34510) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1Fv-0004RT-Hr for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:15 -0500 Received: from mail-ed1-x52f.google.com ([2a00:1450:4864:20::52f]:46875) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1Ft-0002aP-0j for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:15 -0500 Received: by mail-ed1-x52f.google.com with SMTP id w9so28708464edt.13 for ; Wed, 10 Mar 2021 08:00:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5ig15pshghu+eCUM7ti/ab+kHioEFzPWJ0umuCSDYnY=; b=Ewjws9Ws//3lm2s+YKf46mfREUkOBpMJDTnP6xByhPiZhy19Ncd76rUMqyKT8Iu8I6 9A7mgOiRVavYmH4XWvpSL4jtZ7jTNBLz/S2N/Zw7Y8K8Mh18ZRFSF0V5DzeANDfe/54l DHLruonnX20v0DfyCOuJk7DY5difRbkj61oZ2ZIRkkoiv9saQdIP1mzj3hPV2fuVY/HS mc0QjjWYQS+pF2oUA8H3+CV4QByxUggK5Tnm4/kMoWSEDSCeXFA6gxiYRbHaVl8PIhZB A9foUBG+fKes8CIYBc6MA7tEybaFHzRr8rKYw3NjdzleNMUIOXyxVhzKxSj5Pje9UZrx ONGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5ig15pshghu+eCUM7ti/ab+kHioEFzPWJ0umuCSDYnY=; b=BQskTICYQNe2dUyujqIWAEOtm9oyNFsHx7l1Lf6HdPL0jNyGVat3PfyZ/btfMm8QLM eLtEKjQB590o2FfM1KZyHcMTaCx1wvxcRDTmgwn7xSHNoRChlf/8/gh9QH4nS0D7xbfD FL5bV1sL/U1kflc+WI9ll+aVIFkub2jwu0NT+dE+s3E7T539moKUDPhdppUaqwonwbfL PoV7rjHDTL3XqdhDwweA5Wndt4TFhYSSgKOjuQ+lVNvvtxidflYwluRdOP3d2qjisrkt H8yPE9FuOvvBgePvA1kN3LGizAg5mXltpdlsf9GwVjj+pcv5TRtbtEaOTVL1PHc9Q7uo RM+w== X-Gm-Message-State: AOAM530VRp+K9jbSz0zuAEVHnjM4hSGwWkC6tDBHt6UlcAEh2S1lFf3O MQK0/v8HBqNQAtc2MDGhfE4aUg== X-Received: by 2002:a05:6402:375:: with SMTP id s21mr4060013edw.287.1615392006698; Wed, 10 Mar 2021 08:00:06 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id r17sm9185229edx.1.2021.03.10.08.00.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:03 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id A8FA61FF87; Wed, 10 Mar 2021 16:00:02 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 01/15] docs/system: add a gentle prompt for the complexity to come Date: Wed, 10 Mar 2021 15:59:48 +0000 Message-Id: <20210310160002.11659-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: John Snow , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, Stefan Hajnoczi Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We all know the QEMU command line can become a fiendishly complex beast. Lets gently prepare our user for the horrors to come by referencing where other example command lines can be found in the manual. Signed-off-by: Alex Bennée Reviewed-by: Stefan Hajnoczi Reviewed-by: John Snow Reviewed-by: Thomas Huth Message-Id: <20210305092328.31792-3-alex.bennee@linaro.org> -- 2.20.1 diff --git a/docs/system/quickstart.rst b/docs/system/quickstart.rst index 3a3acab5e7..681678c86e 100644 --- a/docs/system/quickstart.rst +++ b/docs/system/quickstart.rst @@ -11,3 +11,11 @@ Download and uncompress a PC hard disk image with Linux installed (e.g. |qemu_system| linux.img Linux should boot and give you a prompt. + +Users should be aware the above example elides a lot of the complexity +of setting up a VM with x86_64 specific defaults and assumes the +first non switch argument is a PC compatible disk image with a boot +sector. For a non-x86 system where we emulate a broad range of machine +types, the command lines are generally more explicit in defining the +machine and boot behaviour. You will find more example command lines +in the :ref:`system-targets-ref` section of the manual. diff --git a/docs/system/targets.rst b/docs/system/targets.rst index 75ed1087fd..9dcd95dd84 100644 --- a/docs/system/targets.rst +++ b/docs/system/targets.rst @@ -1,3 +1,5 @@ +.. _system-targets-ref: + QEMU System Emulator Targets ============================ From patchwork Wed Mar 10 15:59:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396747 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp493718jai; Wed, 10 Mar 2021 08:01:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJwBlvWkLBFttL2VVdzmbtcVUiqq7rTpikx94YUw8CtEqUD8SdwI4ztMh1DJITvPJWBbC93G X-Received: by 2002:a05:6102:b11:: with SMTP id b17mr2293188vst.43.1615392116831; Wed, 10 Mar 2021 08:01:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392116; cv=none; d=google.com; s=arc-20160816; b=j7v2gOc/T0O+nKU1HsBYQ9LzqMENV+0gnMeP9grqjyo4CU1QhzDTysgb8tSF8EgFme oMYEkEcePnX7UnSAt3HqWTl8JE7cRI4T9JNbbBZu9o7KltdnD+JbRPAw7Xq57Yi4N22F GHKL73dkXkMuuIrbWxzV7sVm++FN+zVZRjx+aUvQTLZwZd/a4fNt5t8gsMI8GEiSTjh7 2CHMU5ud/GqwbYM5mQtqZ1350iCwwD2noWBN1k3JEiiszfSwfI86Z4SHtVSKWrza5c2F qlYcQgiu5WztTw4otF0Cha6zWoHEqi+ROYJYIuSSD20H7qu9ZfqXraHuu3HkxNceK9RF 5TEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=8s+rghqoDmtXn+vNGYx+gVftGGy4eFdbii8sa4jsLZY=; b=aaFtr00zVgpBcZIbhfPmjXgZumETo60LzRiLxsqItqJNDowAp6uIqaL2P/NguPoXfP Ony7zabpgwG/N2nvxIHtcwBFKzivEdn23hhe07EJJ6PPI3dbqxNvjRC2a4ZoWws1yAoE ZtNzXVJs0XOx0GjI0S9T6CRWmyZvWi7F5gVNJHAIMBTp+PsGvFsRZUl0OtFqwcDromUD k1Z/gfR5S0pkqhx9l64UzlWP34T+yX8Jt47KFjtb1oxR6OlYlc0aZq1M6hovOzq0QNAe pR7YTyiseiFeL5bLJKJCj5XHUBo3FnAKyZZFxb5YpLzKBgn/OFqK5XgabAAvHUtfCUQL VVqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qCZkG5X5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r23si2777445vsk.75.2021.03.10.08.01.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:01:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qCZkG5X5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53442 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1HY-0004Uj-6O for patch@linaro.org; Wed, 10 Mar 2021 11:01:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34494) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1Fu-0004PI-8m for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:14 -0500 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]:38899) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1Fs-0002Zp-32 for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:14 -0500 Received: by mail-ed1-x536.google.com with SMTP id m9so28793279edd.5 for ; Wed, 10 Mar 2021 08:00:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8s+rghqoDmtXn+vNGYx+gVftGGy4eFdbii8sa4jsLZY=; b=qCZkG5X5nMnm+k7GMCdOQzYSm4Z7KIOlRE4BTcjHRE7nQyJqNq/cvWCaCElkjsA3mm RK+Yb+v4V2E/LoLBF8I3l/9BzDNOXMVm7gD0/M76ZPaAyTCigcAUOTRe0ZY8I/K+xZKZ 4fTTSai0038H8007j1zCJMxNmdzksOY5Xo1LMyetWG1bVORpS3LZFdwIDWMXCUSqHpm+ X5SOWV0L2RppC3xeG3j4j1Imc0Dh/5EdAnuNkGNCP0eJXRJQ1a7Gz48kyXkeT3K7I5zO i9udbBx/eQSYgBYyoWtCAVKIROxKPJekjmdNk5OO9lzzkeI+VPEgoHMPZ1qxIqRfnHYz lbAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8s+rghqoDmtXn+vNGYx+gVftGGy4eFdbii8sa4jsLZY=; b=dewYQhadNWhLQGWMGV0RbFeaTauaI9OpBvatQ+uVifPBMNFiGgRFX9YnCJ/m+tKnk9 fwzTDS/5zKZ4FZ90RIoCrQNoav3MTTvlfydYmTwnxRX+T4VNTLV3kkDov3o2i9wlJuFQ l8pa4z1CMsxU3pJhMIrDdUgXAtv3+1s+67zirlf5g1qbNPCf9XxlqxcLjURV5tAPnFnu cOyyCqhI31fZDL2Jvy8DXtUqkdujt0e4djfKHnf/F59ykYDitXQyinERQt1FiGRFjq00 nepl9zaeAX/FVs1i97aU2RBysSsVlZerC+hT6zlcm9l/1k3aOTLmX24N5DnziMY2B8bB v3Ag== X-Gm-Message-State: AOAM531pOH+ipG4kbF0A92RwbgLfGbgpI81+9xCZgJdKnBmA/rx5MyUH WrxuUlZ/gSJnNEjqWUTzQvGaAA== X-Received: by 2002:a05:6402:549:: with SMTP id i9mr4166540edx.379.1615392007574; Wed, 10 Mar 2021 08:00:07 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id k26sm10149388ejk.29.2021.03.10.08.00.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:03 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id BE1EF1FF8C; Wed, 10 Mar 2021 16:00:02 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 02/15] tests/docker: add a test-tcg for building then running check-tcg Date: Wed, 10 Mar 2021 15:59:49 +0000 Message-Id: <20210310160002.11659-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is mostly useful for verifying containers will work on the CI setup. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210305092328.31792-4-alex.bennee@linaro.org> -- 2.20.1 diff --git a/tests/docker/test-tcg b/tests/docker/test-tcg new file mode 100755 index 0000000000..00993b73ba --- /dev/null +++ b/tests/docker/test-tcg @@ -0,0 +1,22 @@ +#!/bin/bash -e +# +# Build and run the TCG tests +# +# Copyright (c) 2021 Linaro Ltd. +# +# Authors: +# Alex Bennée +# +# This work is licensed under the terms of the GNU GPL, version 2 +# or (at your option) any later version. See the COPYING file in +# the top-level directory. + +. common.rc + +cd "$BUILD_DIR" + +# although we are not building QEMU itself we still need a configured +# build for the unit tests to be built and run +TARGET_LIST=${TARGET_LIST:-$DEF_TARGET_LIST} \ +build_qemu +check_qemu check-tcg From patchwork Wed Mar 10 15:59:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396766 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp511875jai; Wed, 10 Mar 2021 08:23:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJxyGplu2z2EKF81CEac7ZglJ+TpUzOptAofvlJNRY7RIXogCDNWvaxfTGCXBXXiAzaSH+ZC X-Received: by 2002:a1f:9d12:: with SMTP id g18mr2040001vke.1.1615393407030; Wed, 10 Mar 2021 08:23:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615393407; cv=none; d=google.com; s=arc-20160816; b=hLHxmE95shximICugkJ8r/UdhVFQ13TWt+tcPEx/80GE7qhp6vwpBfxDEOxIcl77SK HwnN1+/58qCc1xwX03k7Fm8+uGCtkl6MM1jvRXmDEdDY/t0Q7OL+moz7fkwv0z+J8/OC jDGTdTGDPLTuoFSwnNESXxRbHsj0Un2quK4mFANCTlpKD7XUlcAIOeVefSBPQLLgS0f1 AZEJssR2jwZHEKXJwV9mjhzHsqWHEc78WE9BecD4nLzzHmjbNrNLoR8cCI2BDm2LqSEt 0ot3M20depFVvWvPZjHEP1AGfe+3i+v6yq2t6ahqJcZ9vA3x7hMQqYDaXv9XfRN2Bqey tR/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=HHpsRwO6vST0yf6ATL7Kbq1Uv+qWDZ8yZxsOzY/cYlI=; b=09Q94AToVcl5lhc44vBnBHnWdm67BEv+UWDZ7Qe/ARVL6EmRTU5zVM+uQiArtolfrN CL4YhQmfPY3PDgfa81+zmgcivjkjRid2bCgpsACYZX554FCyRy8Md/sSKMIKiyfxXRWN G5lAYlOKibaEP6BS7ywehqv8WqOafpNz3g2gDpqi/aIZDoo1cI76AC6ced/PTiTp3yWA Mfv4VsitwY7i9LijUMh6PSzSOZ+GcKJx8Bh2Nv1ZsuXXr0xdqG93VQuewB1t/wh60AYe E/2CXfb56ePOgbpHiSoBfOhbH14fXOs2gXN/I8OHavlTb8u6v2CVuMi0HAXzdb3uSlED RBVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OUtskioK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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If the variable is not defined, maintain the default given by make -j Currently, make parallelism at build time is based on the number of cpus available. This doesn't work well with LTO at linking, because with LTO the linker has to load in memory all the intermediate object files for optimization. The end result is that, if the gitlab runner happens to run two linking processes at the same time, the job will fail with an out-of-memory error, This patch leverages the ability to maintain high parallelism at compile time, but limit the number of linkers executed in parallel. Signed-off-by: Daniele Buono Signed-off-by: Alex Bennée Reviewed-by: Daniel P. Berrangé Message-Id: <20210304030948.9367-2-dbuono@linux.vnet.ibm.com> Message-Id: <20210305092328.31792-8-alex.bennee@linaro.org> -- 2.20.1 diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8b6d495288..814f51873f 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -27,6 +27,10 @@ include: else ../configure --enable-werror $CONFIGURE_ARGS ; fi || { cat config.log meson-logs/meson-log.txt && exit 1; } + - if test -n "$LD_JOBS"; + then + meson configure . -Dbackend_max_links="$LD_JOBS" ; + fi || exit 1; - make -j"$JOBS" - if test -n "$MAKE_CHECK_ARGS"; then From patchwork Wed Mar 10 15:59:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396752 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp501592jai; Wed, 10 Mar 2021 08:10:20 -0800 (PST) X-Google-Smtp-Source: ABdhPJwwKB+xpqgq/lQS+PGcU2kKIPUVvqZYsNK8y2/26JmX6oi0pVO1pG6UuN4UWyCICXVsm4Xs X-Received: by 2002:ab0:234f:: with SMTP id h15mr2367359uao.114.1615392620183; Wed, 10 Mar 2021 08:10:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392620; cv=none; d=google.com; s=arc-20160816; b=LIkM2IQf10ZycQTYynspr+3QybErXzRz4lMLTmwfQQC0vPgNqCh4EHW90y7co5o3FZ OfXp83nunp0y1ulAPTySgZ9c/bL29l1i9YdAW2aee31ehn5ltW3O/4Ilr50ylrvg/Wd4 FLusZtBvk59GxrGFBkqwTFDNVGotG/gtD3ObOZ/sfMKJrM3uP4I3tpxpgEocfHxGovOD V8fFCjFXdsxUoG2fNm5REKd9UQ5paOOLNTRaCVCvkAkVPTlEmfeTkg2XJ8YBy6gl2uRh IIU8EXtrYYvYKg2Gkt9WyNmda4zdz02JM0bTjtcVv8GJheg54Yt6UbsdncZXp7bpJjFt CRRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=BD2BGoLYoCF2ln1sjTH9tzIFeeIkbRtfrQqCp8IPVOg=; b=nBHzPWE3ZMuVUNnMiiToWt9lBbWvaydhfscM4ekUWx65MCI3NqcT3HBOkWXVmDWywp GyoOjbqJnefo9/QZRJDxSR6lKz4oiQOS0kOnEGR17JD0s/d1EZHrPiUHPB0FFHqbxp/A te7WwAtzszjXmWjG4ak48Q1Z8A29MAwx49NmHm1kHmJLlQdkHdylLbRL2GaRSGn7vgCN OtlRx7F7sNsg0mG1Smn7/zPDfp4zOBALcM7RodPiNobaqyoHD2sBtFYBk/hTig55trVh 07RTc9GZqQ4kBIh45TBH1o/jXJpEHTT6BHzxAkCxq599o7ZhrAXgf0xWKhEISUk8fQ1a wtQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=P15qt0l7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Add two sets of build/check/acceptance jobs to ensure the binary produced is working fine. The three sets allow testing of x86_64 binaries for x86_64, s390x, ppc64 and aarch64 targets [AJB: tweak job names to avoid brands] Signed-off-by: Daniele Buono Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210304030948.9367-3-dbuono@linux.vnet.ibm.com> Message-Id: <20210305092328.31792-9-alex.bennee@linaro.org> -- 2.20.1 diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 814f51873f..b23364bf3a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -483,6 +483,125 @@ clang-user: --extra-cflags=-fsanitize=undefined --extra-cflags=-fno-sanitize-recover=undefined MAKE_CHECK_ARGS: check-unit check-tcg +# Set LD_JOBS=1 because this requires LTO and ld consumes a large amount of memory. +# On gitlab runners, default value sometimes end up calling 2 lds concurrently and +# triggers an Out-Of-Memory error +# +# Since slirp callbacks are used in QEMU Timers, slirp needs to be compiled together +# with QEMU and linked as a static library to avoid false positives in CFI checks. +# This can be accomplished by using -enable-slirp=git, which avoids the use of +# a system-wide version of the library +# +# Split in three sets of build/check/acceptance to limit the execution time of each +# job +build-cfi-aarch64: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug + --enable-safe-stack --enable-slirp=git + TARGETS: aarch64-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-aarch64: + <<: *native_test_job_definition + needs: + - job: build-cfi-aarch64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-aarch64: + <<: *native_test_job_definition + needs: + - job: build-cfi-aarch64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + +build-cfi-ppc64-s390x: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug + --enable-safe-stack --enable-slirp=git + TARGETS: ppc64-softmmu s390x-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-ppc64-s390x: + <<: *native_test_job_definition + needs: + - job: build-cfi-ppc64-s390x + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-ppc64-s390x: + <<: *native_test_job_definition + needs: + - job: build-cfi-ppc64-s390x + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + +build-cfi-x86_64: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=clang --cxx=clang++ --enable-cfi --enable-cfi-debug + --enable-safe-stack --enable-slirp=git + TARGETS: x86_64-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-x86_64: + <<: *native_test_job_definition + needs: + - job: build-cfi-x86_64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-x86_64: + <<: *native_test_job_definition + needs: + - job: build-cfi-x86_64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + tsan-build: <<: *native_build_job_definition variables: From patchwork Wed Mar 10 15:59:52 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id g18si5918uam.20.2021.03.10.08.06.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:06:40 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=JR6F2Pas; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:58564 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1M7-0007C3-EX for patch@linaro.org; Wed, 10 Mar 2021 11:06:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34586) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G0-0004Z3-A5 for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:20 -0500 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]:38283) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1Fw-0002eC-Pl for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:20 -0500 Received: by mail-ej1-x62d.google.com with SMTP id mj10so39694647ejb.5 for ; Wed, 10 Mar 2021 08:00:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a0BK8ypBSXh0RbNv4uKgBtQr0GJ8Tge8/vqHvw7yHfo=; b=JR6F2PaswOUuR0oVd1vaMVYrDlKr0q1k1PUxQQ7HZU+v1DUSbk2QWrXcNvOCYDIrem J7U5gG+hL60bD+6dwocZvWRaRPoecfw12Zddo654QNIMp2fd+l3Gvb2HlLqTIBS0SqY/ wjDK7nmOY+uC+veGWSek62a8JllfdQUArdRXyAZgAAJ5rfdBhXQdRgt6vCD1c/MG+aK0 JDClYVBA8RYMR3YtggveOllLeSfNUYDrULXyh87711M26PYj6m/NGOjYeqzY2HFQEIGO VeDO/COWNkrSb+YVQzHGHrnUqq2crhWSe2Te53q1rlk8Tae1n1Psl1HdF0CNZVjt3+VW ugdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a0BK8ypBSXh0RbNv4uKgBtQr0GJ8Tge8/vqHvw7yHfo=; b=Sc+kIIw0ygxgSzdYLj/HVBLJk+gO5fyQy82gXZGQpOEdE7rpaTMizFcPnHUHse0Wrt Ti7phVXe5uNk6RjsHPIHvTGxO3w9fAglqjcbGwaF/HP8sh6KQAOkuPRobvVCx8GhxuA9 USgIu/lAz5wWmF302FXWfCRaM7b++2lFy7sKCijD+/Y8HXlXIUeag2qkiSYgdzdF+EZm vNluuSEjlbwYT0dox7OF09o2u0yj8KyjHku7jWUn21bJrKI/bqbqACDG8BiKR4i/npas cJOfcNi6uE7qt3qil1/IlZXdjY0S/9yCJj7zyEmrW4MYR+SXL44uWWdIhSG3xSw+Eedq 07tg== X-Gm-Message-State: AOAM530gTXPw09juf0Tcz5YMc9OsSDfG60+LdNdP2kzupSxUTC1keQ6X x/WW9aWRbBPdmBXWgg4GhgFWRnVmS8sn2w== X-Received: by 2002:a17:906:c0c8:: with SMTP id bn8mr4345764ejb.445.1615392012838; Wed, 10 Mar 2021 08:00:12 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id r17sm9185287edx.1.2021.03.10.08.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:09 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 0BFAC1FF91; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 05/15] tests/docker: Use --arch-only when building Debian cross image Date: Wed, 10 Mar 2021 15:59:52 +0000 Message-Id: <20210310160002.11659-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, Christian Ehrhardt , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé When building a Docker image based on debian10.docker on a non-x86 host, we get: [2/4] RUN apt update && DEBIAN_FRONTEND=noninteractive eatmydata apt build-dep -yy qemu Reading package lists... Done Building dependency tree Reading state information... Done Some packages could not be installed. This may mean that you have requested an impossible situation or if you are using the unstable distribution that some required packages have not yet been created or been moved out of Incoming. The following information may help to resolve the situation: The following packages have unmet dependencies: builddeps:qemu : Depends: gcc-s390x-linux-gnu but it is not installable Depends: gcc-alpha-linux-gnu but it is not installable E: Unable to correct problems, you have held broken packages. Fix by using the --arch-only option suggested here: https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1866032/comments/1 Suggested-by: Christian Ehrhardt Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Reviewed-by: Alex Bennée Message-Id: <20210223211115.2971565-1-f4bug@amsat.org> Message-Id: <20210305092328.31792-10-alex.bennee@linaro.org> -- 2.20.1 diff --git a/tests/docker/dockerfiles/debian10.docker b/tests/docker/dockerfiles/debian10.docker index 9d42b5a4b8..d034acbd25 100644 --- a/tests/docker/dockerfiles/debian10.docker +++ b/tests/docker/dockerfiles/debian10.docker @@ -32,6 +32,6 @@ RUN apt update && \ psmisc \ python3 \ python3-sphinx \ - $(apt-get -s build-dep qemu | egrep ^Inst | fgrep '[all]' | cut -d\ -f2) + $(apt-get -s build-dep --arch-only qemu | egrep ^Inst | fgrep '[all]' | cut -d\ -f2) ENV FEATURES docs From patchwork Wed Mar 10 15:59:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396763 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp504039jai; Wed, 10 Mar 2021 08:13:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJwXl0QjzabytcvdC09DHa3XyenK18q80nAISdx8Aiax5fRpmf2JOi2DPIbHeA8WEe2VrzTv X-Received: by 2002:a67:f8ce:: with SMTP id c14mr2190793vsp.25.1615392794561; Wed, 10 Mar 2021 08:13:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392794; cv=none; d=google.com; s=arc-20160816; b=kEmGumD7si5i+CqxdCSmg9CnmPOOa8wQWYdUHkZLQYBv9hZ6n9M3p+QiC0hbHbs0Ze pBtwFI6Q9G06Gq71jD+bH7bsFS65NgjZzYhQXM3Amu0yBxcUpH56LOtwzkQatOVdVi6d ldlPaSxq8CXLjDIpVQJUGUkvVPKnJxK4S8cxr5/uxRFETt10s13Z4lOH2irlmnMjVrOz 8XaPUW7Z7jbNvBKVBSg5Dxqgc1rmWgsfiB5mqiDe/Nl0SwliYxqOnX/fsrrkkbQ8GtRC 6yx6vLgfA+ZJQVqvSpzTEOBJJYEgNCsV1k8aoTK4+PrS8AMpyh6UOxR45u0WqBsIGvem NYaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1U/ORcIBWROYJWFUfscqlCNl6s4lUhCxpTPOOlyuiKA=; b=ECRPH7ptcESZ6TIW4DvRvnI8msfN1HnOM5OJLYM6gJsVJ7j+96+NVqVvbsYCUD7Vgh FUxV3u7DFQAsFZxbLYk92iRNEVTVug8XeXDrli9tknmYj0xi7lJ3MmB3ArxlT4raPm+s gxEB7GkwSQSIfua1IgW8s4vopUUg2iuBxVszsXaqLklLbdg+kAUxMy0u8wV90JfKhSEp R/DI49Tze5H/iE6apxWTeOX3uxbl993/cVkonrziIYkcgq1V77lILVJWJC+wb5Np4YKG c8XN/iDETPUlYgWyf2rcaQxsZaC9VhtKdDULceIvpZxihK0pGU1YFUowHulJS+ohDoXs LqZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G6iKuMJ4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t67si3106745vkc.47.2021.03.10.08.13.14 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:13:14 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=G6iKuMJ4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:51486 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1ST-0008MR-UX for patch@linaro.org; Wed, 10 Mar 2021 11:13:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34590) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G0-0004ZO-LU for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:20 -0500 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]:34203) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1Fx-0002fK-Ep for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:20 -0500 Received: by mail-ed1-x532.google.com with SMTP id b13so28860795edx.1 for ; Wed, 10 Mar 2021 08:00:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1U/ORcIBWROYJWFUfscqlCNl6s4lUhCxpTPOOlyuiKA=; b=G6iKuMJ4LfH3G4o/X7znHloQndR0ehEvO3lnmy15ekpuU3q27N9x4jHe4TngluDktf doczNoDtmoGa2DyF3rhhxGRj34n6LgR5yiQY+gaNc3AkUIS2lfLfrGy1veeUK1hP5RNu nMrIqlW3vq7hKE+ogVSzc5AVqc83CpLMeXozyQYwcGuNy4vJgGztG5fPUnGL0igeTtZc KP6wSYz7xF59NJJdPdXlzJ2ZQgPiWXglI+LsHV1wZxP7WVEMf/lzyY8A/dY67uVm176J fAE8uexPe7xFv+z///l99a8JX7D5kPcvJVDU2nSRvt+E5Ydl1F1kKNSLbFIRikwfMq/r 127A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1U/ORcIBWROYJWFUfscqlCNl6s4lUhCxpTPOOlyuiKA=; b=aSDSBtYkZ4Hwxw+OI7SeNF9CCMopPvsq8TGspXSHe6XjzCAg8ONhfqn8uvppv6Esbh nEHRP1ZTX6S8xkSNZIX0la/AWGlveYMe1ZGb8JFvugUyad6D6hkiBsebZWOwj6OqeBpi kAatXwrot2LDbG1UQ4J4c7XS0fcCiv+cu1JaiUz9o9r63YaMw+RM5EmJJxsiIIRwC21v AOhz4oeoo9XbiD1IxhUiAkemW2QQjk4EhSfjP4R/XmwL4Ae4On7pCLXC81ArkKvRS4PY +OyhNyFx5+FO1GeOWnbAo7rUuoxVPD/tCjStCCiCInUayHH0XyLdD7zpeILsjy1H18Fq lfMA== X-Gm-Message-State: AOAM5328r0G53mUIuHRGhOVWNrGJ97zIncyQgnieQziu02/voroS+SF0 +MMYS8lQ13H22YovszKHNxBB8g== X-Received: by 2002:aa7:d4ca:: with SMTP id t10mr4062784edr.388.1615392011409; Wed, 10 Mar 2021 08:00:11 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id i2sm11227314edy.72.2021.03.10.08.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:09 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 20B031FF92; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 06/15] .editorconfig: update the automatic mode setting for Emacs Date: Wed, 10 Mar 2021 15:59:53 +0000 Message-Id: <20210310160002.11659-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It seems the editor specific keywords have been deprecated in the main editorconfig plugin: https://github.com/editorconfig/editorconfig-emacs#file-type-file_type_ext-file_type_emacs Update the keywords to the suggested one and point users at the extension. Signed-off-by: Alex Bennée Reviewed-by: Marc-André Lureau Message-Id: <20210305144839.6558-1-alex.bennee@linaro.org> -- 2.20.1 diff --git a/.editorconfig b/.editorconfig index 22681d91c6..7303759ed7 100644 --- a/.editorconfig +++ b/.editorconfig @@ -4,6 +4,11 @@ # plugin. # # Check https://editorconfig.org for details. +# +# Emacs: you need https://github.com/10sr/editorconfig-custom-majormode-el +# to automatically enable the appropriate major-mode for your files +# that aren't already caught by your existing config. +# root = true @@ -15,17 +20,17 @@ charset = utf-8 [*.mak] indent_style = tab indent_size = 8 -file_type_emacs = makefile +emacs_mode = makefile [Makefile*] indent_style = tab indent_size = 8 -file_type_emacs = makefile +emacs_mode = makefile [*.{c,h,c.inc,h.inc}] indent_style = space indent_size = 4 -file_type_emacs = c +emacs_mode = c [*.sh] indent_style = space @@ -34,11 +39,11 @@ indent_size = 4 [*.{s,S}] indent_style = tab indent_size = 8 -file_type_emacs = asm +emacs_mode = asm [*.{vert,frag}] -file_type_emacs = glsl +emacs_mode = glsl [*.json] indent_style = space -file_type_emacs = python +emacs_mode = python From patchwork Wed Mar 10 15:59:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396764 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp508184jai; Wed, 10 Mar 2021 08:18:20 -0800 (PST) X-Google-Smtp-Source: ABdhPJybKcia8+QobkacQP5wgFVl9sTn5Pq7JElLVZs6iFl1qFFWCtBkJCTp0b9F3wI3N6jMHifS X-Received: by 2002:a67:fa86:: with SMTP id f6mr2369928vsq.36.1615393100735; Wed, 10 Mar 2021 08:18:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615393100; cv=none; d=google.com; s=arc-20160816; b=0E6phfjjv2id3a3AbX3Z3CD6p+sbKIV6eAxwqeSIPupiZNn5UrfXt7Q6Up0NkVKyBq ogMFOZGDuxQ5Kkki+mPx/aQyda5HD8bAr+AVqPBIcra9XL/9VHaJsSqd0QUG/4ctXN2s Q/uE3PXNlhiZIfRpETZUdn+jDXmzV+29dWw191TU1Zsveqff7gjXAwxG2iWOcFbW8ILF oEKqsS8uQ7h/sd3IV8JLTDNG4Yy7a66fdnejLlVWm22pIso8H7S21tPlEJeG7geAOn7+ MHNQ2P66S7OejZ7Ma6GBJeSBgqv0qUCv9ZQyUVX4P08e/e15qtAVjwXEI4DgHimSKln0 +WJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xgE9V9DtnRL9QrGkXlRiVpJ3oUWVlB8PL3fF6X62Kk8=; b=VrYx1w8GvyjHf5sNiicLNu9OdUtPinbADvc518NNYtxq2y29+BrB4UR1pUg3J7IGTq UJMR/hkun0KzApse/pI2YyoAbIDFANjqBS3UXwYBVs7cVVZJoIjc20Kz/r73p/et9QEl 1vpZYDeqr3jyFXU3Exaii/gJFjbRkzVPyHqaPUVV1mqeruj6DkBlHL7wZFl9Jvt3Ogm3 pnY4j23ysoNZCh7wFdmmR2zRWwR/CiAR0wraly6TbDBHkiJjGd+IKxkQMUKYK6CHDDpK rAXwih/HSWKPMuUGzzMSttsfO/k+i20wuzd5hb6akfaOeZ+dZ3LoeC+Faz9X431YYgZ3 vhOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=wLpMPjTV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f4si2813253vso.442.2021.03.10.08.18.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:18:20 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=wLpMPjTV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:60296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1XP-00048u-Tr for patch@linaro.org; Wed, 10 Mar 2021 11:18:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34592) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G1-0004aE-3U for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:21 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:42351) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1Fw-0002eA-PO for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:20 -0500 Received: by mail-wr1-x432.google.com with SMTP id j2so23887462wrx.9 for ; Wed, 10 Mar 2021 08:00:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xgE9V9DtnRL9QrGkXlRiVpJ3oUWVlB8PL3fF6X62Kk8=; b=wLpMPjTVyhJZJKahX3IIwjEEHMWM9gcqlEpJbrKD/QlqnCN59w5nWpk81kEAVeErKw xbZXgpcK/f0RJxrAiy7PwJ+JSgXJT3sbZBOY/792/6uzEUF5wpF8oHzVe3Cm+cdWx4i9 IO+OvFW2fye4L9qKKY4rSJF+0VhyhXeXHmZ7N25a/HwdLZrepgsuz6gqWHqDW4jFIqPw cTWNYocOnSJz8+pEW9/yGRhlgizcgJg4J3xstH0mftEfTskw3AeCQ30jq3TB0YT7QkKX uJiOxfPDgq3FQel43dVHchZHPRq+WeXUdNUIweq6PUa79kn+JLm2oJdyvDnDrtwJsqb6 tohw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xgE9V9DtnRL9QrGkXlRiVpJ3oUWVlB8PL3fF6X62Kk8=; b=L3tQ8ynNvFkn9RsTdwL2JfLZdGyXBW1DYJ0eMwLrydGrovhxN/l9/EEkz4YZidDV/I wip3S1UX8biezMH+tsrI+UFILlp6EE8YiTSlt993AnzztVvhXfj3YlD8auu3BgPTNVZd fJaT4/TwjC6Xkzbg6tONDy7TXyuLi7ivb4ZS4dx+CIRlTIOe2xh3JCv/a/Z66ZepLIlw 4OuB8UOcLj7XSMQXfIXN0kGspHuDVpoyBQU3jTMFNVg9/bSQpilaczpIfLzn52tqLx/b N8XIZV0UXenSvtDwWgrwxu+w1H7lmOwzcTVP78wET04qDBlyfMPzvvoJJjl/s9wWiejf cq0g== X-Gm-Message-State: AOAM533IsEh3TvER2E4zm/fi85ylVHDbr+4kEXZCk7RD/vEHfJNCdY3p NLwi1GecF+oe1Vm7RrNVXlog0YiNlaqi0w== X-Received: by 2002:a17:907:7637:: with SMTP id jy23mr4265658ejc.12.1615392014620; Wed, 10 Mar 2021 08:00:14 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id q16sm9977692ejd.15.2021.03.10.08.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:10 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 3C2BE1FF93; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 07/15] hw/board: promote fdt from ARM VirtMachineState to MachineState Date: Wed, 10 Mar 2021 15:59:54 +0000 Message-Id: <20210310160002.11659-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, "open list:Virt" , =?utf-8?q?Philippe_Mathieu-Da?= =?utf-8?q?ud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The use of FDT's is quite common across our various platforms. To allow the guest loader to tweak it we need to make it available in the generic state. This creates the field and migrates the initial user to use the generic field. Other boards will be updated in later patches. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210303173642.3805-2-alex.bennee@linaro.org> -- 2.20.1 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index ee9a93101e..921416f918 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -153,7 +153,6 @@ struct VirtMachineState { MemMapEntry *memmap; char *pciehb_nodename; const int *irqmap; - void *fdt; int fdt_size; uint32_t clock_phandle; uint32_t gic_phandle; diff --git a/include/hw/boards.h b/include/hw/boards.h index a46dfe5d1a..5fda5fd128 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -258,6 +258,7 @@ struct MachineState { /*< public >*/ + void *fdt; char *dtb; char *dumpdtb; int phandle_start; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 371147f3ae..c08bf11297 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -218,14 +218,14 @@ static bool cpu_type_valid(const char *cpu) return false; } -static void create_kaslr_seed(VirtMachineState *vms, const char *node) +static void create_kaslr_seed(MachineState *ms, const char *node) { uint64_t seed; if (qemu_guest_getrandom(&seed, sizeof(seed), NULL)) { return; } - qemu_fdt_setprop_u64(vms->fdt, node, "kaslr-seed", seed); + qemu_fdt_setprop_u64(ms->fdt, node, "kaslr-seed", seed); } static void create_fdt(VirtMachineState *vms) @@ -239,7 +239,7 @@ static void create_fdt(VirtMachineState *vms) exit(1); } - vms->fdt = fdt; + ms->fdt = fdt; /* Header */ qemu_fdt_setprop_string(fdt, "/", "compatible", "linux,dummy-virt"); @@ -248,11 +248,11 @@ static void create_fdt(VirtMachineState *vms) /* /chosen must exist for load_dtb to fill in necessary properties later */ qemu_fdt_add_subnode(fdt, "/chosen"); - create_kaslr_seed(vms, "/chosen"); + create_kaslr_seed(ms, "/chosen"); if (vms->secure) { qemu_fdt_add_subnode(fdt, "/secure-chosen"); - create_kaslr_seed(vms, "/secure-chosen"); + create_kaslr_seed(ms, "/secure-chosen"); } /* Clock node, for the benefit of the UART. The kernel device tree @@ -316,6 +316,7 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms) ARMCPU *armcpu; VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms = MACHINE(vms); if (vmc->claim_edge_triggered_timers) { irqflags = GIC_FDT_IRQ_FLAGS_EDGE_LO_HI; @@ -327,19 +328,19 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms) (1 << MACHINE(vms)->smp.cpus) - 1); } - qemu_fdt_add_subnode(vms->fdt, "/timer"); + qemu_fdt_add_subnode(ms->fdt, "/timer"); armcpu = ARM_CPU(qemu_get_cpu(0)); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] = "arm,armv8-timer\0arm,armv7-timer"; - qemu_fdt_setprop(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop(ms->fdt, "/timer", "compatible", compat, sizeof(compat)); } else { - qemu_fdt_setprop_string(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop_string(ms->fdt, "/timer", "compatible", "arm,armv7-timer"); } - qemu_fdt_setprop(vms->fdt, "/timer", "always-on", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, "/timer", "interrupts", + qemu_fdt_setprop(ms->fdt, "/timer", "always-on", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflags, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqflags, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, @@ -375,35 +376,35 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) } } - qemu_fdt_add_subnode(vms->fdt, "/cpus"); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#address-cells", addr_cells); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#size-cells", 0x0); + qemu_fdt_add_subnode(ms->fdt, "/cpus"); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", addr_cells); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); for (cpu = smp_cpus - 1; cpu >= 0; cpu--) { char *nodename = g_strdup_printf("/cpus/cpu@%d", cpu); ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); CPUState *cs = CPU(armcpu); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "cpu"); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", armcpu->dtb_compatible); if (vms->psci_conduit != QEMU_PSCI_CONDUIT_DISABLED && smp_cpus > 1) { - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_setprop_string(ms->fdt, nodename, "enable-method", "psci"); } if (addr_cells == 2) { - qemu_fdt_setprop_u64(vms->fdt, nodename, "reg", + qemu_fdt_setprop_u64(ms->fdt, nodename, "reg", armcpu->mp_affinity); } else { - qemu_fdt_setprop_cell(vms->fdt, nodename, "reg", + qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", armcpu->mp_affinity); } if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { - qemu_fdt_setprop_cell(vms->fdt, nodename, "numa-node-id", + qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } @@ -414,71 +415,74 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) static void fdt_add_its_gic_node(VirtMachineState *vms) { char *nodename; + MachineState *ms = MACHINE(vms); - vms->msi_phandle = qemu_fdt_alloc_phandle(vms->fdt); + vms->msi_phandle = qemu_fdt_alloc_phandle(ms->fdt); nodename = g_strdup_printf("/intc/its@%" PRIx64, vms->memmap[VIRT_GIC_ITS].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3-its"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_ITS].base, 2, vms->memmap[VIRT_GIC_ITS].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } static void fdt_add_v2m_gic_node(VirtMachineState *vms) { + MachineState *ms = MACHINE(vms); char *nodename; nodename = g_strdup_printf("/intc/v2m@%" PRIx64, vms->memmap[VIRT_GIC_V2M].base); - vms->msi_phandle = qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + vms->msi_phandle = qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v2m-frame"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_V2M].base, 2, vms->memmap[VIRT_GIC_V2M].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } static void fdt_add_gic_node(VirtMachineState *vms) { + MachineState *ms = MACHINE(vms); char *nodename; - vms->gic_phandle = qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_setprop_cell(vms->fdt, "/", "interrupt-parent", vms->gic_phandle); + vms->gic_phandle = qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_setprop_cell(ms->fdt, "/", "interrupt-parent", vms->gic_phandle); nodename = g_strdup_printf("/intc@%" PRIx64, vms->memmap[VIRT_GIC_DIST].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 3); - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-controller", NULL, 0); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 0x2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 0x2); - qemu_fdt_setprop(vms->fdt, nodename, "ranges", NULL, 0); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 3); + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2); + qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0); if (vms->gic_version == VIRT_GIC_VERSION_3) { int nb_redist_regions = virt_gicv3_redist_region_count(vms); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3"); - qemu_fdt_setprop_cell(vms->fdt, nodename, + qemu_fdt_setprop_cell(ms->fdt, nodename, "#redistributor-regions", nb_redist_regions); if (nb_redist_regions == 1) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_REDIST].base, 2, vms->memmap[VIRT_GIC_REDIST].size); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_REDIST].base, @@ -488,22 +492,22 @@ static void fdt_add_gic_node(VirtMachineState *vms) } if (vms->virt) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IRQ, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } else { /* 'cortex-a15-gic' means 'GIC v2' */ - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,cortex-a15-gic"); if (!vms->virt) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_CPU].base, 2, vms->memmap[VIRT_GIC_CPU].size); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_CPU].base, @@ -512,13 +516,13 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_HYP].size, 2, vms->memmap[VIRT_GIC_VCPU].base, 2, vms->memmap[VIRT_GIC_VCPU].size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IRQ, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->gic_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->gic_phandle); g_free(nodename); } @@ -526,6 +530,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) { ARMCPU *armcpu = ARM_CPU(first_cpu); uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms = MACHINE(vms); if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); @@ -538,12 +543,12 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) (1 << MACHINE(vms)->smp.cpus) - 1); } - qemu_fdt_add_subnode(vms->fdt, "/pmu"); + qemu_fdt_add_subnode(ms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] = "arm,armv8-pmuv3"; - qemu_fdt_setprop(vms->fdt, "/pmu", "compatible", + qemu_fdt_setprop(ms->fdt, "/pmu", "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_cells(vms->fdt, "/pmu", "interrupts", + qemu_fdt_setprop_cells(ms->fdt, "/pmu", "interrupts", GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_PMU_IRQ, irqflags); } } @@ -749,6 +754,7 @@ static void create_uart(const VirtMachineState *vms, int uart, const char clocknames[] = "uartclk\0apb_pclk"; DeviceState *dev = qdev_new(TYPE_PL011); SysBusDevice *s = SYS_BUS_DEVICE(dev); + MachineState *ms = MACHINE(vms); qdev_prop_set_chr(dev, "chardev", chr); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -757,28 +763,28 @@ static void create_uart(const VirtMachineState *vms, int uart, sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); nodename = g_strdup_printf("/pl011@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_add_subnode(ms->fdt, nodename); /* Note that we can't use setprop_string because of the embedded NUL */ - qemu_fdt_setprop(vms->fdt, nodename, "compatible", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cells(vms->fdt, nodename, "clocks", + qemu_fdt_setprop_cells(ms->fdt, nodename, "clocks", vms->clock_phandle, vms->clock_phandle); - qemu_fdt_setprop(vms->fdt, nodename, "clock-names", + qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, sizeof(clocknames)); if (uart == VIRT_UART) { - qemu_fdt_setprop_string(vms->fdt, "/chosen", "stdout-path", nodename); + qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); } else { /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); - qemu_fdt_setprop_string(vms->fdt, "/secure-chosen", "stdout-path", + qemu_fdt_setprop_string(ms->fdt, "/secure-chosen", "stdout-path", nodename); } @@ -792,19 +798,20 @@ static void create_rtc(const VirtMachineState *vms) hwaddr size = vms->memmap[VIRT_RTC].size; int irq = vms->irqmap[VIRT_RTC]; const char compat[] = "arm,pl031\0arm,primecell"; + MachineState *ms = MACHINE(vms); sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); nodename = g_strdup_printf("/pl031@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); g_free(nodename); } @@ -821,32 +828,30 @@ static void virt_powerdown_req(Notifier *n, void *opaque) } } -static void create_gpio_keys(const VirtMachineState *vms, - DeviceState *pl061_dev, +static void create_gpio_keys(char *fdt, DeviceState *pl061_dev, uint32_t phandle) { gpio_key_dev = sysbus_create_simple("gpio-key", -1, qdev_get_gpio_in(pl061_dev, 3)); - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys", "compatible", "gpio-keys"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#size-cells", 0); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#address-cells", 1); + qemu_fdt_add_subnode(fdt, "/gpio-keys"); + qemu_fdt_setprop_string(fdt, "/gpio-keys", "compatible", "gpio-keys"); + qemu_fdt_setprop_cell(fdt, "/gpio-keys", "#size-cells", 0); + qemu_fdt_setprop_cell(fdt, "/gpio-keys", "#address-cells", 1); - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys/poweroff"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_add_subnode(fdt, "/gpio-keys/poweroff"); + qemu_fdt_setprop_string(fdt, "/gpio-keys/poweroff", "label", "GPIO Key Poweroff"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys/poweroff", "linux,code", + qemu_fdt_setprop_cell(fdt, "/gpio-keys/poweroff", "linux,code", KEY_POWER); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_setprop_cells(fdt, "/gpio-keys/poweroff", "gpios", phandle, 3, 0); } #define SECURE_GPIO_POWEROFF 0 #define SECURE_GPIO_RESET 1 -static void create_secure_gpio_pwr(const VirtMachineState *vms, - DeviceState *pl061_dev, +static void create_secure_gpio_pwr(char *fdt, DeviceState *pl061_dev, uint32_t phandle) { DeviceState *gpio_pwr_dev; @@ -860,22 +865,22 @@ static void create_secure_gpio_pwr(const VirtMachineState *vms, qdev_connect_gpio_out(pl061_dev, SECURE_GPIO_POWEROFF, qdev_get_gpio_in_named(gpio_pwr_dev, "shutdown", 0)); - qemu_fdt_add_subnode(vms->fdt, "/gpio-poweroff"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "compatible", + qemu_fdt_add_subnode(fdt, "/gpio-poweroff"); + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "compatible", "gpio-poweroff"); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-poweroff", + qemu_fdt_setprop_cells(fdt, "/gpio-poweroff", "gpios", phandle, SECURE_GPIO_POWEROFF, 0); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "secure-status", + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "status", "disabled"); + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "secure-status", "okay"); - qemu_fdt_add_subnode(vms->fdt, "/gpio-restart"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "compatible", + qemu_fdt_add_subnode(fdt, "/gpio-restart"); + qemu_fdt_setprop_string(fdt, "/gpio-restart", "compatible", "gpio-restart"); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-restart", + qemu_fdt_setprop_cells(fdt, "/gpio-restart", "gpios", phandle, SECURE_GPIO_RESET, 0); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "secure-status", + qemu_fdt_setprop_string(fdt, "/gpio-restart", "status", "disabled"); + qemu_fdt_setprop_string(fdt, "/gpio-restart", "secure-status", "okay"); } @@ -889,6 +894,7 @@ static void create_gpio_devices(const VirtMachineState *vms, int gpio, int irq = vms->irqmap[gpio]; const char compat[] = "arm,pl061\0arm,primecell"; SysBusDevice *s; + MachineState *ms = MACHINE(vms); pl061_dev = qdev_new("pl061"); s = SYS_BUS_DEVICE(pl061_dev); @@ -896,33 +902,33 @@ static void create_gpio_devices(const VirtMachineState *vms, int gpio, memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); - uint32_t phandle = qemu_fdt_alloc_phandle(vms->fdt); + uint32_t phandle = qemu_fdt_alloc_phandle(ms->fdt); nodename = g_strdup_printf("/pl061@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#gpio-cells", 2); - qemu_fdt_setprop(vms->fdt, nodename, "gpio-controller", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#gpio-cells", 2); + qemu_fdt_setprop(ms->fdt, nodename, "gpio-controller", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", phandle); if (gpio != VIRT_GPIO) { /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); } g_free(nodename); /* Child gpio devices */ if (gpio == VIRT_GPIO) { - create_gpio_keys(vms, pl061_dev, phandle); + create_gpio_keys(ms->fdt, pl061_dev, phandle); } else { - create_secure_gpio_pwr(vms, pl061_dev, phandle); + create_secure_gpio_pwr(ms->fdt, pl061_dev, phandle); } } @@ -930,6 +936,7 @@ static void create_virtio_devices(const VirtMachineState *vms) { int i; hwaddr size = vms->memmap[VIRT_MMIO].size; + MachineState *ms = MACHINE(vms); /* We create the transports in forwards order. Since qbus_realize() * prepends (not appends) new child buses, the incrementing loop below will @@ -979,15 +986,15 @@ static void create_virtio_devices(const VirtMachineState *vms) hwaddr base = vms->memmap[VIRT_MMIO].base + i * size; nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "virtio,mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); } } @@ -1068,17 +1075,18 @@ static void virt_flash_fdt(VirtMachineState *vms, { hwaddr flashsize = vms->memmap[VIRT_FLASH].size / 2; hwaddr flashbase = vms->memmap[VIRT_FLASH].base; + MachineState *ms = MACHINE(vms); char *nodename; if (sysmem == secure_sysmem) { /* Report both flash devices as a single node in the DT */ nodename = g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } else { /* @@ -1086,21 +1094,21 @@ static void virt_flash_fdt(VirtMachineState *vms, * only visible to the secure world. */ nodename = g_strdup_printf("/secflash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); g_free(nodename); nodename = g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } } @@ -1167,17 +1175,17 @@ static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace *as) fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "qemu,fw-cfg-mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); return fw_cfg; } -static void create_pcie_irq_map(const VirtMachineState *vms, +static void create_pcie_irq_map(const MachineState *ms, uint32_t gic_phandle, int first_irq, const char *nodename) { @@ -1205,10 +1213,10 @@ static void create_pcie_irq_map(const VirtMachineState *vms, } } - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-map", + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map, sizeof(full_irq_map)); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupt-map-mask", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask", cpu_to_be16(PCI_DEVFN(3, 0)), /* Slot 3 */ 0, 0, 0x7 /* PCI irq */); @@ -1225,6 +1233,7 @@ static void create_smmu(const VirtMachineState *vms, hwaddr size = vms->memmap[VIRT_SMMU].size; const char irq_names[] = "eventq\0priq\0cmdq-sync\0gerror"; DeviceState *dev; + MachineState *ms = MACHINE(vms); if (vms->iommu != VIRT_IOMMU_SMMUV3 || !vms->iommu_phandle) { return; @@ -1242,26 +1251,26 @@ static void create_smmu(const VirtMachineState *vms, } node = g_strdup_printf("/smmuv3@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", 2, base, 2, size); + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, node, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, node, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq , GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 1, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 2, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 3, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); - qemu_fdt_setprop(vms->fdt, node, "interrupt-names", irq_names, + qemu_fdt_setprop(ms->fdt, node, "interrupt-names", irq_names, sizeof(irq_names)); - qemu_fdt_setprop_cell(vms->fdt, node, "clocks", vms->clock_phandle); - qemu_fdt_setprop_string(vms->fdt, node, "clock-names", "apb_pclk"); - qemu_fdt_setprop(vms->fdt, node, "dma-coherent", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, node, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, node, "clock-names", "apb_pclk"); + qemu_fdt_setprop(ms->fdt, node, "dma-coherent", NULL, 0); - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); } @@ -1269,22 +1278,23 @@ static void create_virtio_iommu_dt_bindings(VirtMachineState *vms) { const char compat[] = "virtio,pci-iommu"; uint16_t bdf = vms->virtio_iommu_bdf; + MachineState *ms = MACHINE(vms); char *node; - vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle = qemu_fdt_alloc_phandle(ms->fdt); node = g_strdup_printf("%s/virtio_iommu@%d", vms->pciehb_nodename, bdf); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 1, bdf << 8, 1, 0, 1, 0, 1, 0, 1, 0); - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); - qemu_fdt_setprop_cells(vms->fdt, vms->pciehb_nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, vms->pciehb_nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, bdf, bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - bdf); } @@ -1309,6 +1319,7 @@ static void create_pcie(VirtMachineState *vms) char *nodename; int i, ecam_id; PCIHostState *pci; + MachineState *ms = MACHINE(vms); dev = qdev_new(TYPE_GPEX_HOST); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -1369,27 +1380,27 @@ static void create_pcie(VirtMachineState *vms) } nodename = vms->pciehb_nodename = g_strdup_printf("/pcie@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "pci-host-ecam-generic"); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "pci"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 3); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "linux,pci-domain", 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "bus-range", 0, + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "pci"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 3); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0, nr_pcie_buses - 1); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); if (vms->msi_phandle) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "msi-parent", + qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-parent", vms->msi_phandle); } - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_ecam, 2, size_ecam); if (vms->highmem) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, @@ -1398,23 +1409,23 @@ static void create_pcie(VirtMachineState *vms) 2, base_mmio_high, 2, base_mmio_high, 2, size_mmio_high); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, 2, base_mmio, 2, size_mmio); } - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 1); - create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); + create_pcie_irq_map(ms, vms->gic_phandle, irq, nodename); if (vms->iommu) { - vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle = qemu_fdt_alloc_phandle(ms->fdt); switch (vms->iommu) { case VIRT_IOMMU_SMMUV3: create_smmu(vms, vms->bus); - qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, 0x10000); break; default: @@ -1466,17 +1477,18 @@ static void create_secure_ram(VirtMachineState *vms, char *nodename; hwaddr base = vms->memmap[VIRT_SECURE_MEM].base; hwaddr size = vms->memmap[VIRT_SECURE_MEM].size; + MachineState *ms = MACHINE(vms); memory_region_init_ram(secram, NULL, "virt.secure-ram", size, &error_fatal); memory_region_add_subregion(secure_sysmem, base, secram); nodename = g_strdup_printf("/secram@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "memory"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); if (secure_tag_sysmem) { create_tag_ram(secure_tag_sysmem, base, size, "mach-virt.secure-tag"); @@ -1489,9 +1501,11 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) { const VirtMachineState *board = container_of(binfo, VirtMachineState, bootinfo); + MachineState *ms = MACHINE(board); + *fdt_size = board->fdt_size; - return board->fdt; + return ms->fdt; } static void virt_build_smbios(VirtMachineState *vms) @@ -1539,7 +1553,7 @@ void virt_machine_done(Notifier *notifier, void *data) * while qemu takes charge of the qom stuff. */ if (info->dtb_filename == NULL) { - platform_bus_add_all_fdt_nodes(vms->fdt, "/intc", + platform_bus_add_all_fdt_nodes(ms->fdt, "/intc", vms->memmap[VIRT_PLATFORM_BUS].base, vms->memmap[VIRT_PLATFORM_BUS].size, vms->irqmap[VIRT_PLATFORM_BUS]); From patchwork Wed Mar 10 15:59:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396767 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp514045jai; Wed, 10 Mar 2021 08:26:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJyg9YXw2TG24MyDniBR01UArPe9KJmmezm0b07IGDVKwr1L7zxYojNFe/aOq+uQaC2HFrTZ X-Received: by 2002:a9f:3f4a:: with SMTP id i10mr1638409uaj.125.1615393592413; Wed, 10 Mar 2021 08:26:32 -0800 (PST) ARC-Seal: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id f6si1543038vsj.50.2021.03.10.08.26.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:26:32 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=JBdEbffk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53600 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1fL-00058x-Ni for patch@linaro.org; Wed, 10 Mar 2021 11:26:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34796) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1GH-0004j1-Oj for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:39 -0500 Received: from mail-lf1-x129.google.com ([2a00:1450:4864:20::129]:42216) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1G5-0002ms-U8 for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:32 -0500 Received: by mail-lf1-x129.google.com with SMTP id v2so21309584lft.9 for ; Wed, 10 Mar 2021 08:00:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5ViVWtZ3No3EwiuLvapp181B6jvA1Zl37fC61JHK5PU=; b=JBdEbffkez64Mc7m3WjWfI/it9TsTKd999OZ9tSVY383s8EVAMYZnKMIPHj9xsgKgl AJFaVZKdfIIC6E3SFvuMVG4ldIaalAm/U5Kb1Ia7PWnGWync9DPAQ7aEwfU07YSAuF8n L7TMkrKMbM+uNFtnr42uNAWbA0EXSLC7uhGi72NhH4M6Uqvt7z3NL3j9mO++woWJfKRS oMC4GKNn/nXZH7PS8sPjir68p6KF8PH5chZT5K3nGMVaMuZNglmePzZ2hx6/h0d6YQFk s5eYmv59mOpoCgPlOQ51NcYaP3p9t6ybc80YlpI0t9dSu2FAUQ2kytPnakEFV4ZaTbSj 8Xag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5ViVWtZ3No3EwiuLvapp181B6jvA1Zl37fC61JHK5PU=; b=iL3I7Kc7qxT5GpQghr2WkWSdVn5g4Jaxyz8rkidQASCvBeLyHSpHl9OCmptOabmOn/ lL+kANitR9p7SW9ld51ARro+Phc6q13y9dpxKEKzayUDXwjbSDbryVnRVUza7cw1dJzM t6Rqc7AyLHxuiR88fAb+3WMdztkaQF50QPMHP9XA1VXF+Oy+RYOV1UR9Uwn0gsuA2Jxt TOZKbcivW1s/g307Z+TpXuRgrJVJgbz4yxZ0Ms3OcQa2tt3IoFluXc1LD0N5gIvog5Fv yUNMFGpTLseFXhWhHdxzkjbXMr11bZJpkpZLFo9w2mU9RcFSnRtcPnUFUsem/QI7uCpx e7sg== X-Gm-Message-State: AOAM530o7fta4F9dC8mYuPM2P9F/Zqn9LQwNxVjN6DzYNaIrF4Bs8r3x aZACHLAfHvP2w0rdcrJousWH9QRTNsw9XQ== X-Received: by 2002:a05:6402:3550:: with SMTP id f16mr4105497edd.134.1615392013718; Wed, 10 Mar 2021 08:00:13 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id qo25sm2825463ejb.93.2021.03.10.08.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:10 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 54F021FF96; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 08/15] hw/riscv: migrate fdt field to generic MachineState Date: Wed, 10 Mar 2021 15:59:55 +0000 Message-Id: <20210310160002.11659-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Sagar Karandikar , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is a mechanical change to make the fdt available through MachineState. Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org> -- 2.20.1 diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 84b7a3848f..632da52018 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -41,7 +41,6 @@ struct RISCVVirtState { DeviceState *plic[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; - void *fdt; int fdt_size; }; diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4f0c2fbca0..0b39101a5e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -195,14 +195,14 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, hwaddr flashbase = virt_memmap[VIRT_FLASH].base; if (mc->dtb) { - fdt = s->fdt = load_device_tree(mc->dtb, &s->fdt_size); + fdt = mc->fdt = load_device_tree(mc->dtb, &s->fdt_size); if (!fdt) { error_report("load_device_tree() failed"); exit(1); } goto update_bootargs; } else { - fdt = s->fdt = create_device_tree(&s->fdt_size); + fdt = mc->fdt = create_device_tree(&s->fdt_size); if (!fdt) { error_report("create_device_tree() failed"); exit(1); @@ -444,12 +444,12 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, g_free(name); name = g_strdup_printf("/soc/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_string(s->fdt, name, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + qemu_fdt_add_subnode(mc->fdt, name); + qemu_fdt_setprop_string(mc->fdt, name, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(mc->fdt, name, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(s->fdt, name, "bank-width", 4); + qemu_fdt_setprop_cell(mc->fdt, name, "bank-width", 4); g_free(name); update_bootargs: @@ -667,9 +667,9 @@ static void virt_machine_init(MachineState *machine) hwaddr end = riscv_load_initrd(machine->initrd_filename, machine->ram_size, kernel_entry, &start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-start", start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end", end); } } else { @@ -690,12 +690,12 @@ static void virt_machine_init(MachineState *machine) /* Compute the fdt load address in dram */ fdt_load_addr = riscv_load_fdt(memmap[VIRT_DRAM].base, - machine->ram_size, s->fdt); + machine->ram_size, machine->fdt); /* load the reset vector */ riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, virt_memmap[VIRT_MROM].base, virt_memmap[VIRT_MROM].size, kernel_entry, - fdt_load_addr, s->fdt); + fdt_load_addr, machine->fdt); /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base); From patchwork Wed Mar 10 15:59:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396769 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp517878jai; Wed, 10 Mar 2021 08:31:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJy3AuOwRemacnMLRFc1eFB/fhxdgTvY9sc7iyHwBcJWx2hZvNIdedfw2HIarbQpfyMBzebM X-Received: by 2002:a67:c80e:: with SMTP id u14mr2220766vsk.39.1615393906311; Wed, 10 Mar 2021 08:31:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615393906; cv=none; d=google.com; s=arc-20160816; b=d+YiuKisqVTTabsMiJCOXJIQXHrzHRNC4u6gOKg7I00RFKMHebR4a0GWy7xqOgJ1Pb H7wec6x2IXJfsaIwH3+oMx3452+a5TaHIGLsZW7NvrRy92Lj0pDieXL/7rulGVVqpoJH Z1v8rGOLVT2dexyI/A8a9oGoLfH16tOrJf7Sp5SNPvHJvm1amDn5NnR5WW9SmbRAvKCZ lzG12rd8kDEUUfEO5plprYsc6iM4JhHlEvNpoqL0uDZ6XlaH6yn2xiJ36JPx23nRZ71h wtoP5AbM9f6QWpgP804ormbpkvIO1xzRWYp8KIzNkiZ/7ax3NZxPYiYaFiJg+ZExGc7v jtew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=qdRJRL3+3BE/JH14YpiGu383dDrAlP7VpAQihL8OqOE=; b=kf9eHZ9xmQJWUTwflglhKdwv2UxU0NwFrLTW0QvoXz5lmeNsawkc/P82Nw+ImP0w9D uBwHA1hg/iFShJNAEE2C7w1saK1ceIbl+B+e3Nni8i7iXZ2PkEQso8Fq56nwrLLl1XdN xF0dG6fY7lplAA+PSBmU3Fd9pfO9AAvNCk8ekLVVUMAMv4Get0LaNRbmbFmBk5hjDMsp Jwo9wfBWmNU3Cv1UAOJKwv9g6mdgwu8gigH5N76WWWAFwRPXBWtCAH7z9VZ62P3sNoPz /v16jB1cC+SDSHn2RjEjmaFvZXGwfbJXQSWDm2L/d/Y+RHy6Vu64xfc9LOdeCeIwyAHB 4ToQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=LFK799t9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h203si3186956vkh.16.2021.03.10.08.31.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:31:46 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=LFK799t9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:36276 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1kP-0001Ue-FP for patch@linaro.org; Wed, 10 Mar 2021 11:31:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:37230) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1NP-0001li-QN for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:08:00 -0500 Received: from mail-ej1-x633.google.com ([2a00:1450:4864:20::633]:42374) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1NN-0006Rv-PU for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:07:59 -0500 Received: by mail-ej1-x633.google.com with SMTP id c10so39685315ejx.9 for ; Wed, 10 Mar 2021 08:07:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qdRJRL3+3BE/JH14YpiGu383dDrAlP7VpAQihL8OqOE=; b=LFK799t9OUVqJTmgr0NxCRH06m+pOQ2WGKcfwcGPqJWlC2USG4niI7oxd7PnmVgMiH KelHXgSUDeHu2307CpSvdMV+AUD7ErKezEum4T9mnsafPiBc9umQ+Rxi66LfhDjEG9sd QRiaSK36ueE2xbwtZ6mwVQfe88UYZmS5HAAQ0L/z1BsKjwzDnbExkrwxqwpwUC1PoFo4 yfetP8xIVBumzHcatPC9SZnHoktu+hnUvmkxBI6PAAsXHVh+4vYzG50aVMDfUU0DP3xf d92w1RGXro75SrAzqkRa27DMKEQ9U0LlU/9/8URSWTlbk3Y84KzdlpnAuXabYU7KMTDD r1Lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qdRJRL3+3BE/JH14YpiGu383dDrAlP7VpAQihL8OqOE=; b=NQtsvq8pg3UkI4y6togsbFSNveeDIPEIklXgNdkXEikWITWZQ/SMPT3PaGaHFdr7NX H1u+PDGRfqE9aiCLUJZYz0uvzroVXUmRVWWalqRNp0z7xAH97PLFkNh303jaga+iDYww cJifQ95sZixek/+guhYm+skfPTdQeKrcgLCoC2Hb9gz3+CZP10FS9/3EzgCq5J2TEfQg HJzW+xIN2woFxjuxXWxWfhkpHNjjO8mioAZ4znjsK1P3vQtqNAU2VDWhld2F6ZV4N/2f vgMlcYnllvZKWE2S+wDqq6vR7lr5eS6otO7g1f8IGmR2Jn3IQlJe3m5rS5DnLUpjTdGE Lwpg== X-Gm-Message-State: AOAM531LGl06GjikSzic/POS5IU0+EAF6Ygemq1dTL1RLLPdaQwGV2I8 zxQR4AfySI+Mmk55Pau8ss8E7g== X-Received: by 2002:a17:906:1444:: with SMTP id q4mr4474861ejc.343.1615392476168; Wed, 10 Mar 2021 08:07:56 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id q1sm10101442ejt.65.2021.03.10.08.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:07:55 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 6C9D11FF98; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 09/15] device_tree: add qemu_fdt_setprop_string_array helper Date: Wed, 10 Mar 2021 15:59:56 +0000 Message-Id: <20210310160002.11659-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" A string array in device tree is simply a series of \0 terminated strings next to each other. As libfdt doesn't support that directly we need to build it ourselves. Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-4-alex.bennee@linaro.org> -- 2.20.1 diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 982c89345f..8a2fe55622 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -70,6 +70,23 @@ int qemu_fdt_setprop_u64(void *fdt, const char *node_path, const char *property, uint64_t val); int qemu_fdt_setprop_string(void *fdt, const char *node_path, const char *property, const char *string); + +/** + * qemu_fdt_setprop_string_array: set a string array property + * + * @fdt: pointer to the dt blob + * @name: node name + * @prop: property array + * @array: pointer to an array of string pointers + * @len: length of array + * + * assigns a string array to a property. This function converts and + * array of strings to a sequential string with \0 separators before + * setting the property. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, + const char *prop, char **array, int len); + int qemu_fdt_setprop_phandle(void *fdt, const char *node_path, const char *property, const char *target_node_path); diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c index b9a3ddc518..2691c58cf6 100644 --- a/softmmu/device_tree.c +++ b/softmmu/device_tree.c @@ -21,6 +21,7 @@ #include "qemu/error-report.h" #include "qemu/option.h" #include "qemu/bswap.h" +#include "qemu/cutils.h" #include "sysemu/device_tree.h" #include "sysemu/sysemu.h" #include "hw/loader.h" @@ -397,6 +398,31 @@ int qemu_fdt_setprop_string(void *fdt, const char *node_path, return r; } +/* + * libfdt doesn't allow us to add string arrays directly but they are + * test a series of null terminated strings with a length. We build + * the string up here so we can calculate the final length. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, + const char *prop, char **array, int len) +{ + int ret, i, total_len = 0; + char *str, *p; + for (i = 0; i < len; i++) { + total_len += strlen(array[i]) + 1; + } + p = str = g_malloc0(total_len); + for (i = 0; i < len; i++) { + int len = strlen(array[i]) + 1; + pstrcpy(p, len, array[i]); + p += len; + } + + ret = qemu_fdt_setprop(fdt, node_path, prop, str, total_len); + g_free(str); + return ret; +} + const void *qemu_fdt_getprop(void *fdt, const char *node_path, const char *property, int *lenp, Error **errp) { From patchwork Wed Mar 10 15:59:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396753 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp502183jai; Wed, 10 Mar 2021 08:10:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJx734qXF9cZV0c4kyhwU99/sQJgJ9GH1XCZ9EGgbiz0qpA0US7DfgBOrkpwnIBxWQmJoiuN X-Received: by 2002:a9f:2f11:: with SMTP id x17mr2229468uaj.31.1615392657230; Wed, 10 Mar 2021 08:10:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392657; cv=none; d=google.com; s=arc-20160816; b=M0IrZdWN3dNEj/5k42AWTSi9QyLhwyOe175BQyJOOxGZ5yQPqv0KNX2wMI2RuAYJHb CPmaw1OAaExjG0/p1ML8zHAdBI5L5lRpwCTrtrKoou44rwUQZrf1zXkgI4LsOLMncfDz pvckSav52IEQ26LM7Jdw5yyfAniN1UlC6wK0jgu48x9+FTmdRnzQ1ymucD7dFtk1AKDD DXizwaEWZqt630k1AVWjDQd2onVwt8jmeyPijn7dvo8tDqxG7X9t0uKVJnzdbJJqgGvL qfAi4994u/pZhc+mhgdwwAmFYLataSr28dhbp2Gg5a0KA14mhMcZf/P8EDMvvnb3/YD1 yXKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bR/7XY/jQNPU+hwP0Vk0ut5sXstJ+QPzuVzOZ7HMdDM=; b=xdXn0opmK+OyQikMiAbGWiHkFSQ7nFUK/EDxEigFF0U30CeS/UC/YqwHkNHzpHM4kt I86aY10p9RRSNFT0un2U8F/ULIAqpvjp9DtAwG2TKm0D/Byly7DeSKMYoNEd1VvLM8NP ZzZrWYRzLd3KQHq8US631jP72rixRyS8Z+1j78rDgcwyjwPAugIpBLON1wr6LGaiH3a4 rkY/s9wYRREn/C63yb3GWr7GkgdmW7WjZ7l7z5EbZRZ9UMDfOv2FqVu2zaNVaB4zwP2r b5+GbeDbOQlOo9Ffw1i7DaYDkL0whfiBAh5sbvgbBg8eCnZ2DbTF9gh2P37XPpHkzzYI 9Zpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IyiAr25n; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y19si2927962vsm.328.2021.03.10.08.10.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:10:57 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IyiAr25n; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42212 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1QG-0004V0-F9 for patch@linaro.org; Wed, 10 Mar 2021 11:10:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34800) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1GH-0004j2-Un for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:39 -0500 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]:36413) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1G5-0002n1-Qv for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:37 -0500 Received: by mail-ej1-x632.google.com with SMTP id e19so39760224ejt.3 for ; Wed, 10 Mar 2021 08:00:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bR/7XY/jQNPU+hwP0Vk0ut5sXstJ+QPzuVzOZ7HMdDM=; b=IyiAr25nyKbr8UKvMmxBIw4+e/UNa9pUscKbeBT6sjCcqytDlcpDXdVBsXlJbHenHG /QL61NIOoZ+Rm0JWXL+AkI011WzNmXE2axBaX4v4qbzgN/UmVseRHHGDuecXlYRwueko RQqQoiTZe0ST87to9cvWWSqScLV5XTiH7kBWgoLhzMsjxs/9RN6ljZTS0skMHRaZ0QfR k8QuFU52iOUGD6qfTBuQEG1npXyfVALw4Af9h1/afC78GUGZ94tVkYyK9289/8e7+wMY 03/U90RnvihDxlGnKCRuBkIZ3AVTpQzTqrzmPxdvPM7sqX3mqVDwW/GpyWmdrjOaGUK0 vMDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bR/7XY/jQNPU+hwP0Vk0ut5sXstJ+QPzuVzOZ7HMdDM=; b=p402tBrJzkGV9YfTJgepGJzYTyMG9tSCzA46Amuz1JuY2iRzP/j2kxsf6IxGDg01rv e4K/fZiN7BvRwrN9AQdQeaDQL5it2osiyeHvvLhVKXHxExdFJMF7HlCGizGHX19CYI32 uGx7KJnACZBkRZ9TS3PDRujie7HkvbFVmMdszZquaVUSiFPaQCzg0OxkrcLmOHn42ZPE 0zczAw2i4F64y0cS1JaQ9Av7hZ7ZhL8UwomBrkZO2q2HD7TZOJ3MowBtLycYVj3SfLGv ncLBAXXM7uL0KMbmlrTS/90x7KZPvIgpZrBTE1AwXLdphgi57I/a1kjQAF0qAv9TVQhU 6Yzw== X-Gm-Message-State: AOAM530Ht7ZvLHMJIQiJEO2LihTNHJwHfpk4ilU1MaaTJOrgJ/CAKLcn roEgxl/gWv0ADayZJdXRnBpV3g== X-Received: by 2002:a17:906:ae88:: with SMTP id md8mr4256142ejb.264.1615392019543; Wed, 10 Mar 2021 08:00:19 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id a12sm10973505edx.91.2021.03.10.08.00.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:10 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 886F21FF99; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 10/15] hw/core: implement a guest-loader to support static hypervisor guests Date: Wed, 10 Mar 2021 15:59:57 +0000 Message-Id: <20210310160002.11659-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , qemu-devel@nongnu.org, =?utf-8?q?Philippe_Ma?= =?utf-8?q?thieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Hypervisors, especially type-1 ones, need the firmware/bootcode to put their initial guest somewhere in memory and pass the information to it via platform data. The guest-loader is modelled after the generic loader for exactly this sort of purpose: $QEMU $ARGS -kernel ~/xen.git/xen/xen \ -append "dom0_mem=1G,max:1G loglvl=all guest_loglvl=all" \ -device guest-loader,addr=0x42000000,kernel=Image,bootargs="root=/dev/sda2 ro console=hvc0 earlyprintk=xen" \ -device guest-loader,addr=0x47000000,initrd=rootfs.cpio Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org> -- 2.20.1 diff --git a/hw/core/guest-loader.h b/hw/core/guest-loader.h new file mode 100644 index 0000000000..07f4b4884b --- /dev/null +++ b/hw/core/guest-loader.h @@ -0,0 +1,34 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Bennée + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef GUEST_LOADER_H +#define GUEST_LOADER_H + +#include "hw/qdev-core.h" +#include "qom/object.h" + +struct GuestLoaderState { + /* */ + DeviceState parent_obj; + + /* */ + uint64_t addr; + char *kernel; + char *args; + char *initrd; +}; + +#define TYPE_GUEST_LOADER "guest-loader" +OBJECT_DECLARE_SIMPLE_TYPE(GuestLoaderState, GUEST_LOADER) + +#endif diff --git a/hw/core/guest-loader.c b/hw/core/guest-loader.c new file mode 100644 index 0000000000..bde44e27b4 --- /dev/null +++ b/hw/core/guest-loader.c @@ -0,0 +1,145 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Bennée + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +/* + * Much like the generic-loader this is treated as a special device + * inside QEMU. However unlike the generic-loader this device is used + * to load guest images for hypervisors. As part of that process the + * hypervisor needs to have platform information passed to it by the + * lower levels of the stack (e.g. firmware/bootloader). If you boot + * the hypervisor directly you use the guest-loader to load the Dom0 + * or equivalent guest images in the right place in the same way a + * boot loader would. + * + * This is only relevant for full system emulation. + */ + +#include "qemu/osdep.h" +#include "hw/core/cpu.h" +#include "hw/sysbus.h" +#include "sysemu/dma.h" +#include "hw/loader.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "guest-loader.h" +#include "sysemu/device_tree.h" +#include "hw/boards.h" + +/* + * Insert some FDT nodes for the loaded blob. + */ +static void loader_insert_platform_data(GuestLoaderState *s, int size, + Error **errp) +{ + MachineState *machine = MACHINE(qdev_get_machine()); + void *fdt = machine->fdt; + g_autofree char *node = g_strdup_printf("/chosen/module@0x%08" PRIx64, + s->addr); + uint64_t reg_attr[2] = {cpu_to_be64(s->addr), cpu_to_be64(size)}; + + if (!fdt) { + error_setg(errp, "Cannot modify FDT fields if the machine has none"); + return; + } + + qemu_fdt_add_subnode(fdt, node); + qemu_fdt_setprop(fdt, node, "reg", ®_attr, sizeof(reg_attr)); + + if (s->kernel) { + const char *compat[2] = { "multiboot,module", "multiboot,kernel" }; + if (qemu_fdt_setprop_string_array(fdt, node, "compatible", + (char **) &compat, + ARRAY_SIZE(compat)) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + if (s->args) { + if (qemu_fdt_setprop_string(fdt, node, "bootargs", s->args) < 0) { + error_setg(errp, "couldn't set %s/bootargs", node); + } + } + } else if (s->initrd) { + const char *compat[2] = { "multiboot,module", "multiboot,ramdisk" }; + if (qemu_fdt_setprop_string_array(fdt, node, "compatible", + (char **) &compat, + ARRAY_SIZE(compat)) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + } +} + +static void guest_loader_realize(DeviceState *dev, Error **errp) +{ + GuestLoaderState *s = GUEST_LOADER(dev); + char *file = s->kernel ? s->kernel : s->initrd; + int size = 0; + + /* Perform some error checking on the user's options */ + if (s->kernel && s->initrd) { + error_setg(errp, "Cannot specify a kernel and initrd in same stanza"); + return; + } else if (!s->kernel && !s->initrd) { + error_setg(errp, "Need to specify a kernel or initrd image"); + return; + } else if (!s->addr) { + error_setg(errp, "Need to specify the address of guest blob"); + return; + } else if (s->args && !s->kernel) { + error_setg(errp, "Boot args only relevant to kernel blobs"); + } + + /* Default to the maximum size being the machine's ram size */ + size = load_image_targphys_as(file, s->addr, current_machine->ram_size, + NULL); + if (size < 0) { + error_setg(errp, "Cannot load specified image %s", file); + return; + } + + /* Now the image is loaded we need to update the platform data */ + loader_insert_platform_data(s, size, errp); +} + +static Property guest_loader_props[] = { + DEFINE_PROP_UINT64("addr", GuestLoaderState, addr, 0), + DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel), + DEFINE_PROP_STRING("bootargs", GuestLoaderState, args), + DEFINE_PROP_STRING("initrd", GuestLoaderState, initrd), + DEFINE_PROP_END_OF_LIST(), +}; + +static void guest_loader_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = guest_loader_realize; + device_class_set_props(dc, guest_loader_props); + dc->desc = "Guest Loader"; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo guest_loader_info = { + .name = TYPE_GUEST_LOADER, + .parent = TYPE_DEVICE, + .instance_size = sizeof(GuestLoaderState), + .class_init = guest_loader_class_init, +}; + +static void guest_loader_register_type(void) +{ + type_register_static(&guest_loader_info); +} + +type_init(guest_loader_register_type) diff --git a/MAINTAINERS b/MAINTAINERS index 738786146d..38644691dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2022,6 +2022,11 @@ F: hw/core/generic-loader.c F: include/hw/core/generic-loader.h F: docs/generic-loader.txt +Guest Loader +M: Alex Bennée +S: Maintained +F: hw/core/guest-loader.c + Intel Hexadecimal Object File Loader M: Su Hang S: Maintained diff --git a/hw/core/meson.build b/hw/core/meson.build index 032576f571..9cd72edf51 100644 --- a/hw/core/meson.build +++ b/hw/core/meson.build @@ -37,6 +37,8 @@ softmmu_ss.add(files( 'clock-vmstate.c', )) +softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('guest-loader.c')) + specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: files( 'machine-qmp-cmds.c', 'numa.c', From patchwork Wed Mar 10 15:59:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396754 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp502320jai; Wed, 10 Mar 2021 08:11:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJy1JCdrNj074j2HrHQiN2l2+NsSMyZT1pq4rXv82BRw1CecorzjwpeaflzMcVsdpbej49c8 X-Received: by 2002:ab0:3b91:: with SMTP id p17mr2176181uaw.132.1615392664583; Wed, 10 Mar 2021 08:11:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392664; cv=none; d=google.com; s=arc-20160816; b=mdsEv+POhbNwf7GVUglD6sEE1anljy86bzpAU8IMkUlcTJjV969ih/6xsCcvudjjub 2UkkZa45eYuYRYWPGJtt/hs46r9WG5ydeKdovbWNCpwd4OnWvlIdrkYTXcc27oI9zyDA qdQfTYNlOCLlagmu4BNFotz48rVWXY0CbsYBl+kOeMxzQtJVbTva+5LSgmZdfkkkJLN6 FB1AbUDj2Xmsk49jFKz/OFsuBuTYePqO1QCEaxKH1cFTP8wHJmDy79AFUMP8RAqsy00/ ZJujJ0S9lfnttRLkrt9hafYjyZuyJfYjEVEnmnz3clJp3jgmKFh6K1aHd5pqnHGXNboX U/BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=QWLT5npZT/1XtAT2j85s6yvmSq9P5dA67bq/iWP9KuA=; b=PTRlgmekFMW+Y+NvwwIqJ71rtBSHXFZyiIfN8/EyGx8tl7F3tc3//42jabYTwFcNTS UZhkUaaYWDWqfmE4yRSD6Lw7htBqvva6iLwD8CT9lE9BZGoNSmN+7tJUQzHgj7nhhodB YKWm7g8ujgrqaCQeWzBR5NR7aSl8+c92YpCIwPSeTOFqRTsonqLhTyhhpcHNIh5zo9/p 3Gc+10pcx2BEMdQolQgzAyMkQxa4rvAG1ZjMb3Eb3RkXHwl3Qc4GgBIpdUJ8Uehclttn ti5cDBzQISb8RKwYvb/NGD4C4EMF9ctnCTvMBtmRZAt6g8mtRA9IRV6x7lZT1ZcezNbN 8wEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=f6kxNRqf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t14si2970121vsn.78.2021.03.10.08.11.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:11:04 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=f6kxNRqf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42910 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1QN-0004ly-Mo for patch@linaro.org; Wed, 10 Mar 2021 11:11:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34716) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G8-0004hZ-8x for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:30 -0500 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]:45689) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1G5-0002m6-0H for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:28 -0500 Received: by mail-ed1-x532.google.com with SMTP id dm26so28730185edb.12 for ; Wed, 10 Mar 2021 08:00:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QWLT5npZT/1XtAT2j85s6yvmSq9P5dA67bq/iWP9KuA=; b=f6kxNRqfAGRKwQyH1kGg0EeO5+pIE3oL7L+Mq3czoZm5sysIeiQxVtbhr1bN0EWvbh DiQHWB6SR+HJRdb0QwZ1EeR16yGH5N6Q2yAyvlNw1zLeKOEeCw/yglakzxSOibxWnqg8 /lIfhZhHS8aP0LmFUOFwirFvuDySTU4xpMrVDy7F7RDkr/t4qzYLXmL1KwK4YY1HHN7h rwtsoHVcuiE/qLOOPhcmjy6hqzbrruklvoxHB+oASco4CLop1QsZa1oPQuIJ6mBDMZOO IJgkPzUH5X7cpOsEjh7ofO+rIWqXb23iwex8CWtNa7Pl4Omb0y9ktiSfk91ssiTBoRdP u7Xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QWLT5npZT/1XtAT2j85s6yvmSq9P5dA67bq/iWP9KuA=; b=Py+OsD8Whsu/ciVXMfJk9FWV2prLvijVD5McF5oMIVkxtIMVb7GCPuUi4zCOrnyLmV nXfguEcpl1358GaW58Zj5fVXktpz0okSCCt3Ybsa4/W/ZD1uI5C/gFztxmYw2rXTqu+W fE63QOwbgpEHDFf1E/8raqfPIt9cE9xtmkjuQrqkVEyrGUESpbicJtuz5S8vzxkR7QYO Ms9ufIdJEPGRVctT8y4SzIAIHRunnJP/gCpM69T7TFVtKLV3DVPW8E0z7UKqoaBcuzJA pNZFVvqrBZnenSwGtizkgeLitDn/HCFX6oJdfBZAXidb4ibtL3o0EjTaeKE+L+FfIn9F +1iA== X-Gm-Message-State: AOAM530A5af14luJV5qU791RUsUSbzpYWDXxD5BApZR9kuN2yXCofGFp YKiSLpYJa5voO4Qu4G3JkrRi38G69OsDpg== X-Received: by 2002:a05:6402:512:: with SMTP id m18mr4049176edv.372.1615392018646; Wed, 10 Mar 2021 08:00:18 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id l61sm11371890edl.37.2021.03.10.08.00.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:10 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id A3C651FF9A; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 11/15] docs: move generic-loader documentation into the main manual Date: Wed, 10 Mar 2021 15:59:58 +0000 Message-Id: <20210310160002.11659-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We might as well surface this useful information in the manual so users can find it easily. It is a fairly simple conversion to rst with the only textual fixes being QemuOps to QemuOpts. Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org> -- 2.20.1 diff --git a/docs/generic-loader.txt b/docs/generic-loader.txt deleted file mode 100644 index a9603a2af7..0000000000 --- a/docs/generic-loader.txt +++ /dev/null @@ -1,92 +0,0 @@ -Copyright (c) 2016 Xilinx Inc. - -This work is licensed under the terms of the GNU GPL, version 2 or later. See -the COPYING file in the top-level directory. - - -The 'loader' device allows the user to load multiple images or values into -QEMU at startup. - -Loading Data into Memory Values -------------------------------- -The loader device allows memory values to be set from the command line. This -can be done by following the syntax below: - - -device loader,addr=,data=,data-len= - [,data-be=][,cpu-num=] - - - The address to store the data in. - - The value to be written to the address. The maximum size of - the data is 8 bytes. - - The length of the data in bytes. This argument must be - included if the data argument is. - - Set to true if the data to be stored on the guest should be - written as big endian data. The default is to write little - endian data. - - The number of the CPU's address space where the data should - be loaded. If not specified the address space of the first - CPU is used. - -All values are parsed using the standard QemuOps parsing. This allows the user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the number -with a '0x'. - -An example of loading value 0x8000000e to address 0xfd1a0104 is: - -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4 - -Setting a CPU's Program Counter -------------------------------- -The loader device allows the CPU's PC to be set from the command line. This -can be done by following the syntax below: - - -device loader,addr=,cpu-num= - - - The value to use as the CPU's PC. - - The number of the CPU whose PC should be set to the - specified value. - -All values are parsed using the standard QemuOps parsing. This allows the user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the number -with a '0x'. - -An example of setting CPU 0's PC to 0x8000 is: - -device loader,addr=0x8000,cpu-num=0 - -Loading Files -------------- -The loader device also allows files to be loaded into memory. It can load ELF, -U-Boot, and Intel HEX executable formats as well as raw images. The syntax is -shown below: - - -device loader,file=[,addr=][,cpu-num=][,force-raw=] - - - A file to be loaded into memory - - The memory address where the file should be loaded. This is - required for raw images and ignored for non-raw files. - - This specifies the CPU that should be used. This is an - optional argument and will cause the CPU's PC to be set to - the memory address where the raw file is loaded or the entry - point specified in the executable format header. This option - should only be used for the boot image. - This will also cause the image to be written to the specified - CPU's address space. If not specified, the default is CPU 0. - - Setting force-raw=on forces the file to be treated as a raw - image. This can be used to load supported executable formats - as if they were raw. - -All values are parsed using the standard QemuOps parsing. This allows the user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the number -with a '0x'. - -An example of loading an ELF file which CPU0 will boot is shown below: - -device loader,file=./images/boot.elf,cpu-num=0 - -Restrictions and ToDos ----------------------- - - At the moment it is just assumed that if you specify a cpu-num then you - want to set the PC as well. This might not always be the case. In future - the internal state 'set_pc' (which exists in the generic loader now) should - be exposed to the user so that they can choose if the PC is set or not. diff --git a/docs/system/generic-loader.rst b/docs/system/generic-loader.rst new file mode 100644 index 0000000000..6bf8a4eb48 --- /dev/null +++ b/docs/system/generic-loader.rst @@ -0,0 +1,117 @@ +.. + Copyright (c) 2016, Xilinx Inc. + +This work is licensed under the terms of the GNU GPL, version 2 or later. See +the COPYING file in the top-level directory. + +Generic Loader +-------------- + +The 'loader' device allows the user to load multiple images or values into +QEMU at startup. + +Loading Data into Memory Values +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +The loader device allows memory values to be set from the command line. This +can be done by following the syntax below:: + + -device loader,addr=,data=,data-len= \ + [,data-be=][,cpu-num=] + +```` + The address to store the data in. + +```` + The value to be written to the address. The maximum size of the data + is 8 bytes. + +```` + The length of the data in bytes. This argument must be included if + the data argument is. + +```` + Set to true if the data to be stored on the guest should be written + as big endian data. The default is to write little endian data. + +```` + The number of the CPU's address space where the data should be + loaded. If not specified the address space of the first CPU is used. + +All values are parsed using the standard QemuOps parsing. This allows the user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the number +with a '0x'. + +An example of loading value 0x8000000e to address 0xfd1a0104 is:: + + -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4 + +Setting a CPU's Program Counter +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The loader device allows the CPU's PC to be set from the command line. This +can be done by following the syntax below:: + + -device loader,addr=,cpu-num= + +```` + The value to use as the CPU's PC. + +```` + The number of the CPU whose PC should be set to the specified value. + +All values are parsed using the standard QemuOpts parsing. This allows the user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the number +with a '0x'. + +An example of setting CPU 0's PC to 0x8000 is:: + + -device loader,addr=0x8000,cpu-num=0 + +Loading Files +^^^^^^^^^^^^^ + +The loader device also allows files to be loaded into memory. It can load ELF, +U-Boot, and Intel HEX executable formats as well as raw images. The syntax is +shown below: + + -device loader,file=[,addr=][,cpu-num=][,force-raw=] + +```` + A file to be loaded into memory + +```` + The memory address where the file should be loaded. This is required + for raw images and ignored for non-raw files. + +```` + This specifies the CPU that should be used. This is an + optional argument and will cause the CPU's PC to be set to the + memory address where the raw file is loaded or the entry point + specified in the executable format header. This option should only + be used for the boot image. This will also cause the image to be + written to the specified CPU's address space. If not specified, the + default is CPU 0. - Setting force-raw=on forces the file + to be treated as a raw image. This can be used to load supported + executable formats as if they were raw. + +All values are parsed using the standard QemuOpts parsing. This allows the user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the number +with a '0x'. + +An example of loading an ELF file which CPU0 will boot is shown below:: + + -device loader,file=./images/boot.elf,cpu-num=0 + +Restrictions and ToDos +^^^^^^^^^^^^^^^^^^^^^^ + +At the moment it is just assumed that if you specify a cpu-num then +you want to set the PC as well. This might not always be the case. In +future the internal state 'set_pc' (which exists in the generic loader +now) should be exposed to the user so that they can choose if the PC +is set or not. + + diff --git a/docs/system/index.rst b/docs/system/index.rst index 625b494372..cee1c83540 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -25,6 +25,7 @@ Contents: usb ivshmem linuxboot + generic-loader vnc-security tls gdb diff --git a/MAINTAINERS b/MAINTAINERS index 38644691dc..a1170bad5a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2020,7 +2020,7 @@ M: Alistair Francis S: Maintained F: hw/core/generic-loader.c F: include/hw/core/generic-loader.h -F: docs/generic-loader.txt +F: docs/system/generic-loader.rst Guest Loader M: Alex Bennée From patchwork Wed Mar 10 15:59:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396748 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp494496jai; Wed, 10 Mar 2021 08:02:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRKWgYJZ1JBZGMwHCf+1E0g+1h2KCpJe/gjvuDP7Pk738WjmyBZrCACItg8gkr4p9hlQ0W X-Received: by 2002:a67:745:: with SMTP id 66mr1858646vsh.55.1615392160580; Wed, 10 Mar 2021 08:02:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392160; cv=none; d=google.com; s=arc-20160816; b=KDt/0oCD/NRKTXrj4r30PJPqFZDzGJaeLw9XswASKLEHLJcDgFEheuYMkyczEbWnJ0 dBJrNtO9EC6Uc3kS5IZqH2DatQlTMGJUfl7XgxT7ZhlCdmCFaWgGUHYI92j7ciXqBPfO hyc52jogPtTFgv+cKqOcw1bYUkzUG2obokfPp135stMCWQj75Ful8TKmZBmCLRYLUf91 AnK4xB+i/gYTpYKZQ2PWnHimaXRQETPo6++zKIhDu4QnhzghiEqmp0Ei4oWlqL/GTQwc HAWT/bkEs9npN14FRQyVLTgIB4MjdgZuR4IYPZVZ+UduwvQ1XSMKGVB+8K21NS2QBnfp 8p0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=IR6vFLzUACk+G2n73bw/zv7txMf+sDqfwEPpB5jBt2E=; b=qvORc5NFkAGSJeKdDvG4KDkmh5NNUaGGONXQN+KEI44s5x7g6Cje690LLqf+Y1lUQ1 s1iw3r6sX5BnC5zFaw5jGSbsWNqPPulS6cF9lEfrtgHXOkdwK4DRD4L3iDguyk0vMDUv MjPv1H/vRmIGMIX8r+lTwERUJR7SLabrDFCjQBhVEgkuUljfcB+oE4ctRKEZjFLNpzxI ezkeH4V6pON2YdKRFpLxoXphmdkzZa7qPwpD1gNmdnlxEbVRAOioArxGtP15ftG9FU0u VLcQzjMDYDUVd79aoO0LXHfaoLjgBvwYfF9M0wlFEcth8RVNAZE5EB9+W0i1vn6QhVlK bGcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gf7eH1U0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y13si2632139vsn.156.2021.03.10.08.02.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:02:40 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=gf7eH1U0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1IF-0004eZ-Tx for patch@linaro.org; Wed, 10 Mar 2021 11:02:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34616) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G3-0004cw-IA for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:23 -0500 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]:33621) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1G1-0002jx-Mv for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:23 -0500 Received: by mail-ej1-x62c.google.com with SMTP id jt13so39766020ejb.0 for ; Wed, 10 Mar 2021 08:00:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IR6vFLzUACk+G2n73bw/zv7txMf+sDqfwEPpB5jBt2E=; b=gf7eH1U0fD3i/L4Cn77E7dK5yphSv1EyV1ndkFrUyjClzXVcrFMpyygN1j/hbweuZg d6iHu7gEfG4bdNUGdV+ElkDb95bRHq8vT4CCW1oZjaDBix0hn/hOG9VBCHA90AL5DeNk opCu8Dml657lniNj8MjI4b4gWdE4E3oHrRRH5gDodcWFSKy3o3wzEg6eiQh9PhBX63Vz LnjZ7H2iCtasPPimHVHBGUwFMjPJaF7QDdkqLeDtPYmYVJpm+6mLrRIwZ3tQxpZlHWZ6 mTjLcObi2vopkYSJkTsq/pQnSnt+pL4c4KFP0+PJIbjsMU1qjIgyU1DjVwpPsvoA9niT IIPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IR6vFLzUACk+G2n73bw/zv7txMf+sDqfwEPpB5jBt2E=; b=Ux6Uw4aYtjRCo5VrTpxc6TdqkAP5gAb62/c6Pz25PmRj3itEGsIGbV9c3LzI1xxsQt ZV8EsUR4iO1IgUiWUj+CY1Wp8FyP5L/SDS/qF8feMnS3hfmFp1/jF3yUIDM8+QzQvrPm EZva3+VsbtyVzWaTnhBvMmCHWy+0Fpu0reLFb8AJHIAadoGdoTybwJgpFjNNDCdRwSjK iSb5c6TD7G2dZJr9zuVSplU9t0lnZ7nL25459kjkAVnLO2wNm8P0kJ3RMlQNbjigUCZV Gz7jrtapmOG9Xd6ZopAVYTH/N7SoaSmp2p9m/IOlktY/s0/fKkBC9tOuyJpctCqw0ozO Q4Ug== X-Gm-Message-State: AOAM530+FB9E4xGyw33M/xhAINunf1stn3VPOC91u6DZAzQUwtKYKplL NtPjchcOGNh5kvFE3MrjPY4TUw== X-Received: by 2002:a17:906:72d1:: with SMTP id m17mr4407947ejl.118.1615392015229; Wed, 10 Mar 2021 08:00:15 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id q20sm10259207ejs.41.2021.03.10.08.00.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:10 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id BC7DD1FF9B; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 12/15] docs: add some documentation for the guest-loader Date: Wed, 10 Mar 2021 15:59:59 +0000 Message-Id: <20210310160002.11659-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alex Bennée Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org> -- 2.20.1 diff --git a/docs/system/guest-loader.rst b/docs/system/guest-loader.rst new file mode 100644 index 0000000000..37d03cbd89 --- /dev/null +++ b/docs/system/guest-loader.rst @@ -0,0 +1,54 @@ +.. + Copyright (c) 2020, Linaro + +Guest Loader +------------ + +The guest loader is similar to the `generic-loader` although it is +aimed at a particular use case of loading hypervisor guests. This is +useful for debugging hypervisors without having to jump through the +hoops of firmware and boot-loaders. + +The guest loader does two things: + + - load blobs (kernels and initial ram disks) into memory + - sets platform FDT data so hypervisors can find and boot them + +This is what is typically done by a boot-loader like grub using it's +multi-boot capability. A typical example would look like: + +.. parsed-literal:: + + |qemu_system| -kernel ~/xen.git/xen/xen \ + -append "dom0_mem=1G,max:1G loglvl=all guest_loglvl=all" \ + -device guest-loader,addr=0x42000000,kernel=Image,bootargs="root=/dev/sda2 ro console=hvc0 earlyprintk=xen" \ + -device guest-loader,addr=0x47000000,initrd=rootfs.cpio + +In the above example the Xen hypervisor is loaded by the -kernel +parameter and passed it's boot arguments via -append. The Dom0 guest +is loaded into the areas of memory. Each blob will get +`/chosen/module@` entry in the FDT to indicate it's location and +size. Additional information can be passed with by using additional +arguments. + +Currently the only supported machines which use FDT data to boot are +the ARM and RiscV `virt` machines. + +Arguments +^^^^^^^^^ + +The full syntax of the guest-loader is:: + + -device guest-loader,addr=[,kernel=,[bootargs=]][,initrd=] + +``addr=`` + This is mandatory and indicates the start address of the blob. + +``kernel|initrd=`` + Indicates the filename of the kernel or initrd blob. Both blobs will + have the "multiboot,module" compatibility string as well as + "multiboot,kernel" or "multiboot,ramdisk" as appropriate. + +``bootargs=`` + This is an optional field for kernel blobs which will pass command + like via the `/chosen/module@/bootargs` node. diff --git a/docs/system/index.rst b/docs/system/index.rst index cee1c83540..6ad9c93806 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -26,6 +26,7 @@ Contents: ivshmem linuxboot generic-loader + guest-loader vnc-security tls gdb diff --git a/MAINTAINERS b/MAINTAINERS index a1170bad5a..2ad004fed5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2026,6 +2026,7 @@ Guest Loader M: Alex Bennée S: Maintained F: hw/core/guest-loader.c +F: docs/system/guest-loader.rst Intel Hexadecimal Object File Loader M: Su Hang From patchwork Wed Mar 10 16:00:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396751 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp499949jai; Wed, 10 Mar 2021 08:08:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJxs6w2tDQ1yATynqzOzhzxysK194a2BOlgexyX5B22rkPjit5LzG7W6dAX1swuzw4Um4hUu X-Received: by 2002:a1f:8f17:: with SMTP id r23mr2052539vkd.2.1615392508208; Wed, 10 Mar 2021 08:08:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615392508; cv=none; d=google.com; s=arc-20160816; b=Xd41KPn/IugoQLetK3IGlYKopC1LYmAOe3Y37kIRiG6zA/ed/8nrZbXKZD8FwAEcid ttRrdZczGJ0Td9jmYK+XcDRrht53NBF1Cd+EvRZ2++538KEf0/W8RzLnaqonJprWIoyK n42KT3TSAhbpKsVaMZPZBBe5CDjDBD7iYkF8EeG967U72ln/lcBl+dWEcVjSIn9lKQkn X1dM2jbrR7E6t9bEG31mXbP/fF9lG2cg4hRJAxsZ3m9AAnkD0EeUVuiAT8eRcSsIiDSj T4zkG9bm3eooFWutYUbfXxFMoHP61EgFfDRv0aiJ1KkUhML1z+sQUchovJKxI83Q3cHo NW2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pvLRFhKRZ46zoLGE2Of04xq5NWvYqMo8l3LmqWGUFBQ=; b=bMOmKpFIOqDQMtGPmZKN7CWPHIWhK6PhugDd8MHIONd35ftwf756/9i6hwgonEicPp 27WDpClRff0LcFccsyF6NwhKovr/GIDI6IsJhNICU46oV/NyFLMbYSjBHC8nPI1dgQ35 wzG6kf2xoOCkygWmB+i8P23uTk15c8z5PpIkcX8702Kog4bVv4YyrXPnF0WG/gMZG14p XqXZX9GWotVHcSIlrM+7vWm1CO03ISPZmQdzFMbUbCzUfdUuuiAw3zcijk3MBGX5GC7T O0FvcrAjmrQmf1uWWgDipFGAgljcmW8AU4Lkqahcz36vmvaqOEyoR1oiXDOC4TeR6jft tLkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IwK8gjMn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m22si3666271vkf.39.2021.03.10.08.08.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:08:28 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=IwK8gjMn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34294 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1Nr-0000pn-FM for patch@linaro.org; Wed, 10 Mar 2021 11:08:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34654) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1G5-0004gH-UR for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:25 -0500 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]:39674) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1G3-0002kh-QZ for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:25 -0500 Received: by mail-ej1-x62b.google.com with SMTP id p7so28324902eju.6 for ; Wed, 10 Mar 2021 08:00:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pvLRFhKRZ46zoLGE2Of04xq5NWvYqMo8l3LmqWGUFBQ=; b=IwK8gjMnOpzsE2avGNlBQ5w7FERzLBKlt+MKY4ckwx+ztKXQKA0q2XQhOMOqp0LRPC 3y3M9Pwdmh/iYNsQg3scHK5lTjUwER1XCoCwv8zW0ziKRQcQEvCmltDSI/eyLFPNPJ0A SOuDH2Oglx5EzM+YDmUCRM0zHtdBRS6Z0mPUNC162FFxWA2wyShrD09galSqFsh3/Bvi UelD45/gQIOfckOVeJ0qJYrvWPZ7G3WNZHMU5+OueKBVZDMdk07MAIw/zFvYu9dLnkAQ 2F9fVDjMW8QCtsNO6nHe/0NgWMj6EoY/d11gm0Z4zBSJDHElmoS51oz/yE2Ctm1S8cJm 7hqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pvLRFhKRZ46zoLGE2Of04xq5NWvYqMo8l3LmqWGUFBQ=; b=FM3TebXA8wsNlubBgSbVxoHjsH7ilDG0Bcn0HQk+/YNO0HOZVsRy52o/RzeLEIWkhi HKmtMWiNnp0gnVvZBO6feCGU3pnCCsVUYABFF2y+2Xxv0qMF8AmEK/b195s/2nSVwHmn iVlMOLrJBVqaEfPtXkxT4x/hJ5Z6YVeruM2uUKG27fE2TQDE8mwm3uQyylDvvG47SMi5 oMsBmoBD7S0hdzogDNbqHOQFIeALbHiN9SYRZcChFokv92l9m75kjB0zGI0YNTEZmTFt 1uI2GiBtlXVZ7dgzMwomIHSEcYjIH2+HLcOM+qXb472AuT2vhuRNki0KcpdO51PMaU3j YT9A== X-Gm-Message-State: AOAM530M3XPueFKwark5/AJJJ52SlfVAFkCrnvJFEuCI8vBSCkrGSxoO Q6Rz0ivb78MNJp0A4cC1Ai/mTA== X-Received: by 2002:a17:906:f44:: with SMTP id h4mr4375981ejj.204.1615392021038; Wed, 10 Mar 2021 08:00:21 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id jv19sm10355768ejc.74.2021.03.10.08.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:12 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id D3E941FF9C; Wed, 10 Mar 2021 16:00:03 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 13/15] tests/avocado: add boot_xen tests Date: Wed, 10 Mar 2021 16:00:00 +0000 Message-Id: <20210310160002.11659-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , qemu-devel@nongnu.org, Cleber Rosa , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These tests make sure we can boot the Xen hypervisor with a Dom0 kernel using the guest-loader. We currently have to use a kernel I built myself because there are issues using the Debian kernel images. Signed-off-by: Alex Bennée Tested-by: Cleber Rosa Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Cleber Rosa Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org> -- 2.20.1 diff --git a/MAINTAINERS b/MAINTAINERS index 2ad004fed5..ea200aae1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2027,6 +2027,7 @@ M: Alex Bennée S: Maintained F: hw/core/guest-loader.c F: docs/system/guest-loader.rst +F: tests/acceptance/boot_xen.py Intel Hexadecimal Object File Loader M: Su Hang diff --git a/tests/acceptance/boot_xen.py b/tests/acceptance/boot_xen.py new file mode 100644 index 0000000000..75c2d44492 --- /dev/null +++ b/tests/acceptance/boot_xen.py @@ -0,0 +1,118 @@ +# Functional test that boots a Xen hypervisor with a domU kernel and +# checks the console output is vaguely sane . +# +# Copyright (c) 2020 Linaro +# +# Author: +# Alex Bennée +# +# SPDX-License-Identifier: GPL-2.0-or-later +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. + +import os + +from avocado import skipIf +from avocado_qemu import wait_for_console_pattern +from boot_linux_console import LinuxKernelTest + + +class BootXenBase(LinuxKernelTest): + """ + Boots a Xen hypervisor with a Linux DomU kernel. + """ + + timeout = 90 + XEN_COMMON_COMMAND_LINE = 'dom0_mem=128M loglvl=all guest_loglvl=all' + + def fetch_guest_kernel(self): + # Using my own built kernel - which works + kernel_url = ('https://fileserver.linaro.org/' + 's/JSsewXGZ6mqxPr5/download?path=%2F&files=' + 'linux-5.9.9-arm64-ajb') + kernel_sha1 = '4f92bc4b9f88d5ab792fa7a43a68555d344e1b83' + kernel_path = self.fetch_asset(kernel_url, + asset_hash=kernel_sha1) + + return kernel_path + + def launch_xen(self, xen_path): + """ + Launch Xen with a dom0 guest kernel + """ + self.log.info("launch with xen_path: %s", xen_path) + kernel_path = self.fetch_guest_kernel() + + self.vm.set_console() + + xen_command_line = self.XEN_COMMON_COMMAND_LINE + self.vm.add_args('-machine', 'virtualization=on', + '-cpu', 'cortex-a57', + '-m', '768', + '-kernel', xen_path, + '-append', xen_command_line, + '-device', + 'guest-loader,addr=0x47000000,kernel=%s,bootargs=console=hvc0' + % (kernel_path)) + + self.vm.launch() + + console_pattern = 'VFS: Cannot open root device' + wait_for_console_pattern(self, console_pattern, "Panic on CPU 0:") + + +class BootXen(BootXenBase): + + def test_arm64_xen_411_and_dom0(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=accel:tcg + :avocado: tags=cpu:cortex-a57 + :avocado: tags=machine:virt + """ + + # archive of file from https://deb.debian.org/debian/pool/main/x/xen/ + xen_url = ('https://fileserver.linaro.org/s/JSsewXGZ6mqxPr5/' + 'download?path=%2F&files=' + 'xen-hypervisor-4.11-arm64_4.11.4%2B37-g3263f257ca-1_arm64.deb') + xen_sha1 = '034e634d4416adbad1212d59b62bccdcda63e62a' + xen_deb = self.fetch_asset(xen_url, asset_hash=xen_sha1) + xen_path = self.extract_from_deb(xen_deb, "/boot/xen-4.11-arm64") + + self.launch_xen(xen_path) + + def test_arm64_xen_414_and_dom0(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=accel:tcg + :avocado: tags=cpu:cortex-a57 + :avocado: tags=machine:virt + """ + + # archive of file from https://deb.debian.org/debian/pool/main/x/xen/ + xen_url = ('https://fileserver.linaro.org/s/JSsewXGZ6mqxPr5/' + 'download?path=%2F&files=' + 'xen-hypervisor-4.14-arm64_4.14.0%2B80-gd101b417b7-1_arm64.deb') + xen_sha1 = 'b9d209dd689ed2b393e625303a225badefec1160' + xen_deb = self.fetch_asset(xen_url, asset_hash=xen_sha1) + xen_path = self.extract_from_deb(xen_deb, "/boot/xen-4.14-arm64") + + self.launch_xen(xen_path) + + def test_arm64_xen_415_and_dom0(self): + """ + :avocado: tags=arch:aarch64 + :avocado: tags=accel:tcg + :avocado: tags=cpu:cortex-a57 + :avocado: tags=machine:virt + """ + + xen_url = ('https://fileserver.linaro.org/' + 's/JSsewXGZ6mqxPr5/download' + '?path=%2F&files=xen-upstream-4.15-unstable.deb') + xen_sha1 = 'fc191172b85cf355abb95d275a24cc0f6d6579d8' + xen_deb = self.fetch_asset(xen_url, asset_hash=xen_sha1) + xen_path = self.extract_from_deb(xen_deb, "/boot/xen-4.15-unstable") + + self.launch_xen(xen_path) From patchwork Wed Mar 10 16:00:01 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id o185si888422vso.69.2021.03.10.08.30.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:30:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KWEBTO+N; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34078 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1ii-0000Uk-3a for patch@linaro.org; Wed, 10 Mar 2021 11:30:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34810) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1GL-0004lF-8t for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:41 -0500 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]:41668) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1GC-0002on-I4 for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:40 -0500 Received: by mail-ej1-x629.google.com with SMTP id lr13so39747438ejb.8 for ; Wed, 10 Mar 2021 08:00:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fqx1PjpE4XdyU4ueylmX46qPILJ9vFmxxsMgOHJktxM=; b=KWEBTO+N/vgdqjnFiw41riW3em16KvyowI3/h+HM8n1RN5IT5ZZRKkCGjYO7w7WjAg tE+8EQBR5vr8lZmnwdpkQJtp/KnH1Ab8oGBeIXdkq4zcOqusX1JKZXUFyJnSGQaTc5/x JMrCFN5Oe8kt/g+gesuDOcjmMnMgUQS668dUS6YJ9Z9s3j1vweL8fSaZgU6LrUb0JB5i 52oXHJxXT9Pg2pN12RuDsG9lGVAYxCJmYfY48qFIKOI0PPkNObTCQtbFVK7Ob9m/w++Y 4wpfAMeCLnFrnLwGZcqVGvZyP521/KGB5mnCpJlIXRR+lMUfYnw+0Z+N3y7Y6CtwTmwp CHww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fqx1PjpE4XdyU4ueylmX46qPILJ9vFmxxsMgOHJktxM=; b=OcU/l9LLgRemYcMgF/wmHu+oxnwmqqsLnpU3MKAj97V84QSOygmjbvbamTvCU55V8V Qkbyk5oVoJfORpOjJaDhgkhPBn0HJN9Tj90FOWWovGx5Y49EtmwDmgbv06Rho6tgjbEm mbqFipT5AAWCkvH/sZTaqJuIImUsHpGgA4UQrH5g9bUJvRG2qw7C2STtQbXEQENiOjRA ZUNspxKHbUs69e582CWUAkFfPMgUch3Pu2A71EeIV1b08gnSdwk25UdkfCHWp1yIPWfG HT0Prs26yLcYF7M0Sk9fzkbJBvwx1anbzHtWFItsqXDRM8aPt/RiGLrCW92CvuWpQb1k jQKw== X-Gm-Message-State: AOAM532u0hrXWIkOskvn7oAja2PvOhjNxeHs9SATDbtgDPXfXHkTQpx2 p+DkLRIKUFM6hII80w9ktkkUyg== X-Received: by 2002:a17:906:23e9:: with SMTP id j9mr4293381ejg.78.1615392022442; Wed, 10 Mar 2021 08:00:22 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id m14sm3216867edr.13.2021.03.10.08.00.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:13 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 2629E1FF9D; Wed, 10 Mar 2021 16:00:04 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 14/15] semihosting: Move include/hw/semihosting/ -> include/semihosting/ Date: Wed, 10 Mar 2021 16:00:01 +0000 Message-Id: <20210310160002.11659-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Aleksandar Rikalo , "open list:RISC-V TCG CPUs" , Sagar Karandikar , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , Chris Wulff , qemu-devel@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Max Filippov , Michael Walle , "open list:ARM TCG CPUs" , Palmer Dabbelt , Bastian Koppelmann , Paolo Bonzini , Alistair Francis , Guan Xuetao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Laurent Vivier Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org> -- 2.20.1 diff --git a/include/hw/semihosting/console.h b/include/semihosting/console.h similarity index 100% rename from include/hw/semihosting/console.h rename to include/semihosting/console.h diff --git a/include/hw/semihosting/semihost.h b/include/semihosting/semihost.h similarity index 100% rename from include/hw/semihosting/semihost.h rename to include/semihosting/semihost.h diff --git a/gdbstub.c b/gdbstub.c index 16d7c8f534..7a4cc07584 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -49,7 +49,7 @@ #include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "sysemu/runstate.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/exec-all.h" #include "sysemu/replay.h" diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9afc0b427b..26e7b1bd9f 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -58,7 +58,7 @@ #include "qemu/error-report.h" #include "hw/misc/empty_slot.h" #include "sysemu/kvm.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "hw/mips/cps.h" #include "hw/qdev-clock.h" diff --git a/hw/semihosting/arm-compat-semi.c b/hw/semihosting/arm-compat-semi.c index 23c6e3edcb..94950b6c56 100644 --- a/hw/semihosting/arm-compat-semi.c +++ b/hw/semihosting/arm-compat-semi.c @@ -34,9 +34,9 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" +#include "semihosting/common-semi.h" #include "qemu/log.h" #include "qemu/timer.h" #ifdef CONFIG_USER_ONLY diff --git a/hw/semihosting/config.c b/hw/semihosting/config.c index 9807f10cb0..3548e0f627 100644 --- a/hw/semihosting/config.c +++ b/hw/semihosting/config.c @@ -22,7 +22,7 @@ #include "qemu/option.h" #include "qemu/config-file.h" #include "qemu/error-report.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "chardev/char.h" #include "sysemu/sysemu.h" diff --git a/hw/semihosting/console.c b/hw/semihosting/console.c index 9b4fee9260..c9ebd6fdd0 100644 --- a/hw/semihosting/console.c +++ b/hw/semihosting/console.c @@ -17,8 +17,8 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" #include "exec/gdbstub.h" #include "exec/exec-all.h" #include "qemu/log.h" diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 7c42f65706..ee72a1c20f 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -22,7 +22,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "qemu/guest-random.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #include "target/arm/syndrome.h" #define get_user_code_u32(x, gaddr, env) \ diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index cadfb7fa43..989d03cd89 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -22,7 +22,7 @@ #include "qemu.h" #include "elf.h" #include "cpu_loop-common.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #define get_user_code_u32(x, gaddr, env) \ ({ abi_long __r = get_user_u32((x), (gaddr)); \ diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 9665dabb09..6767f941e8 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -23,7 +23,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "elf.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" void cpu_loop(CPURISCVState *env) { diff --git a/linux-user/semihost.c b/linux-user/semihost.c index c0015ee7f6..82013b8b48 100644 --- a/linux-user/semihost.c +++ b/linux-user/semihost.c @@ -12,7 +12,7 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "hw/semihosting/console.h" +#include "semihosting/console.h" #include "qemu.h" #include diff --git a/softmmu/vl.c b/softmmu/vl.c index ff488ea3e7..b7673b9613 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -108,7 +108,7 @@ #include "qapi/opts-visitor.h" #include "qapi/clone-visitor.h" #include "qom/object_interfaces.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "crypto/init.h" #include "sysemu/replay.h" #include "qapi/qapi-events-run-state.h" diff --git a/stubs/semihost.c b/stubs/semihost.c index 1d8b37f7b2..1b30f38b03 100644 --- a/stubs/semihost.c +++ b/stubs/semihost.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" #include "qemu/option.h" #include "qemu/error-report.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/sysemu.h" /* Empty config */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 904b0927cd..d9220be7c5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -22,7 +22,7 @@ #include "exec/exec-all.h" #include /* For crc32 */ #include "hw/irq.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/cpus.h" #include "sysemu/cpu-timers.h" #include "sysemu/kvm.h" @@ -34,7 +34,7 @@ #ifdef CONFIG_TCG #include "arm_ldst.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #endif #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 731c435c00..d63ae465e1 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -21,7 +21,7 @@ #include "qemu/qemu-print.h" #include "exec/exec-all.h" #include /* For crc32 */ -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/cpus.h" #include "sysemu/kvm.h" #include "qemu/range.h" @@ -31,7 +31,7 @@ #ifdef CONFIG_TCG #include "arm_ldst.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #endif static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask, diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b591f096df..0b42e53500 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -28,7 +28,7 @@ #include "internals.h" #include "qemu/host-utils.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/gen-icount.h" #include "exec/helper-proto.h" diff --git a/target/arm/translate.c b/target/arm/translate.c index 1653cca1aa..62b1c2081b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -29,7 +29,7 @@ #include "qemu/log.h" #include "qemu/bitops.h" #include "arm_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 7c52ae76d6..01cc3c53a5 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -21,7 +21,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/log.h" bool lm32_cpu_tlb_fill(CPUState *cs, vaddr address, int size, diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 202498deb5..730cdf7744 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -21,7 +21,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #if defined(CONFIG_USER_ONLY) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bf70c77295..bd4dca571f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -31,7 +31,7 @@ #include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "qapi/qapi-commands-machine-target.h" #include "fpu_helper.h" diff --git a/target/mips/mips-semi.c b/target/mips/mips-semi.c index 898251aa02..6de60fa6dd 100644 --- a/target/mips/mips-semi.c +++ b/target/mips/mips-semi.c @@ -22,8 +22,8 @@ #include "qemu/log.h" #include "exec/helper-proto.h" #include "exec/softmmu-semi.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" typedef enum UHIOp { UHI_exit = 1, diff --git a/target/mips/translate.c b/target/mips/translate.c index 70891c37cd..0b6d82d228 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -29,7 +29,7 @@ #include "exec/translator.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "target/mips/trace.h" #include "trace-tcg.h" diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 57c97bde3c..53be8398e9 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -26,7 +26,7 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "exec/helper-proto.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #if defined(CONFIG_USER_ONLY) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 2f43939fb6..83a6bcfad0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -24,7 +24,7 @@ #include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "trace.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) { diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c index 54c26871fe..704393c27f 100644 --- a/target/unicore32/helper.c +++ b/target/unicore32/helper.c @@ -14,7 +14,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" -#include "hw/semihosting/console.h" +#include "semihosting/console.h" #undef DEBUG_UC32 diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 944a157747..0ae4efc48a 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -37,7 +37,7 @@ #include "qemu/log.h" #include "qemu/qemu-print.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/translator.h" #include "exec/helper-proto.h" diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index 25f57a6500..79f2b043f2 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -29,7 +29,7 @@ #include "cpu.h" #include "chardev/char-fe.h" #include "exec/helper-proto.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "qapi/error.h" #include "qemu/log.h" diff --git a/MAINTAINERS b/MAINTAINERS index ea200aae1d..c5ff881892 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3250,7 +3250,7 @@ Semihosting M: Alex Bennée S: Maintained F: hw/semihosting/ -F: include/hw/semihosting/ +F: include/semihosting/ Multi-process QEMU M: Elena Ufimtseva From patchwork Wed Mar 10 16:00:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396770 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp521586jai; Wed, 10 Mar 2021 08:36:42 -0800 (PST) X-Google-Smtp-Source: ABdhPJw4tVHpy6U9LmbXlPSejomBaodLZf8ocLF7KqD+gQC2j5k35oyncJXgBn9vXAskDxpERWXk X-Received: by 2002:a9f:262b:: with SMTP id 40mr2464732uag.20.1615394202541; Wed, 10 Mar 2021 08:36:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615394202; cv=none; d=google.com; s=arc-20160816; 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[209.51.188.17]) by mx.google.com with ESMTPS id x10si3026395vsk.138.2021.03.10.08.36.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Mar 2021 08:36:42 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=CqsQknLH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42770 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lK1pB-0004du-RL for patch@linaro.org; Wed, 10 Mar 2021 11:36:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34820) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK1GM-0004lv-62 for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:42 -0500 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]:46160) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lK1GC-0002pU-IS for qemu-devel@nongnu.org; Wed, 10 Mar 2021 11:00:41 -0500 Received: by mail-ej1-x62f.google.com with SMTP id r17so39677106ejy.13 for ; Wed, 10 Mar 2021 08:00:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wCThXbMA7Fymd9SdnPM7KHKkPElYc6GGZP5jhClwnG8=; b=CqsQknLHM/RcYusFg9EOkS1/stQ/uotXUZWgIYCaIrmWnxOMLH1rlrsNHyp35+G7cZ 0VbojtyX9yqct++7ALvMaxqDfshjsFoNShRTqqc9MW/VVSgfWsMG51Zri+QITVohVS0I b+YrCjlOgqPzNPyDQDT+V2AZGbt+WiHToMYRlFLWrbW33pdUe5/RIfRXfX8XhMyuO8Cg /1QUrLI2TIAr1Wbzp5OsP8gakrkYoEtBMsDyy1wbgW7lzxmHcMVrZw1JP+j7g4GOgrVH +uU4Lq6CfHJXa3VQy0WUhvH7fVLd1paIL7DZDAS2vFkNUde6dQgl5S6zmSjNVhfcvyk3 smtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wCThXbMA7Fymd9SdnPM7KHKkPElYc6GGZP5jhClwnG8=; b=GPJvEqPnUHPy4Z6xy8idNwf0kaxHsAt45t1S9xNEqPbdYvNnc2xs25ApIN2Jhf6jD9 UvMVEn57LauUxOYreVwhMJxnDsXhM9m4ur7LWOsW/XawMv+gWLlwMJelRhbUbumPiM70 ExA4wM7u6wUk6cXOA+uZw18pY3UT1ZraRg6SPsW3CTVqCXfpHmMxKczXS5KuIabY1vf6 gI2+R2ipyHSTcXIP+hT44JDrzQeo/4LrscbVBjRrBbh+prekiPZPTyp9p6XWsp3AOI6A uTtC/uTgfrAgdVrA31s4GEiboC3bdizRKb/i/fjMKb0LuxUEA0aP4Cj2tDz4ey47KEt8 rJEA== X-Gm-Message-State: AOAM5311DEn4wgpRURBpryqn39Op0Vc2Rdoytka6SKVm9/aM05us24bU Q80S5WYyvI69SNXKxiUQLMoUVw== X-Received: by 2002:a17:906:3ac3:: with SMTP id z3mr4502580ejd.106.1615392023221; Wed, 10 Mar 2021 08:00:23 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id m7sm10164219ejk.52.2021.03.10.08.00.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:20 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 436381FF9E; Wed, 10 Mar 2021 16:00:04 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 15/15] semihosting: Move hw/semihosting/ -> semihosting/ Date: Wed, 10 Mar 2021 16:00:02 +0000 Message-Id: <20210310160002.11659-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé With the exception of hw/core/, the hw/ directory only contains device models used in system emulation. Semihosting is also used by user emulation. As a generic feature, move it out of hw/ directory. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20210226131356.3964782-3-f4bug@amsat.org> Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org> -- 2.20.1 diff --git a/meson.build b/meson.build index adeec153d9..a7d2dd429d 100644 --- a/meson.build +++ b/meson.build @@ -1951,6 +1951,7 @@ subdir('migration') subdir('monitor') subdir('net') subdir('replay') +subdir('semihosting') subdir('hw') subdir('accel') subdir('plugins') diff --git a/hw/semihosting/common-semi.h b/semihosting/common-semi.h similarity index 100% rename from hw/semihosting/common-semi.h rename to semihosting/common-semi.h diff --git a/hw/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c similarity index 100% rename from hw/semihosting/arm-compat-semi.c rename to semihosting/arm-compat-semi.c diff --git a/hw/semihosting/config.c b/semihosting/config.c similarity index 100% rename from hw/semihosting/config.c rename to semihosting/config.c diff --git a/hw/semihosting/console.c b/semihosting/console.c similarity index 100% rename from hw/semihosting/console.c rename to semihosting/console.c diff --git a/Kconfig b/Kconfig index bf694c42af..d52ebd839b 100644 --- a/Kconfig +++ b/Kconfig @@ -2,3 +2,4 @@ source Kconfig.host source backends/Kconfig source accel/Kconfig source hw/Kconfig +source semihosting/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index c5ff881892..3456993062 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3249,7 +3249,7 @@ F: qapi/rdma.json Semihosting M: Alex Bennée S: Maintained -F: hw/semihosting/ +F: semihosting/ F: include/semihosting/ Multi-process QEMU diff --git a/hw/Kconfig b/hw/Kconfig index 8ea26479c4..ff40bd3f7b 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -31,7 +31,6 @@ source remote/Kconfig source rtc/Kconfig source scsi/Kconfig source sd/Kconfig -source semihosting/Kconfig source smbios/Kconfig source ssi/Kconfig source timer/Kconfig diff --git a/hw/meson.build b/hw/meson.build index e615d72d4d..8ba79b1a52 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -30,7 +30,6 @@ subdir('rdma') subdir('rtc') subdir('scsi') subdir('sd') -subdir('semihosting') subdir('smbios') subdir('ssi') subdir('timer') diff --git a/hw/semihosting/Kconfig b/semihosting/Kconfig similarity index 100% rename from hw/semihosting/Kconfig rename to semihosting/Kconfig diff --git a/hw/semihosting/meson.build b/semihosting/meson.build similarity index 100% rename from hw/semihosting/meson.build rename to semihosting/meson.build