From patchwork Wed Mar 10 15:45:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46C05C433E6 for ; Wed, 10 Mar 2021 15:47:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 161D864F9B for ; Wed, 10 Mar 2021 15:47:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231313AbhCJPql (ORCPT ); Wed, 10 Mar 2021 10:46:41 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:43734 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232978AbhCJPqO (ORCPT ); Wed, 10 Mar 2021 10:46:14 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk9DH117219; Wed, 10 Mar 2021 09:46:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391169; bh=kDesQPQvYRjN7JUDLg1aWRBB+2K3tXaBtJ48Qzz8gLs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Zi6dQLKl6hZG0nmUE3w9cjvn9uXtDX96sMMcPbc3IrJGcUHsMNfG7aXdRZLM46/H1 kV1tnA3wZv3WRc4dMVFKU44h7ojzr1biWXOBHeS4VVj1CSsQ2p5/2YQx2apme/HZzu UJrT+QDWwMyz2g+oatw0ARx07fyt/ayW173wVb+0= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFk9YI031399 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:09 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:08 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:08 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KP066370; Wed, 10 Mar 2021 09:46:06 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla , Subject: [PATCH v6 01/13] phy: cadence: Sierra: Fix PHY power_on sequence Date: Wed, 10 Mar 2021 21:15:46 +0530 Message-ID: <20210310154558.32078-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Commit 44d30d622821d ("phy: cadence: Add driver for Sierra PHY") de-asserts PHY_RESET even before the configurations are loaded in phy_init(). However PHY_RESET should be de-asserted only after all the configurations has been initialized, instead of de-asserting in probe. Fix it here. Fixes: 44d30d622821d ("phy: cadence: Add driver for Sierra PHY") Signed-off-by: Kishon Vijay Abraham I Cc: # v5.4+ Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 26a0badabe38..19f32ae877b9 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -319,6 +319,12 @@ static int cdns_sierra_phy_on(struct phy *gphy) u32 val; int ret; + ret = reset_control_deassert(sp->phy_rst); + if (ret) { + dev_err(dev, "Failed to take the PHY out of reset\n"); + return ret; + } + /* Take the PHY lane group out of reset */ ret = reset_control_deassert(ins->lnk_rst); if (ret) { @@ -616,7 +622,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) pm_runtime_enable(dev); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); - reset_control_deassert(sp->phy_rst); return PTR_ERR_OR_ZERO(phy_provider); put_child: From patchwork Wed Mar 10 15:45:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396731 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483323jai; Wed, 10 Mar 2021 07:47:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJyoq6iyKRpIEgtuRvvnzWEXkg7zUBflNY68jzyvNI7IVCmiVTi62hu8IFeRx4GgOAbvQaQ4 X-Received: by 2002:a17:907:94cc:: with SMTP id dn12mr4313350ejc.177.1615391236805; Wed, 10 Mar 2021 07:47:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391236; cv=none; d=google.com; s=arc-20160816; b=r78+qZC2oybB9AxyilTlEBCnzkNnzquhBYd22EZD1IPkg5ICVZZv0/FPYZ3YT2rrTP Js3pbNIbX94aEIkRRYvG0ZSBC4r8vZmTX1SM2zqz1hwaucgpmiMULpG0jFFHfKImc4eF lfZvudLotPuZC/GkL+Pb3xlUNL/eifl/u0JuS5C4pzUME37AFBZu3JLKfNVbT5bV8/jR 2oZ7BrBxC1VPAmVnK+Y0e/AvtNrEoK6dnAfRhdJ2hpKWqZDfsngk70Y4PtQ8fJkBximf Goi+Ai3aPJlbDaAOX3qYW9pHOldWP0sKpJY4SF/yjCqyPRaKDaXhytp98sEx+nlIawpG XjwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=2gdcGvIiei2/gTTob5OagdVE47Jl6d4UbQfoaMc8G3o=; b=R2vlX8auOjbLopoiS/2uk2TJKA3ADf2TUzeHZKwLWCs4gBmcEKAdZhUfIWAyOL1a7T y+US5ouJWSBJhXssB4hineNTaTAPqJYxetWB68oNbQe9/05y96619QqtjKb7ebclplL8 ibmMMW++cce2R4MmgkIWavsqWVNx51KNgf/KVR206oonaatrL2gRnEZ7zblNCR/yHFwb XeQXDOMn2Fh1zVV5EU4rVAQ/TX0cOgb9j/yXEnZNctffFtKnnn/HNnj1Z/9+XN0/yLxN LHfNI1CVv5nNpBEd+Eu2pofyG5wKKVWhM3kd4qr0ZiO32csbag+a9lXKPjvmfTMYkIOu aJSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hDaYAA+8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.16; Wed, 10 Mar 2021 07:47:16 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hDaYAA+8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233201AbhCJPqm (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:42 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47664 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233205AbhCJPqR (ORCPT ); Wed, 10 Mar 2021 10:46:17 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkCt1067667; Wed, 10 Mar 2021 09:46:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391172; bh=2gdcGvIiei2/gTTob5OagdVE47Jl6d4UbQfoaMc8G3o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hDaYAA+8ww9K8mcW6QMAVJIkcpN+ntIKmBN21FmEC4vKyyHvCH+zCbTBtyytAPHp8 EXx6HBe+ioTE92ikx/Y09kOOn1OXx0C1c8Jo7ZSnYz/tzxCGOKSS8bL+9/cBFJA/wJ 2GP91oXYflfWDgW5NwO+0tTz/HnkOPfby2RPRqcA= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkCpb046054 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:12 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:12 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:12 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KQ066370; Wed, 10 Mar 2021 09:46:09 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla , Subject: [PATCH v6 02/13] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create() Date: Wed, 10 Mar 2021 21:15:47 +0530 Message-ID: <20210310154558.32078-3-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Invoke wiz_init() before configuring anything else in Sierra/Torrent (invoked as part of of_platform_device_create()). wiz_init() resets the SERDES device and any configuration done in the probe() of Sierra/Torrent will be lost. In order to prevent SERDES configuration from getting reset, invoke wiz_init() immediately before invoking of_platform_device_create(). Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I Cc: # v5.10 --- drivers/phy/ti/phy-j721e-wiz.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 995c7dbec77b..1bb73822f44a 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1262,27 +1262,24 @@ static int wiz_probe(struct platform_device *pdev) goto err_get_sync; } + ret = wiz_init(wiz); + if (ret) { + dev_err(dev, "WIZ initialization failed\n"); + goto err_wiz_init; + } + serdes_pdev = of_platform_device_create(child_node, NULL, dev); if (!serdes_pdev) { dev_WARN(dev, "Unable to create SERDES platform device\n"); ret = -ENOMEM; - goto err_pdev_create; - } - wiz->serdes_pdev = serdes_pdev; - - ret = wiz_init(wiz); - if (ret) { - dev_err(dev, "WIZ initialization failed\n"); goto err_wiz_init; } + wiz->serdes_pdev = serdes_pdev; of_node_put(child_node); return 0; err_wiz_init: - of_platform_device_destroy(&serdes_pdev->dev, NULL); - -err_pdev_create: wiz_clock_cleanup(wiz, node); err_get_sync: From patchwork Wed Mar 10 15:45:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396730 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483314jai; Wed, 10 Mar 2021 07:47:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJwl/BaHFWSgKXpPlM0DLKjcz8SIUmtSNr38Y0K1zlfy00TfOwjilN7nvFo56Z8ZETHrJhWM X-Received: by 2002:a17:906:1a4b:: with SMTP id j11mr4383006ejf.55.1615391235929; Wed, 10 Mar 2021 07:47:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391235; cv=none; d=google.com; s=arc-20160816; b=aLrz//y1lzm63qiZJWEKlpC5s2N0DHk/qS01wmUFyM6weXGB77YG3u9AmuGYB+n0Bi 5YY1bBH+7YHEsn+drPlFMoscuZfsEJvvgl7F0/GZqzDjei4ZGYK3GrXNosvAUvldaaj+ mYwmw1l2kI8huQ/sx57j+RJp9bRnx3k/JHH7ayosuxmRewICZ/RsVMd+mxQ2FQnLJ/kd MdW+i4Y90qVZ2VTPP0WXdKTuJs3wJZRuHAbBF2VNG08cJUM7ViRi/TBNtZtn09tbeLV7 a4/qZ5gDJLpQzoOef67B+u3lBhi3Z9mFuc5mjDVFFDAtroOfrhHlNkiOY7+/WshanX4M eziA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=VxF8kGigCKqkh77tBFluIHDcpsujh9oOUvSPK2P6qiw=; b=AMrU7FD+6npy4Z4SOmnuCH2TJiSWSF3e03wJjJRfU5fimK5vU0RadFoqqT5X5pgnf/ F7EpMJuqwnR/k0wTDcBZPr0XnGihfaJDnU0P5dkL6U2WqaOdpfSfWKSNQ8IxyJLUa5bA gOie1DYo2IyxdrIcnLrUHSHMEAMJooW0gXhNXLW/Xl+M541RWk0ldCtMJHmvza4gtg12 ZGLbSvI7SX9njT0MzZC1r7CdIvIF3c0QVOer27FJbwAjhVrwT1ZMa9UFsleG1YA9X9DN csfGfkdiWMEASfQyoFYfy5KKV7b8KRzi3wLLbTGoJkTk/S92+qGVBQxql22iHTf4ebhe L5Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FZYWo8Cq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.15; Wed, 10 Mar 2021 07:47:15 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=FZYWo8Cq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232818AbhCJPqm (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:42 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47678 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233102AbhCJPqT (ORCPT ); Wed, 10 Mar 2021 10:46:19 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkFsV067674; Wed, 10 Mar 2021 09:46:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391175; bh=VxF8kGigCKqkh77tBFluIHDcpsujh9oOUvSPK2P6qiw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FZYWo8Cqx5kLgnbQT4sveJMcY16Ye10ZM4UYY/uP+oFL60ARP0kea9aq48mZDOeRi /1d/MpcYmmQgtMBOgCehfowHJfdsAhsDygxypUTFEUzInpTOp6nA7TosG7mQiOgKyp edX0Teq8WSe1/qIoQolc+OAAU87m16prEjGODGAw= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkFxa014586 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:15 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:15 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:15 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KR066370; Wed, 10 Mar 2021 09:46:12 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 03/13] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes Date: Wed, 10 Mar 2021 21:15:48 +0530 Message-ID: <20210310154558.32078-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cadence Sierra PHY driver registers PHY using devm_phy_create() for all sub-nodes of Sierra device tree node. However Sierra device tree node can have sub-nodes for the various clocks in addtion to the PHY. Use devm_phy_create() only for nodes with name "phy" (or "link" for old device tree) which represent the actual PHY. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 19f32ae877b9..f7ba0ed416bc 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -577,6 +577,10 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) for_each_available_child_of_node(dn, child) { struct phy *gphy; + if (!(of_node_name_eq(child, "phy") || + of_node_name_eq(child, "link"))) + continue; + sp->phys[node].lnk_rst = of_reset_control_array_get_exclusive(child); From patchwork Wed Mar 10 15:45:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396738 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483401jai; Wed, 10 Mar 2021 07:47:22 -0800 (PST) X-Google-Smtp-Source: ABdhPJy2fPB2rUstsRNS1uvMtw7RUok2omIq6zNanaxFFyPp5Hhs1V2HdOJ1gmJyX4HqJNw7GvYx X-Received: by 2002:a05:6402:3596:: with SMTP id y22mr4036504edc.207.1615391242807; Wed, 10 Mar 2021 07:47:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391242; cv=none; d=google.com; s=arc-20160816; b=qvskyKjoBqTc3kiQkESbf0JwbBSXei78UXHwA1OZuFpKKf4GIVlNBXf+0uIlnxXVOM 7t5cAGMHxipqdMdSQYBkvVowFQtWr1pluQsCZC3PeAZ8sF05uEvHwPPadgoCDjNE4PuF GDlsT9c9dt3FHC+JrTLKwHIVzfD5oglAgBl1G0GvJpGYmODgxGhMiTMW7S7wAnNFhhwf Nc6jctYQLPhbMJdv14bDVoqrM0+xVC8m/Gq8l2jeiVkqT4C4zasG6bI+JRqzpmiDtjW5 s2BBQCRtAQ9lS2TTl6upOY9uNCmbB6apuq3IT+D9VtDRPLyOQvNk99bXICR4xd+HZuXg NhXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=OsKa0EDwQKMOxN4rn2UsJ4wTaESxeSKXJwtpa+eVAPs=; b=q9i9RlFSvUmjP5+Q0PL0n5FyEiSTq58+e0SUASG2lZB2xwANQPm1yPZ7bNI74hI/zh +Qum7GRw3YRlm6BeEarZRBfkjIT2nlY+77j1sUNF82PAuC4Rr8UmwmMustHX+I3C7S9A QOEP0+ra/aO39q6tTlzn4ZXE/pE9qsKWFBPcklO3TloZ7vYY7loSimrHymBlEjNUV7Lv hWgTnT8/Bcs4SrrINQMudmvC4n5hsp09WwxHSBunNaLN1Snmi5HGClZKZ5Gq60GnUpPy cl6KcJMbzFHlbJcMgHdTV97Ft7+GN/MYdWfw9dx1/YyGy87G5FkBxaiqDOsG9TMq+txP M0SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AtZ3bIh+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.22; Wed, 10 Mar 2021 07:47:22 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AtZ3bIh+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233212AbhCJPqm (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:42 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:43792 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233219AbhCJPqX (ORCPT ); Wed, 10 Mar 2021 10:46:23 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkIfu117261; Wed, 10 Mar 2021 09:46:18 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391178; bh=OsKa0EDwQKMOxN4rn2UsJ4wTaESxeSKXJwtpa+eVAPs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=AtZ3bIh+10iAM0fNznHbBw845yGKpgVo6EJCd1H/v5rBVjZAOwqWEstKb6FHgGDaS UrynFz4tR41Z9P+zZb9Sr/X8XMjRl4yKhARUDnVI6jArytn985vi+bgShPRJR6GEZE mZvxlDFHGfHgH6ShRNormwBW+zzrj7iY5jdXBENw= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkIKE014694 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:18 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:18 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:18 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KS066370; Wed, 10 Mar 2021 09:46:15 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode Date: Wed, 10 Mar 2021 21:15:49 +0530 Message-ID: <20210310154558.32078-5-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org "serdes" node (child node of WIZ) can have sub-nodes for representing links or it can have sub-nodes for representing the various clocks within the serdes. Instead of trying to read "reg" from every child node used for assigning "lane_phy_type", read only if the child node's name is "phy" or "link" subnode. Ideally all PHY dt nodes should have node name as "phy", however existing devicetree used "link" as subnode. So in order to maintain old DT compatibility get PHY properties for "phy" or "link" subnode. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/ti/phy-j721e-wiz.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 1bb73822f44a..659597645201 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1102,6 +1102,10 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz) u32 reg, num_lanes = 1, phy_type = PHY_NONE; int ret, i; + if (!(of_node_name_eq(subnode, "phy") || + of_node_name_eq(subnode, "link"))) + continue; + ret = of_property_read_u32(subnode, "reg", ®); if (ret) { dev_err(dev, From patchwork Wed Mar 10 15:45:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396733 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483346jai; Wed, 10 Mar 2021 07:47:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJwpcu6UmslI5BNI9V4Lk/0W6XP4IG9/h4jsgb9irjxLwdEcg0FGR1YaVZkVBVTr3Y5cZ5l8 X-Received: by 2002:a05:6402:3495:: with SMTP id v21mr3998368edc.117.1615391238246; Wed, 10 Mar 2021 07:47:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391238; cv=none; d=google.com; s=arc-20160816; b=cy3PCXYAuG2wbABis3G82NR4wyeR2iQQrj+oZi/GD4qsNWJ7im2Cz/A/iqugF4aDPO 49SAKVJGyY2SinErQR6mVubQ4HIZ+E//Wk1Lmb75gmgY1KF94n+Wy2e+KibHg4l2I1N6 qRH2PwXoSc2YM6UL3ROpegVgsP374WpzR/wdEpC70JAMyK21vhpUWaNFHsAXOADd+w9t dPNo3xa4LqmV0nYA4n0H0BwM4uxjRYOja7HnPNp3uO5s1SXDnTFaHRwTv+0/xofucTkI WLI5WEl5ALYNuX3tp+/K4CMVOysblfbtk/e01njT4yMUTjbJ01Z+dzsAiAHqSzFMrS5h /FKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; b=UWKRwhtIgLLbf4uXx7OnAtFNnWQCArrCBrNcuZk0bYTgz7OahVWB+EZo4aK79Zi5oc odAqxM7DGiE+UGZg9jsSuzeCosioTOarRxUFACPOUy5FcH2o6+jVVkTuUc0o4QEWFTl0 jA2cNQ7Vkn7bA7uiAegM4eIe7pYC44uOWlFBjgQA/fYXmPirfpKEp07r+xQc7Qa3/MMS lOMNzNusgedKTSSyF8LO0k/zpdY4J9T2ujwDYw7q8beH/V/GV0/JNGR9C/quBLQZrxGM qB8vAkR+7lO9lmVE73sKsylY0/veSERABI88DdIxmIfbO05ulW1j7+OUMnP0WwYrbY4l eEfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AimgfEuf; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.18; Wed, 10 Mar 2021 07:47:18 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AimgfEuf; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233224AbhCJPqn (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:43 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47722 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232617AbhCJPq1 (ORCPT ); Wed, 10 Mar 2021 10:46:27 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkL6u067707; Wed, 10 Mar 2021 09:46:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391181; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=AimgfEufkI2q4yZEXpKgflNl4tqimqAVFDZwJ14MYlp8z2tY7ZMeko7CStc9h4DB7 YYXKp3D/51KntvxnEczwKXCahpKhyhNES6hVRU3i5uQYO4wXialI95VFob6FaCjyjS tYh3kixgeAH7aCDcqdhwGOIiTp3RNh3Vyuq23dnc= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkLfl088150 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:21 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:21 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:21 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KT066370; Wed, 10 Mar 2021 09:46:18 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 05/13] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function Date: Wed, 10 Mar 2021 21:15:50 +0530 Message-ID: <20210310154558.32078-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Group all devm_clk_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 57 +++++++++++++++--------- 1 file changed, 35 insertions(+), 22 deletions(-) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index f7ba0ed416bc..7bf1b4c7774a 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -477,6 +477,38 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, + struct device *dev) +{ + struct clk *clk; + int ret; + + clk = devm_clk_get_optional(dev, "phy_clk"); + if (IS_ERR(clk)) { + dev_err(dev, "failed to get clock phy_clk\n"); + return PTR_ERR(clk); + } + sp->clk = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk_dig_div = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk1_dig_div = clk; + + return 0; +} + static int cdns_sierra_phy_probe(struct platform_device *pdev) { struct cdns_sierra_phy *sp; @@ -487,7 +519,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) unsigned int id_value; int i, ret, node = 0; void __iomem *base; - struct clk *clk; struct device_node *dn = dev->of_node, *child; if (of_get_child_count(dn) == 0) @@ -524,11 +555,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) platform_set_drvdata(pdev, sp); - sp->clk = devm_clk_get_optional(dev, "phy_clk"); - if (IS_ERR(sp->clk)) { - dev_err(dev, "failed to get clock phy_clk\n"); - return PTR_ERR(sp->clk); - } + ret = cdns_sierra_phy_get_clocks(sp, dev); + if (ret) + return ret; sp->phy_rst = devm_reset_control_get(dev, "sierra_reset"); if (IS_ERR(sp->phy_rst)) { @@ -542,22 +571,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) return PTR_ERR(sp->apb_rst); } - clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk_dig_div = clk; - - clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk1_dig_div = clk; - ret = clk_prepare_enable(sp->clk); if (ret) return ret; From patchwork Wed Mar 10 15:45:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396734 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483349jai; Wed, 10 Mar 2021 07:47:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJxNV65DTskz6xlEYjbr6OBWdJVDwmZTSfC8P3uVq0xMJsfXL8TFQ2fZW8abh9lxariiNf4H X-Received: by 2002:aa7:da46:: with SMTP id w6mr4096173eds.40.1615391238575; Wed, 10 Mar 2021 07:47:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391238; cv=none; d=google.com; s=arc-20160816; b=JzQIqqtuUBhGVWq2gu0hI6tcEXKUULDQGkhioJF7O0YT0VGyqD3sCOzGJb+wc0dmpP EYHT5rztW3rzbYGUpwARgGJQPR+T0oSjG2ASDu0fCY0G9vw8gYgt94tm41F9Wm27N2mw 1mMfHhsn07+K1sjzWjp+O3Fa8MQKhm7u5vmj2bhGW5Tq37kYdNA1hy+RJRGpyjaU2VKe neBEdKZIh2C0EoFGNCs+2kDS1rAYecicWmC3b7aq9s0Ejsvv5BdeiiCLt9R4O4GUkVAc 0GjQ2Qm2mdnG0canHHNVoXq3XjDlBF/SuG9SS80Bpo10t/7svDgDn2UKxwwoOfUM/T+d VEVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=WnJojV2RIcrSpG/FMHpx7hS8r2BmwynHcxEFLLXKjTQ=; b=XhFbs2z0Q4x4uvjx4L8ZSn3APMXW4uuhrlr0jlAaX0WAm1oJ4VVvjEWVXr+0gi5ol5 UTg6XMSlaz3UR50MXxHrE0qvdZfd6GkAQ5yYarHM85aFSNj2fyBZvTAzmr0xxs98r6U9 qiNQIPNrwoVlputqtCBo/CQRX1o45kYP9M2nvi2GpctXJb6BHDKqde1AITy7rZHVUKah MscsdKTsKiEZUWOD+9/tudZaUrc2TzWQ/CR2mM43WHed/nXxaT0DPGeAhhUlFrwBUZ1Q zcGC5IkdwjWTawZLPDbyrSEhuE1hL6Lg4RiFla5hzkH7y7eO5GAmkP2rk10xPvBmnSTK +lOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hKiTgNWR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.18; Wed, 10 Mar 2021 07:47:18 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hKiTgNWR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232978AbhCJPqn (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:43 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:43814 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233221AbhCJPq3 (ORCPT ); Wed, 10 Mar 2021 10:46:29 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkOK2117304; Wed, 10 Mar 2021 09:46:24 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391184; bh=WnJojV2RIcrSpG/FMHpx7hS8r2BmwynHcxEFLLXKjTQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hKiTgNWRK+ru+XYC/YLgmqnSTz/rsTfjYG2o+LzPf3MltTVPM7pkH9xr6bhbnUTv6 Ydom9lQgCvK7m/UKQx5yVbbEUuY3o6IKPa2icvKj14ZysLk7AVq1S+yO+YAoPY4Gr/ aIsrFRNFa6aKOeGc/JdxngrnNh3I0b1gguFTvqU8= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkO0Q088257 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:24 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:24 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:24 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KU066370; Wed, 10 Mar 2021 09:46:21 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 06/13] phy: cadence: cadence-sierra: Move all reset_control_get*() to a separate function Date: Wed, 10 Mar 2021 21:15:51 +0530 Message-ID: <20210310154558.32078-7-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Group devm_reset_control_get() and devm_reset_control_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 36 ++++++++++++++++-------- 1 file changed, 25 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 7bf1b4c7774a..935f165404e4 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -509,6 +509,28 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, + struct device *dev) +{ + struct reset_control *rst; + + rst = devm_reset_control_get(dev, "sierra_reset"); + if (IS_ERR(rst)) { + dev_err(dev, "failed to get reset\n"); + return PTR_ERR(rst); + } + sp->phy_rst = rst; + + rst = devm_reset_control_get_optional(dev, "sierra_apb"); + if (IS_ERR(rst)) { + dev_err(dev, "failed to get apb reset\n"); + return PTR_ERR(rst); + } + sp->apb_rst = rst; + + return 0; +} + static int cdns_sierra_phy_probe(struct platform_device *pdev) { struct cdns_sierra_phy *sp; @@ -559,17 +581,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - sp->phy_rst = devm_reset_control_get(dev, "sierra_reset"); - if (IS_ERR(sp->phy_rst)) { - dev_err(dev, "failed to get reset\n"); - return PTR_ERR(sp->phy_rst); - } - - sp->apb_rst = devm_reset_control_get_optional(dev, "sierra_apb"); - if (IS_ERR(sp->apb_rst)) { - dev_err(dev, "failed to get apb reset\n"); - return PTR_ERR(sp->apb_rst); - } + ret = cdns_sierra_phy_get_resets(sp, dev); + if (ret) + return ret; ret = clk_prepare_enable(sp->clk); if (ret) From patchwork Wed Mar 10 15:45:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396732 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483340jai; Wed, 10 Mar 2021 07:47:17 -0800 (PST) X-Google-Smtp-Source: ABdhPJwWaOjsLZOLnkeHVwb+ooJz1N9gEk485uKNq3VMzRLFrtX3iF+ty6pbifbODngEG3pQ0HKY X-Received: by 2002:a05:6402:1d19:: with SMTP id dg25mr4075870edb.218.1615391237854; Wed, 10 Mar 2021 07:47:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391237; cv=none; d=google.com; s=arc-20160816; b=HuI0hlHMTYR0l4hGoW9nXSG7jk/7qFoJo4dz/gMgKdDXapOKG0P+udMEK3xI1o3P3L qcSGCCaT+II+uriuR42+09TQqI+q2TOSJEvlJ9yYt0gJtiys13RDdzdvlkwCTEf8gpnQ EeyfPirKsDrzOEDclPsShPCIfqqUh38TNpYNHKf7AkefxmMzUfa6+bYqyOUSCDj7vPeA nGCmaBqRZOMpMne2Mxjg48+vYQghJUEoNOAiHwZ5jPfqsINOcpkjnYET7OGVK7f4yhtZ wRhaL3wkVBJUwghAvf941wTXd1cU9zBPsL7wpccqUz7dHl6aUXKoxYKdSOq25QUNGw3f lYmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=TsbqIXJs6B38X8Auxf3dPsgKPxUh2cFtxGTPMXU1r1Y=; b=fCYGdXtTURVWMEzTI0DBJkZjzgL7GRQztglJFRdpZZ3vGAh5NmcwyUyKKwj23GOoAg X4aQF7E1hprDuJRz7pqCpK5FHIuvEYWDrOEhRB3p32G6RmQqQMYnxAsFWgx7eJUtbt8Z PzRxqNzAQTJrK//FnTXDLNp11v7XeUkbskq9QJkmuBf8Ns1Fbsx+pHz9CfGUZdNeEIRc QEQ9l1nE/5kyZ0iQcuoy1mrgcT6AeSb1bV0c0hrZOzhG5gMiha81tBxSVyWarOnKfiPl 6/gTcJ7DcaSmqJ5rvqDvgS3edzpv154MEIY1nn0mbvLsoyNnf2Veu43EeK9OtrNdSE0w NRTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=t9NiFOqI; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.17; Wed, 10 Mar 2021 07:47:17 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=t9NiFOqI; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233240AbhCJPqo (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:44 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47768 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229790AbhCJPqc (ORCPT ); Wed, 10 Mar 2021 10:46:32 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkSB1067849; Wed, 10 Mar 2021 09:46:28 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391188; bh=TsbqIXJs6B38X8Auxf3dPsgKPxUh2cFtxGTPMXU1r1Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=t9NiFOqI27RHPnf8Wx84wbLaW//YiSwBHEJf7OffWCTapLrIEaQkaC8JEuU6zS69D iBEvruchhWL0sJIMMT/FAIqkAyJQ2jLEOq69roYUoAVvn3Rq2KMXgtpBKseDHcACCT AeXb/96pRIjXfpioe3u3qEYyfGUSHjljvh5Hvs1o= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkSYa014983 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:28 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:27 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:27 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KV066370; Wed, 10 Mar 2021 09:46:24 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 07/13] phy: cadence: cadence-sierra: Explicitly request exclusive reset control Date: Wed, 10 Mar 2021 21:15:52 +0530 Message-ID: <20210310154558.32078-8-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Since the reset controls obtained in Sierra is exclusively used by the Sierra device, use exclusive reset control request API calls. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 935f165404e4..44c52a0842dc 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -514,14 +514,14 @@ static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, { struct reset_control *rst; - rst = devm_reset_control_get(dev, "sierra_reset"); + rst = devm_reset_control_get_exclusive(dev, "sierra_reset"); if (IS_ERR(rst)) { dev_err(dev, "failed to get reset\n"); return PTR_ERR(rst); } sp->phy_rst = rst; - rst = devm_reset_control_get_optional(dev, "sierra_apb"); + rst = devm_reset_control_get_optional_exclusive(dev, "sierra_apb"); if (IS_ERR(rst)) { dev_err(dev, "failed to get apb reset\n"); return PTR_ERR(rst); From patchwork Wed Mar 10 15:45:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396737 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483375jai; Wed, 10 Mar 2021 07:47:21 -0800 (PST) X-Google-Smtp-Source: ABdhPJwynf00c8AZkmGQhjQueX/F2nLMvtuQXaPhjhazPp5Teb4+q/hB850K++dvhHUuymNfKChQ X-Received: by 2002:aa7:c9c8:: with SMTP id i8mr3966446edt.193.1615391241316; Wed, 10 Mar 2021 07:47:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391241; cv=none; d=google.com; s=arc-20160816; b=DuWOc1T1yQ8m7sfEv6hshs0L9fiq/s0tZe4s8VNS39AfHrrG/ZCWi1GuWO8Q3SITfr 38MUzHdDbs08zK+SqaCYRuIdqlpTiNaG8I/2+y59pAFOn6BDFtFnGcrtbOLwIJrn1NJH gaN/kZMEoQPeo1cdJIquCSylh9R37979nPsTyDHqOEI2ALUmsencTGE+uPswZUYaA+/2 SGmUtUs3Rub+Uk75VKHtb4l+8TY+avKgjvNuABVGYOG+ZMqgGgdL7T5v3Cw7AchwfDIO vlPFTr8zXB+aQzKc3QUBArZrXtnQtdx+AE+FJ4ovMwMaRJyWeQPuj4jEIpKP4zhxzHR5 Neiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=08awkQMHZbwl1D2ulSCiSIn5Be2/Hn1dBDPsOOeP4no=; b=05s0jYSjLdRi/2+BE2Dkh7ZR0kKlR1JhvjruIw4L1LClC6CfdSAXfayA0pbtYCFQiq O4N+A88Y9m10T+2enLaAsjXttEK8G3hUQ3PTRUgoGFEr5xKsY0gExGMqnlkWama9kqo1 FKe5X85qGRohBg2pns/0yOoEtaI4KIWLfKC2rCetjm0xoTvX3SUOu5pHWuYyJVoDccFg Usw9py+x/Z1muyy2sWjltUFEljNMYcNyIM99tBtbdtCZ/1jDG8yAjunTQooHPjtpuE/z +set51qpSlIzFnjdwwaCyhwms8vEZFX4ZcHno3suQVWMpm9q1ck+SXp0oO3O/gw691hf C5Dg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=l0ofe4C8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.21; Wed, 10 Mar 2021 07:47:21 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=l0ofe4C8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233249AbhCJPqo (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:44 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47776 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233227AbhCJPqf (ORCPT ); Wed, 10 Mar 2021 10:46:35 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkUHd067859; Wed, 10 Mar 2021 09:46:30 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391190; bh=08awkQMHZbwl1D2ulSCiSIn5Be2/Hn1dBDPsOOeP4no=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=l0ofe4C8/+QewwS9pD+Kpvx4d/jO8MV54IJO75jPInwH0Okyl0ufL5XhhWxrVcMj5 kQYoIZSAJQEDRgf+39Y9/gmEve2KWakhmSTqQpqSAqZZipiwX4KG5bPedKwngUQAGK WtPYlBNlpBOEYOqQdlMRUz5C+iernrTdH6cR0Ip8= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkU0T088402 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:30 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:30 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:30 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KW066370; Wed, 10 Mar 2021 09:46:27 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 08/13] phy: cadence-torrent: Use a common header file for Cadence SERDES Date: Wed, 10 Mar 2021 21:15:53 +0530 Message-ID: <20210310154558.32078-9-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. In order to have a single header file for all Cadence SERDES move phy-cadence-torrent.h to phy-cadence.h. This is in preparation for adding Cadence Sierra SERDES specific macros. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-torrent.c | 2 +- .../phy/{phy-cadence-torrent.h => phy-cadence.h} | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) rename include/dt-bindings/phy/{phy-cadence-torrent.h => phy-cadence.h} (51%) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 95160da3e667..3fdab0d288c4 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence.h similarity index 51% rename from include/dt-bindings/phy/phy-cadence-torrent.h rename to include/dt-bindings/phy/phy-cadence.h index 3c92c6192493..4a5ea52a856f 100644 --- a/include/dt-bindings/phy/phy-cadence-torrent.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -1,15 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * This header provides constants for Cadence Torrent SERDES. + * This header provides constants for Cadence SERDES. */ -#ifndef _DT_BINDINGS_TORRENT_SERDES_H -#define _DT_BINDINGS_TORRENT_SERDES_H +#ifndef _DT_BINDINGS_CADENCE_SERDES_H +#define _DT_BINDINGS_CADENCE_SERDES_H +/* Torrent */ #define TORRENT_SERDES_NO_SSC 0 #define TORRENT_SERDES_EXTERNAL_SSC 1 #define TORRENT_SERDES_INTERNAL_SSC 2 #define CDNS_TORRENT_REFCLK_DRIVER 0 -#endif /* _DT_BINDINGS_TORRENT_SERDES_H */ +#endif /* _DT_BINDINGS_CADENCE_SERDES_H */ From patchwork Wed Mar 10 15:45:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396736 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483366jai; Wed, 10 Mar 2021 07:47:20 -0800 (PST) X-Google-Smtp-Source: ABdhPJxGTZhAZFvBQmj3LdTQEQf15NgJ00C5dP795Fzf30dK0fXwcMBhOxQtC/UUGltXztj03gVd X-Received: by 2002:a17:906:4a19:: with SMTP id w25mr4298929eju.180.1615391240485; Wed, 10 Mar 2021 07:47:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391240; cv=none; d=google.com; s=arc-20160816; b=SWBVor1xtDaX3xpdiehGtp8wbnzgQu82bta10aRb70Rl/DtlhbYBv4DOlAI9xqAGRx Dz5zMZGCG69zzCdJNatWaekF2DzavkZfllMvMInqcHOdLoOAgAvxjHDNgG38hcXkosaY qGIoQmkgFxsDlpGRCKIyXwTDwQ+jYrZIxZHsuoI8MEQD35w9g4JH+wnr0/SzxPEQC9D/ 6Td7kUZ7njE3+qdS2W7TSrxgdKBNdZGQ1EyZ0q4YzU2xMSUWZaGoGL/RkaRSoSubGmbL UCScmE7p7DN/j5+Z3pPcvLzumQarjS+GXeb/uMEw7QZa12VgUbJgg5NBHdmglyMmRVIO l/2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=fTTzBtUNI6wOHn23Acadhw+lAANu22wL/U385vCODoY=; b=spSf0/rBYUs/t2eM1wjFnFEYeTIE7Aukk/Ofdvho0RWj1IUBvbT0NFsbqpXyo95C6W X2U7S0lXEx137qE36/ttwEDdTQTRQQHnKKWNQWIYOJ6dfxk//1MX8dYsmTtK/d4zKzzw zFciKSlXY/YoyzG6jc5/oTGItLvMjJ/H0j0SiQ3b+aaDtBoZ++ZIrMpkD3mJ/bED8j2+ fvUUAIfaLTOu8eXay1PsBg/HIqqmrewKVACe1SoVlB/h7qMzdvDpQSd5XtCUTJS+h4Za edgsPmtrlzJpCx3SSaU1OY6/apt7gY4Tsv1+5zv7axNmTe8hvJiSC27ThEZan+oQbf2k T5Bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gsUqi5kH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.20; Wed, 10 Mar 2021 07:47:20 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gsUqi5kH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233205AbhCJPqo (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:44 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:43886 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233231AbhCJPqi (ORCPT ); Wed, 10 Mar 2021 10:46:38 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkXB5117395; Wed, 10 Mar 2021 09:46:33 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391193; bh=fTTzBtUNI6wOHn23Acadhw+lAANu22wL/U385vCODoY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gsUqi5kHGA+wGj4pui64MHcJKe2Vakk6BTo6qKfmfPGAqpyPOeO5pN3VbYw8zo3RR jB80obXAWrtGwcflbW9lAhLv93Tp8OcJklDGz8iBPi4LghYVqh3dGDRjNwQ0CNWyK9 SRcz4zfVh3jTEL0Bl7qZ93HtoByO9hZD04PMbHo8= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkX83088497 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:33 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:33 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:33 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KX066370; Wed, 10 Mar 2021 09:46:30 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 09/13] phy: cadence: cadence-sierra: Add array of input clocks in "struct cdns_sierra_phy" Date: Wed, 10 Mar 2021 21:15:54 +0530 Message-ID: <20210310154558.32078-10-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Instead of having separate structure members for each input clock, add an array for the input clocks within "struct cdns_sierra_phy". This is in preparation for adding more input clocks required for supporting additional clock combination. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 25 ++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 44c52a0842dc..a45278c30948 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -144,6 +144,13 @@ #define SIERRA_MAX_LANES 16 #define PLL_LOCK_TIME 100000 +#define CDNS_SIERRA_INPUT_CLOCKS 3 +enum cdns_sierra_clock_input { + PHY_CLK, + CMN_REFCLK_DIG_DIV, + CMN_REFCLK1_DIG_DIV, +}; + static const struct reg_field macro_id_type = REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15); static const struct reg_field phy_pll_cfg_1 = @@ -197,9 +204,7 @@ struct cdns_sierra_phy { struct regmap_field *macro_id_type; struct regmap_field *phy_pll_cfg_1; struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; - struct clk *clk; - struct clk *cmn_refclk_dig_div; - struct clk *cmn_refclk1_dig_div; + struct clk *input_clks[CDNS_SIERRA_INPUT_CLOCKS]; int nsubnodes; u32 num_lanes; bool autoconf; @@ -281,8 +286,8 @@ static int cdns_sierra_phy_init(struct phy *gphy) if (phy->autoconf) return 0; - clk_set_rate(phy->cmn_refclk_dig_div, 25000000); - clk_set_rate(phy->cmn_refclk1_dig_div, 25000000); + clk_set_rate(phy->input_clks[CMN_REFCLK_DIG_DIV], 25000000); + clk_set_rate(phy->input_clks[CMN_REFCLK1_DIG_DIV], 25000000); if (ins->phy_type == PHY_TYPE_PCIE) { num_cmn_regs = phy->init_data->pcie_cmn_regs; num_ln_regs = phy->init_data->pcie_ln_regs; @@ -488,7 +493,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, dev_err(dev, "failed to get clock phy_clk\n"); return PTR_ERR(clk); } - sp->clk = clk; + sp->input_clks[PHY_CLK] = clk; clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); if (IS_ERR(clk)) { @@ -496,7 +501,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, ret = PTR_ERR(clk); return ret; } - sp->cmn_refclk_dig_div = clk; + sp->input_clks[CMN_REFCLK_DIG_DIV] = clk; clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); if (IS_ERR(clk)) { @@ -504,7 +509,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, ret = PTR_ERR(clk); return ret; } - sp->cmn_refclk1_dig_div = clk; + sp->input_clks[CMN_REFCLK1_DIG_DIV] = clk; return 0; } @@ -585,7 +590,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - ret = clk_prepare_enable(sp->clk); + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); if (ret) return ret; @@ -662,7 +667,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) reset_control_put(sp->phys[i].lnk_rst); of_node_put(child); clk_disable: - clk_disable_unprepare(sp->clk); + clk_disable_unprepare(sp->input_clks[PHY_CLK]); reset_control_assert(sp->apb_rst); return ret; } From patchwork Wed Mar 10 15:45:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396735 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483356jai; Wed, 10 Mar 2021 07:47:19 -0800 (PST) X-Google-Smtp-Source: ABdhPJwoaaOU26FX7H/WwmuY87GovDfLkJJdhlqOhTLfZIxpsus+UVuDn/SdyY0dSC+2ogXq3ith X-Received: by 2002:a17:906:73d5:: with SMTP id n21mr4498660ejl.8.1615391239298; Wed, 10 Mar 2021 07:47:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391239; cv=none; d=google.com; s=arc-20160816; b=r7f23/LL3XdAvCJGhnZQ6vdN7adepc7txGxQ3X80RmsKS+YSW66mXbYVAiJ8lBsSkg MK8toja/lrHGDyYQyZLYdm46ChygAM777chiCC6btID791SRudYW8gGFwDKJNM++TI3k Ssi1Tj1sCT/c9/FeQOAWcyHdnyU0X8tlg6PzTpZ3onxV3/NVZeFRtffPkpN4hKMQMs9q U4Q/hf01uaUmRpi1mskd7/GpOVmWHGhUfX1+cY+9dsHk91WNm4ECpU8znrMHZ2EgYmxo 4SB3TvRonXF/9kNCVBXWfcMujuL9Xt2/1fsmt1B+BNtxeiAA44+gyMvfLpuxfq4YCXEk +zow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Fr9ZyGLW31JmJAp0IyWK9eWBsQt1ma4OyJ8An42gTxI=; b=EMcRnat+Bu8xoK0mbZ9Th+MP2F2VgM1z4C41DSUcwf32j6rbIn+/PjW/qKtvdEZOK/ gkAIv6JlbUndxF0JomK+z+NhiKDKUCJsyMk7QB8amqBAikpXWezoyU+s/gJxmT7Xo2Ef w78eIXKYtf8U15HgHTyeKihdJ7GWr59sDTLppcFSYIZxekhOSCvPcSxWHd7tILsA43py cRY4C6u0rFWKTkb5eXPKsZV+DFUB4KBECjg3WRsDNMwzWJWPTel4RjxUi4YUyIS2eBAJ IQq2AFwONFI3sDJ1ZwM5qQlUd95fNQ2S7tyqJTqXsbLZr7cOsyz2Zc3sUqYXwcb8BUaF UWsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=y2PMiwzW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.19; Wed, 10 Mar 2021 07:47:19 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=y2PMiwzW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233257AbhCJPqp (ORCPT + 6 others); Wed, 10 Mar 2021 10:46:45 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:43896 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233232AbhCJPql (ORCPT ); Wed, 10 Mar 2021 10:46:41 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFka7h117406; Wed, 10 Mar 2021 09:46:36 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391196; bh=Fr9ZyGLW31JmJAp0IyWK9eWBsQt1ma4OyJ8An42gTxI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=y2PMiwzWjSsQKas+utyxD1tTNlJ+/l6LepdDa/RqgMy4dvl/WaE5034Qe2Q5YVqry 2y/PIhXdlPoa/hUQhki9kLnEshpWVV6z73VG/epYHuVgvQwKtWUTzYWtf119dlvfv1 BfFZemAtAYrpOs6U4mD0Siy+s5PdfbxqTm/hrgrA= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkapM015130 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:36 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:36 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:36 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KY066370; Wed, 10 Mar 2021 09:46:33 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 10/13] phy: cadence: cadence-sierra: Add missing clk_disable_unprepare() in .remove callback Date: Wed, 10 Mar 2021 21:15:55 +0530 Message-ID: <20210310154558.32078-11-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org commit 44d30d622821 ("phy: cadence: Add driver for Sierra PHY") enabled the clock in probe and failed to disable in remove callback. Add missing clk_disable_unprepare() in cdns_sierra_phy_remove(). Fixes: 44d30d622821 ("phy: cadence: Add driver for Sierra PHY") Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index a45278c30948..ac32b7b0289f 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -689,6 +689,9 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_assert(phy->phys[i].lnk_rst); reset_control_put(phy->phys[i].lnk_rst); } + + clk_disable_unprepare(phy->input_clks[PHY_CLK]); + return 0; } From patchwork Wed Mar 10 15:45:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396739 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483681jai; Wed, 10 Mar 2021 07:47:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJxXEZho75eS2TIohm3/gohnmqFrfM3b+fB4CTMZ9sdeGWTRs6YzNA+y1igF9J4GVx4Jkh8G X-Received: by 2002:a05:6402:3495:: with SMTP id v21mr4000631edc.117.1615391266001; Wed, 10 Mar 2021 07:47:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391265; cv=none; d=google.com; s=arc-20160816; b=IObL8jl8xpA/tIoPQyQubP/c7ZAKo1ofNmNRIELYprpEJXAyN6tJszzl52D2bq9jpp 7KwBaYYGYsTGcO3wa8McOWvtZurf96R0RSunR/cV7DN/0GvmQXvkXDstb64xZgF1/DuW oe3I/QI6heDbyWYOAdCUWeilGEilykLLITrm9FZwtd0XXFbRk3mFmOFg63Sel9ea2sMR naMptPaVNHMbPY9pR/5UHM5JH8FHTuv64IUE65R/U6QnLwwe/eo4f0DP0n2qt3OxRBlW hNZZrvfTvkoX4OoQcJuekPKvnx/T1jz2z1+k5hwwcG3mbhawhKPKe9IsCLXOAayCDqQ/ OJZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=YL9+WKt8x7qTWljt/hD5/jYLjLVEo7lGeUBHfD8YbNk=; b=rvpPURh2eFvi7/f5kFU4GJfvkWWEYi19WnX9sJ2ut3ZcuRkzcACZlQlTs9shGX2hnb 1cljyEzsi1WJYYPgSu8a9KqHAnGWNkWdaq8a1aE/xg020akWm3HHaOs/Gmwh62ZQxlz7 5V/3ttPbRweOvwoGGTZjJBDPUrpHd9aOYmNYeFFvpHbQ7e2bFQQTtfoph34vv/NCfymW jOgMXdNg3jxrv8cWlWGj9m9aY3t4oS1L0WITG5NsUDWOYrbr2+3ZlL85iIoaR5RnP107 TbCIJJcsSiSS2MpWEX1fqPOOYRLgBbJ6FPZFiZ857NXhSDy13agoNml/hPs3+2UCmNBj icTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZHasaQoU; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t3si4576077ejy.142.2021.03.10.07.47.45; Wed, 10 Mar 2021 07:47:45 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ZHasaQoU; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233356AbhCJPrN (ORCPT + 6 others); Wed, 10 Mar 2021 10:47:13 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47806 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233245AbhCJPqo (ORCPT ); Wed, 10 Mar 2021 10:46:44 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12AFkdaA067914; Wed, 10 Mar 2021 09:46:39 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615391199; bh=YL9+WKt8x7qTWljt/hD5/jYLjLVEo7lGeUBHfD8YbNk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZHasaQoUBmQKKBawl+czxqX+u86DGoRaZUVD7E6ytFvW8Ste9Ge9BQ4VKMONgeDiG fqEK9Ysghy5glLisVeTBTSaMeeaWkRA3csqSA0HHgPfMvvgGc4dSK4DzFj9pGS5ZGs dSBQUy1+iuxXPvd4wKloeEUink7ITTqm2Zlv2Z5w= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12AFkdnZ032193 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 09:46:39 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 09:46:39 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 09:46:39 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12AFk2KZ066370; Wed, 10 Mar 2021 09:46:37 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v6 11/13] dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider Date: Wed, 10 Mar 2021 21:15:56 +0530 Message-ID: <20210310154558.32078-12-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310154558.32078-1-kishon@ti.com> References: <20210310154558.32078-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add #clock-cells binding to model Sierra as clock provider and include clock IDs for PLL_CMNLC and PLL_CMNLC1. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- .../bindings/phy/phy-cadence-sierra.yaml | 17 ++++++++++++++++- include/dt-bindings/phy/phy-cadence.h | 4 ++++ 2 files changed, 20 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml index d210843863df..84383e2e0b34 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml @@ -26,6 +26,9 @@ properties: '#size-cells': const: 0 + '#clock-cells': + const: 1 + resets: minItems: 1 maxItems: 2 @@ -49,12 +52,24 @@ properties: const: serdes clocks: - maxItems: 2 + minItems: 2 + maxItems: 4 clock-names: + minItems: 2 items: - const: cmn_refclk_dig_div - const: cmn_refclk1_dig_div + - const: pll0_refclk + - const: pll1_refclk + + assigned-clocks: + minItems: 1 + maxItems: 2 + + assigned-clock-parents: + minItems: 1 + maxItems: 2 cdns,autoconf: type: boolean diff --git a/include/dt-bindings/phy/phy-cadence.h b/include/dt-bindings/phy/phy-cadence.h index 4a5ea52a856f..4652bcb86265 100644 --- a/include/dt-bindings/phy/phy-cadence.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -13,4 +13,8 @@ #define CDNS_TORRENT_REFCLK_DRIVER 0 +/* Sierra */ +#define CDNS_SIERRA_PLL_CMNLC 0 +#define CDNS_SIERRA_PLL_CMNLC1 1 + #endif /* _DT_BINDINGS_CADENCE_SERDES_H */ From patchwork Wed Mar 10 15:45:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396740 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp483690jai; Wed, 10 Mar 2021 07:47:47 -0800 (PST) X-Google-Smtp-Source: ABdhPJzwp9A472eYijI0UptR84+8pyOYs6BUyI+4oBjz8FO16WSMR4Vx6gN8wtX7luoT+UqyAkWO X-Received: by 2002:a17:906:1457:: with SMTP id q23mr4323094ejc.43.1615391266855; Wed, 10 Mar 2021 07:47:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615391266; cv=none; d=google.com; s=arc-20160816; b=0Q251dkiRE2KKvDTUwsmKeJ7KZAZo+wp1q55TofpSL9AkufCp8G7AiE018RTrbZOWB o0nQsYnRriHYRJ330g+PYYcEmhA7y5+/LoFC4+oaqqHvo8x7Mzz6oR0SLhc6EAA5xDu/ lkjBQT4muvXUHIdHdglOVZ7puF3n3BGxvD5kNqJDbLz1d9c3hfDTx0SARpsthThqjwYw wkmacvPzVpS109N4m5J6lRn+XDzse1TqOl22Pa6j+aEo0/OWiAx3NC9nOiXZQiLO/+uC q7UCHVl0DdHr7OZoN/CWwKiYiaPlziqHiJkTtfm5QA0J5DZR67T4ZB2PhYXfIn2r6hYd JEWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=MMP4heRHWDuDBmraJ5D806+jrvloctFht2aLettoa00=; b=b8xpEo1DewPUQuCkBEVeb6jnvgXXJgks5d/xaFQOy/bkj5GQaiQYtBqimsY4cFyuuU Jlg+OxSJCnWLBxYCBO7PLnSDLGHd4XfxF3pceCaAVB69+DfsylbEIGRpy2uekkk/qfcJ SRg2MQsF6Bl6pcA0W/afKyfwYq3sGKfrTsC986qQcF5jBsfp9CfsjBv9545sRXOPnuKU CMd/9YWZcje7KKU9fqplMkNOAYKJW2X7gy3/Ig182d7Dx0XqEMtV/qcWb1cLETF1hdon YkD2jytuaWsqfduDQUWafaFbMsbaRKi+z+oDXDmpuPYzaL+izuuRCORPJTXrs2PiloVf 9zxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=y9iLS4DT; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Model PLL_CMNLC and PLL_CMNLC1 as clocks so that it's possible to select one of these two inputs from device tree. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/Kconfig | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 267 ++++++++++++++++++++++- 2 files changed, 265 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig index 27e9d6c377e5..a62910ff5591 100644 --- a/drivers/phy/cadence/Kconfig +++ b/drivers/phy/cadence/Kconfig @@ -25,6 +25,7 @@ config PHY_CADENCE_DPHY config PHY_CADENCE_SIERRA tristate "Cadence Sierra PHY Driver" depends on OF && HAS_IOMEM && RESET_CONTROLLER + depends on COMMON_CLK select GENERIC_PHY help Enable this to support the Cadence Sierra PHY driver diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index ac32b7b0289f..039ca10db59d 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -7,6 +7,7 @@ * */ #include +#include #include #include #include @@ -20,10 +21,12 @@ #include #include #include +#include /* PHY register offsets */ #define SIERRA_COMMON_CDB_OFFSET 0x0 #define SIERRA_MACRO_ID_REG 0x0 +#define SIERRA_CMN_PLLLC_GEN_PREG 0x42 #define SIERRA_CMN_PLLLC_MODE_PREG 0x48 #define SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG 0x49 #define SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG 0x4A @@ -31,6 +34,9 @@ #define SIERRA_CMN_PLLLC_BWCAL_MODE1_PREG 0x4F #define SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG 0x50 #define SIERRA_CMN_PLLLC_SS_TIME_STEPSIZE_MODE_PREG 0x62 +#define SIERRA_CMN_REFRCV_PREG 0x98 +#define SIERRA_CMN_REFRCV1_PREG 0xB8 +#define SIERRA_CMN_PLLLC1_GEN_PREG 0xC2 #define SIERRA_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ ((0x4000 << (block_offset)) + \ @@ -144,13 +150,19 @@ #define SIERRA_MAX_LANES 16 #define PLL_LOCK_TIME 100000 -#define CDNS_SIERRA_INPUT_CLOCKS 3 +#define CDNS_SIERRA_OUTPUT_CLOCKS 2 +#define CDNS_SIERRA_INPUT_CLOCKS 5 enum cdns_sierra_clock_input { PHY_CLK, CMN_REFCLK_DIG_DIV, CMN_REFCLK1_DIG_DIV, + PLL0_REFCLK, + PLL1_REFCLK, }; +#define SIERRA_NUM_CMN_PLLC 2 +#define SIERRA_NUM_CMN_PLLC_PARENTS 2 + static const struct reg_field macro_id_type = REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15); static const struct reg_field phy_pll_cfg_1 = @@ -158,6 +170,53 @@ static const struct reg_field phy_pll_cfg_1 = static const struct reg_field pllctrl_lock = REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0); +static const char * const clk_names[] = { + [CDNS_SIERRA_PLL_CMNLC] = "pll_cmnlc", + [CDNS_SIERRA_PLL_CMNLC1] = "pll_cmnlc1", +}; + +enum cdns_sierra_cmn_plllc { + CMN_PLLLC, + CMN_PLLLC1, +}; + +struct cdns_sierra_pll_mux_reg_fields { + struct reg_field pfdclk_sel_preg; + struct reg_field plllc1en_field; + struct reg_field termen_field; +}; + +static const struct cdns_sierra_pll_mux_reg_fields cmn_plllc_pfdclk1_sel_preg[] = { + [CMN_PLLLC] = { + .pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC_GEN_PREG, 1, 1), + .plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 8, 8), + .termen_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 0, 0), + }, + [CMN_PLLLC1] = { + .pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC1_GEN_PREG, 1, 1), + .plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 8, 8), + .termen_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 0, 0), + }, +}; + +struct cdns_sierra_pll_mux { + struct clk_hw hw; + struct regmap_field *pfdclk_sel_preg; + struct regmap_field *plllc1en_field; + struct regmap_field *termen_field; + struct clk_init_data clk_data; +}; + +#define to_cdns_sierra_pll_mux(_hw) \ + container_of(_hw, struct cdns_sierra_pll_mux, hw) + +static const int pll_mux_parent_index[][SIERRA_NUM_CMN_PLLC_PARENTS] = { + [CMN_PLLLC] = { PLL0_REFCLK, PLL1_REFCLK }, + [CMN_PLLLC1] = { PLL1_REFCLK, PLL0_REFCLK }, +}; + +static u32 cdns_sierra_pll_mux_table[] = { 0, 1 }; + struct cdns_sierra_inst { struct phy *phy; u32 phy_type; @@ -204,10 +263,15 @@ struct cdns_sierra_phy { struct regmap_field *macro_id_type; struct regmap_field *phy_pll_cfg_1; struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; + struct regmap_field *cmn_refrcv_refclk_plllc1en_preg[SIERRA_NUM_CMN_PLLC]; + struct regmap_field *cmn_refrcv_refclk_termen_preg[SIERRA_NUM_CMN_PLLC]; + struct regmap_field *cmn_plllc_pfdclk1_sel_preg[SIERRA_NUM_CMN_PLLC]; struct clk *input_clks[CDNS_SIERRA_INPUT_CLOCKS]; int nsubnodes; u32 num_lanes; bool autoconf; + struct clk_onecell_data clk_data; + struct clk *output_clks[CDNS_SIERRA_OUTPUT_CLOCKS]; }; static int cdns_regmap_write(void *context, unsigned int reg, unsigned int val) @@ -369,6 +433,153 @@ static const struct phy_ops ops = { .owner = THIS_MODULE, }; +static u8 cdns_sierra_pll_mux_get_parent(struct clk_hw *hw) +{ + struct cdns_sierra_pll_mux *mux = to_cdns_sierra_pll_mux(hw); + struct regmap_field *field = mux->pfdclk_sel_preg; + unsigned int val; + + regmap_field_read(field, &val); + return clk_mux_val_to_index(hw, cdns_sierra_pll_mux_table, 0, val); +} + +static int cdns_sierra_pll_mux_set_parent(struct clk_hw *hw, u8 index) +{ + struct cdns_sierra_pll_mux *mux = to_cdns_sierra_pll_mux(hw); + struct regmap_field *plllc1en_field = mux->plllc1en_field; + struct regmap_field *termen_field = mux->termen_field; + struct regmap_field *field = mux->pfdclk_sel_preg; + int val, ret; + + ret = regmap_field_write(plllc1en_field, 0); + ret |= regmap_field_write(termen_field, 0); + if (index == 1) { + ret |= regmap_field_write(plllc1en_field, 1); + ret |= regmap_field_write(termen_field, 1); + } + + val = cdns_sierra_pll_mux_table[index]; + ret |= regmap_field_write(field, val); + + return ret; +} + +static const struct clk_ops cdns_sierra_pll_mux_ops = { + .set_parent = cdns_sierra_pll_mux_set_parent, + .get_parent = cdns_sierra_pll_mux_get_parent, +}; + +static int cdns_sierra_pll_mux_register(struct cdns_sierra_phy *sp, + struct regmap_field *pfdclk1_sel_field, + struct regmap_field *plllc1en_field, + struct regmap_field *termen_field, + int clk_index) +{ + struct cdns_sierra_pll_mux *mux; + struct device *dev = sp->dev; + struct clk_init_data *init; + const char **parent_names; + unsigned int num_parents; + char clk_name[100]; + struct clk *clk; + int i; + + mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); + if (!mux) + return -ENOMEM; + + num_parents = SIERRA_NUM_CMN_PLLC_PARENTS; + parent_names = devm_kzalloc(dev, (sizeof(char *) * num_parents), GFP_KERNEL); + if (!parent_names) + return -ENOMEM; + + for (i = 0; i < num_parents; i++) { + clk = sp->input_clks[pll_mux_parent_index[clk_index][i]]; + if (IS_ERR_OR_NULL(clk)) { + dev_err(dev, "No parent clock for derived_refclk\n"); + return PTR_ERR(clk); + } + parent_names[i] = __clk_get_name(clk); + } + + snprintf(clk_name, sizeof(clk_name), "%s_%s", dev_name(dev), clk_names[clk_index]); + + init = &mux->clk_data; + + init->ops = &cdns_sierra_pll_mux_ops; + init->flags = CLK_SET_RATE_NO_REPARENT; + init->parent_names = parent_names; + init->num_parents = num_parents; + init->name = clk_name; + + mux->pfdclk_sel_preg = pfdclk1_sel_field; + mux->plllc1en_field = plllc1en_field; + mux->termen_field = termen_field; + mux->hw.init = init; + + clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + sp->output_clks[clk_index] = clk; + + return 0; +} + +static int cdns_sierra_phy_register_pll_mux(struct cdns_sierra_phy *sp) +{ + struct regmap_field *pfdclk1_sel_field; + struct regmap_field *plllc1en_field; + struct regmap_field *termen_field; + struct device *dev = sp->dev; + int ret = 0, i, clk_index; + + clk_index = CDNS_SIERRA_PLL_CMNLC; + for (i = 0; i < SIERRA_NUM_CMN_PLLC; i++, clk_index++) { + pfdclk1_sel_field = sp->cmn_plllc_pfdclk1_sel_preg[i]; + plllc1en_field = sp->cmn_refrcv_refclk_plllc1en_preg[i]; + termen_field = sp->cmn_refrcv_refclk_termen_preg[i]; + + ret = cdns_sierra_pll_mux_register(sp, pfdclk1_sel_field, plllc1en_field, + termen_field, clk_index); + if (ret) { + dev_err(dev, "Fail to register cmn plllc mux\n"); + return ret; + } + } + + return 0; +} + +static void cdns_sierra_clk_unregister(struct cdns_sierra_phy *sp) +{ + struct device *dev = sp->dev; + struct device_node *node = dev->of_node; + + of_clk_del_provider(node); +} + +static int cdns_sierra_clk_register(struct cdns_sierra_phy *sp) +{ + struct device *dev = sp->dev; + struct device_node *node = dev->of_node; + int ret; + + ret = cdns_sierra_phy_register_pll_mux(sp); + if (ret) { + dev_err(dev, "Failed to pll mux clocks\n"); + return ret; + } + + sp->clk_data.clks = sp->output_clks; + sp->clk_data.clk_num = CDNS_SIERRA_OUTPUT_CLOCKS; + ret = of_clk_add_provider(node, of_clk_src_onecell_get, &sp->clk_data); + if (ret) + dev_err(dev, "Failed to add clock provider: %s\n", node->name); + + return ret; +} + static int cdns_sierra_get_optional(struct cdns_sierra_inst *inst, struct device_node *child) { @@ -407,6 +618,7 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) { struct device *dev = sp->dev; struct regmap_field *field; + struct reg_field reg_field; struct regmap *regmap; int i; @@ -418,6 +630,32 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) } sp->macro_id_type = field; + for (i = 0; i < SIERRA_NUM_CMN_PLLC; i++) { + reg_field = cmn_plllc_pfdclk1_sel_preg[i].pfdclk_sel_preg; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "PLLLC%d_PFDCLK1_SEL failed\n", i); + return PTR_ERR(field); + } + sp->cmn_plllc_pfdclk1_sel_preg[i] = field; + + reg_field = cmn_plllc_pfdclk1_sel_preg[i].plllc1en_field; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "REFRCV%d_REFCLK_PLLLC1EN failed\n", i); + return PTR_ERR(field); + } + sp->cmn_refrcv_refclk_plllc1en_preg[i] = field; + + reg_field = cmn_plllc_pfdclk1_sel_preg[i].termen_field; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "REFRCV%d_REFCLK_TERMEN failed\n", i); + return PTR_ERR(field); + } + sp->cmn_refrcv_refclk_termen_preg[i] = field; + } + regmap = sp->regmap_phy_config_ctrl; field = devm_regmap_field_alloc(dev, regmap, phy_pll_cfg_1); if (IS_ERR(field)) { @@ -511,6 +749,22 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, } sp->input_clks[CMN_REFCLK1_DIG_DIV] = clk; + clk = devm_clk_get_optional(dev, "pll0_refclk"); + if (IS_ERR(clk)) { + dev_err(dev, "pll0_refclk clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->input_clks[PLL0_REFCLK] = clk; + + clk = devm_clk_get_optional(dev, "pll1_refclk"); + if (IS_ERR(clk)) { + dev_err(dev, "pll1_refclk clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->input_clks[PLL1_REFCLK] = clk; + return 0; } @@ -586,13 +840,17 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - ret = cdns_sierra_phy_get_resets(sp, dev); + ret = cdns_sierra_clk_register(sp); if (ret) return ret; + ret = cdns_sierra_phy_get_resets(sp, dev); + if (ret) + goto unregister_clk; + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); if (ret) - return ret; + goto unregister_clk; /* Enable APB */ reset_control_deassert(sp->apb_rst); @@ -669,6 +927,8 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) clk_disable: clk_disable_unprepare(sp->input_clks[PHY_CLK]); reset_control_assert(sp->apb_rst); +unregister_clk: + cdns_sierra_clk_unregister(sp); return ret; } @@ -691,6 +951,7 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) } clk_disable_unprepare(phy->input_clks[PHY_CLK]); + cdns_sierra_clk_unregister(phy); return 0; } From patchwork Wed Mar 10 15:45:58 2021 Content-Type: text/plain; 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This will enable REFRCV/1 in case the pll_cmnlc/1 takes input from REFRCV/1 respectively. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 40 ++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: Swapnil Jakhade diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 039ca10db59d..5c68e31c5939 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -768,6 +768,40 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_enable_clocks(struct cdns_sierra_phy *sp) +{ + int ret; + + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); + if (ret) + return ret; + + ret = clk_prepare_enable(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + if (ret) + goto err_pll_cmnlc; + + ret = clk_prepare_enable(sp->output_clks[CDNS_SIERRA_PLL_CMNLC1]); + if (ret) + goto err_pll_cmnlc1; + + return 0; + +err_pll_cmnlc1: + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + +err_pll_cmnlc: + clk_disable_unprepare(sp->input_clks[PHY_CLK]); + + return ret; +} + +static void cdns_sierra_phy_disable_clocks(struct cdns_sierra_phy *sp) +{ + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC1]); + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + clk_disable_unprepare(sp->input_clks[PHY_CLK]); +} + static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, struct device *dev) { @@ -848,7 +882,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) goto unregister_clk; - ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); + ret = cdns_sierra_phy_enable_clocks(sp); if (ret) goto unregister_clk; @@ -925,7 +959,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) reset_control_put(sp->phys[i].lnk_rst); of_node_put(child); clk_disable: - clk_disable_unprepare(sp->input_clks[PHY_CLK]); + cdns_sierra_phy_disable_clocks(sp); reset_control_assert(sp->apb_rst); unregister_clk: cdns_sierra_clk_unregister(sp); @@ -941,6 +975,7 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_assert(phy->apb_rst); pm_runtime_disable(&pdev->dev); + cdns_sierra_phy_disable_clocks(phy); /* * The device level resets will be put automatically. * Need to put the subnode resets here though. @@ -950,7 +985,6 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_put(phy->phys[i].lnk_rst); } - clk_disable_unprepare(phy->input_clks[PHY_CLK]); cdns_sierra_clk_unregister(phy); return 0;