From patchwork Wed Mar 10 11:27:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396690 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp292863jai; Wed, 10 Mar 2021 03:28:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJzbUIOvmdIYFmF+xKKT7wLoJyrLr4RRCRPvyDC0g7ppQaT4teHa2PPNfRQ6+wCDx3Re9SnU X-Received: by 2002:a17:906:d19b:: with SMTP id c27mr3081104ejz.304.1615375726288; Wed, 10 Mar 2021 03:28:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615375726; cv=none; d=google.com; s=arc-20160816; b=OEnAXsj3wUy2FYPxIEde3tKt6Ul58R1nInVMJxn3IEKg6H4ElcTfwaQ1bSt/24+Hm6 DI7PaclU5EXmAWv9coJSxJtGYRJNc0BmTM/nCkg3Vf2g0AkIJoHz/RY1/BopNMJdJvcW wtGqlzqr70IVQYGTUGPyX4NACTp9sVbZ19KA2hlyPVnwXagzMJIvnO6d/9CsDhfI9ZJ7 bUZ6JCCZxY9CyQwBDVpA81nYyaNH9FE7KEGdLkMX1vz0RrthNbXrPv4C5bZyEDt0F2OD 7EchJ3O5mDg34qKouSU7FYU0nEYOcaDW1aOCTvIxImb2g0tSMdA/muCpsDC7zAJm7EeA 8v8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=txzXDqzah1cXMGc2Vrj1LgAlg8bE2NElSfqfoXqQoAc=; b=gJbIDagw3qjMIE+wbRSyfVfLIkbqfudWgxYhxHgieZyKffZoFfDm+RN1Drcqd5Tq3E dIKi6rOgIo4x1xbtGVG1jQtHP2lvevEpHOzbtN0kofUnjPgZygyJQyxUEo0FjelryoNj 4EgQINyIdKAX11GzbNFbn2goEuE6ncp1thgzzLmB2T+2yGkC5qCYAhwyupEEpDzJvZin rA+ujDp6Oq57kfjPKePT9b4UPFe+v76KaSiRtbtXUyJlaRL1nUOOxPv6bHkW2N7WM2Db +z7Rs3XQU9F18J3/+6ed0iiJcamlv59Co28aUAcHgJPE6MehQFQSwWPbCjDM8e+LbdGD GDYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RkuSJsA5; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cf26si11287160ejb.702.2021.03.10.03.28.46; Wed, 10 Mar 2021 03:28:46 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RkuSJsA5; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232759AbhCJL2P (ORCPT + 6 others); Wed, 10 Mar 2021 06:28:15 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36358 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229706AbhCJL2D (ORCPT ); Wed, 10 Mar 2021 06:28:03 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12ABRuiM017775; Wed, 10 Mar 2021 05:27:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615375676; bh=txzXDqzah1cXMGc2Vrj1LgAlg8bE2NElSfqfoXqQoAc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RkuSJsA5JOjvz7Miv035Tt4Vf1IXG3FghStn5qsldS6NPvvCWNAJO2gOBEn7jF33n kLjNDR0Lo1Z0T0E3ImZd4WJyqtw3xHJ0o3U/hnYuX5ZbZG24Yk/hEB0x0NYhNzmXZw s6F1Ot5ugoUhB9eJmwkavpm4KRwYHSuZ3msqVlpw= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12ABRuUJ049371 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 10 Mar 2021 05:27:56 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 10 Mar 2021 05:27:55 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 10 Mar 2021 05:27:55 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12ABRkvX075949; Wed, 10 Mar 2021 05:27:52 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Peter Rosin , Swapnil Jakhade CC: , , Aswath Govindraju , Nishanth Menon , Lokesh Vutla Subject: [PATCH 1/3] dt-bindings: phy: ti, phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper Date: Wed, 10 Mar 2021 16:57:43 +0530 Message-ID: <20210310112745.3445-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210310112745.3445-1-kishon@ti.com> References: <20210310112745.3445-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for AM64 SERDES Wrapper. Signed-off-by: Kishon Vijay Abraham I --- .../bindings/phy/ti,phy-j721e-wiz.yaml | 4 ++++ include/dt-bindings/phy/phy-ti.h | 21 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 include/dt-bindings/phy/phy-ti.h -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml index bbbd85501ada..57e1d013a502 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml @@ -15,6 +15,7 @@ properties: enum: - ti,j721e-wiz-16g - ti,j721e-wiz-10g + - ti,am64-wiz-10g power-domains: maxItems: 1 @@ -42,6 +43,9 @@ properties: "#reset-cells": const: 1 + "#clock-cells": + const: 1 + ranges: true assigned-clocks: diff --git a/include/dt-bindings/phy/phy-ti.h b/include/dt-bindings/phy/phy-ti.h new file mode 100644 index 000000000000..ad955d3a56b4 --- /dev/null +++ b/include/dt-bindings/phy/phy-ti.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for TI SERDES. + */ + +#ifndef _DT_BINDINGS_TI_SERDES +#define _DT_BINDINGS_TI_SERDES + +/* Clock index for output clocks from WIZ */ + +/* MUX Clocks */ +#define TI_WIZ_PLL0_REFCLK 0 +#define TI_WIZ_PLL1_REFCLK 1 +#define TI_WIZ_REFCLK_DIG 2 + +/* Reserve index here for future additions */ + +/* MISC Clocks */ +#define TI_WIZ_PHY_EN_REFCLK 16 + +#endif /* _DT_BINDINGS_TI_SERDES */ From patchwork Wed Mar 10 11:27:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396693 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp292887jai; Wed, 10 Mar 2021 03:28:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJxmQaSuy+5EbEpqisAIn+jbDkClovbWhb9ITwxeduypmuJ3fc+P5BUR5NRzft8s632MI406 X-Received: by 2002:a17:906:f9d8:: with SMTP id lj24mr3131565ejb.200.1615375727928; Wed, 10 Mar 2021 03:28:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615375727; cv=none; d=google.com; s=arc-20160816; b=HrS5zpBkYuu+JrQnIszxNo2iUI1uai++H7+P22WllHdd9ZoblKgsnOicl4jbfRqOMQ ESSg3x5wvn6u/jsC2Nrhvaxt9mR+vdWaAw27UEzKnUPz1XHP+VdYA1QQ4pZtmwARqUty LLqP/Ksj+bifjn6pD2evxC3O36at1lOyUkiBpfFAc00o2tbBqErp9M48GP0LxlyHvy5K iymZdM7bf6PUPkTameQRBBUMb3Mp8XOqnQuh2/vH782wD01xYGibbg847y9WkFi7dj1c 1XPV1Yja/5mGR58bs23ixHYlWr3JuZM6JJsqk4ONqTnquJX9cGo706X3r0UXnBKU8grX 3P6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=cg9W4wq6kP43qgPR1Y0OmcHp/RkeePsLyslThe/SZ5s=; b=q4FvnjT+6zF8caL4dmcbEHgH7a0a6P7sDnR5b/MvG4QOrz3/5CoatDACLSX1qfXBLb Ami5bEXyG6EsZ5XjrB4vTJFmLWRJCkurvK6eCPvpsn7v5WiULes/2B/3g1Kx3aaB+c2M 6OwO5TIZnrzzRPNAEYyk/t7ghavznhkGqXzssXMucrnjD+/Dt4gs/ABceKcbAoaOF4rc LiUdBw3M3o/6WYyw+LyQzOMZN3K3DEwJXYJ9Jm+d7pbl5KFQoYgpT2rk8dnIFH6meb7I EdMTo9JX6/fHqLlWF0fIhd14z5DLTf2BVQ5N9ZAhaEDrdSTUjiDf91QuxuMOQlcOm7Tm hRQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ipqh62xG; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- .../bindings/phy/phy-cadence-torrent.yaml | 20 ++++++++++++++++--- include/dt-bindings/phy/phy-cadence-torrent.h | 2 ++ 2 files changed, 19 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml index e266ade53d87..4608599a31d8 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml @@ -28,13 +28,27 @@ properties: '#size-cells': const: 0 + '#clock-cells': + const: 1 + clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 description: - PHY reference clock. Must contain an entry in clock-names. + PHY reference clock for 1 item. Must contain an entry in clock-names. + Optional Parent to enable output reference clock. clock-names: - const: refclk + minItems: 1 + items: + - const: refclk + - const: phy_en_refclk + + assigned-clocks: + maxItems: 3 + + assigned-clock-parents: + maxItems: 3 reg: minItems: 1 diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence-torrent.h index e387b6a95741..3c92c6192493 100644 --- a/include/dt-bindings/phy/phy-cadence-torrent.h +++ b/include/dt-bindings/phy/phy-cadence-torrent.h @@ -10,4 +10,6 @@ #define TORRENT_SERDES_EXTERNAL_SSC 1 #define TORRENT_SERDES_INTERNAL_SSC 2 +#define CDNS_TORRENT_REFCLK_DRIVER 0 + #endif /* _DT_BINDINGS_TORRENT_SERDES_H */ From patchwork Wed Mar 10 11:27:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 396692 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp292874jai; Wed, 10 Mar 2021 03:28:47 -0800 (PST) X-Google-Smtp-Source: ABdhPJwHf6du0vYA788I7DxdsQqOX9R38s8aDPUWERvIJafoUK6J84ayPt9UR9IeVC5INt38iT4n X-Received: by 2002:a17:906:b80c:: with SMTP id dv12mr3188172ejb.110.1615375727105; Wed, 10 Mar 2021 03:28:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615375727; cv=none; d=google.com; s=arc-20160816; b=Ol3N+/DVBwoqFyF1895zpNiEz9vIIRf7h9vKUgy9MdLK1DwUxEbDh9VPl8Y4M3RHzG 3IdulPZzV/QCBVwRw5s3kze3VO8rNiIGfl/2EAaAwW3gYAe0/ILZldIsR32JX6y+6S+e Ccti4BY6RKFMqxr+uEbUTdp13oix3Cu5gSdFhmx4TSlPECS5zpuhmd25RGf6BwgJ9XrT s7iih4IHOWbW8BwMAlJkzsu6co/gpSG92BBEMzCV7MJdZTcBEfg298ODyLAbirPvmbPX jVMfA3aKHiVRtalPeu1droJjgizoz/KaGTElAKVFC7LJKqSI9e6HTWbXE5Mv9cBIUxDG S7oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=HrnytEEcUd6i+UBJygxWFwE8sMSucQF4jASkNH69I8U=; b=e33Yx+N/6n8Mx0hTyspZagaJ6ko43z/k7uTmX1S166stR7BptVfmp9lyov3pIlfZMO vF0AFS34K1RMSXfB/swt6GCn5TGT6EnWbjI5Oj2r3DRQqo7PXUxlXq93QoGADlMLrADu oyuvhq8jTiufCUYh2pYROAy/IS1WcpuMbCO88Y3R8EMLMCrstWk8b/+wekRP9v3Yerw1 otS+pLoFMrhxfzyE5C8NW6kuK3ICIIp/9hCfC9C6edM8rrXTyQXoGtrZv6DJsqmwkucy ruHxmiN1lfdF13cYQqOhKXZsgyHD8UO3RXoRXgbUCRONwvDj0GDSuvB1NKQ2NLbl8Xb5 fDQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="IUU7N/7s"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Define the possilbe values for the SERDES function in AM64 SoC here. Signed-off-by: Kishon Vijay Abraham I Acked-by: Peter Rosin Acked-by: Rob Herring --- include/dt-bindings/mux/ti-serdes.h | 5 +++++ 1 file changed, 5 insertions(+) -- 2.17.1 diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h index 9047ec6bd3cf..d417b9268b16 100644 --- a/include/dt-bindings/mux/ti-serdes.h +++ b/include/dt-bindings/mux/ti-serdes.h @@ -90,4 +90,9 @@ #define J7200_SERDES0_LANE3_USB 0x2 #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3 +/* AM64 */ + +#define AM64_SERDES0_LANE0_PCIE0 0x0 +#define AM64_SERDES0_LANE0_USB 0x1 + #endif /* _DT_BINDINGS_MUX_TI_SERDES */