From patchwork Mon Apr 23 07:51:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 133973 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp700330lji; Mon, 23 Apr 2018 00:56:52 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoIowBeNBiu1jmcFlEXom4JvkIdd3XFRCedlWs70pJsI+TsBp5Hy22dnFNoQdiOnEFCbVv8 X-Received: by 10.55.60.203 with SMTP id j194mr21323768qka.31.1524470212764; Mon, 23 Apr 2018 00:56:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524470212; cv=none; d=google.com; s=arc-20160816; b=BwpuMJoO0qbTS9cKHSBZelYimeJJ3xsUnjCfWPrnb4ayZ/I8XqMpRYSpIYQE1GuHQr 0hIWB8MWiD+KknoswE2bsEJk4jR7UyTC/Uz4FM8y4WGzHHUmynNu0lCxdLXLUTYrcF0p DkmZ3BWFzvPWPdibajyFYyLXlw3IDN0+Ybjk7G58Yv0M99/1XK99plmnyDia0SEqUq30 yJd5sfFG9C8lE86MaiCxMpgB5L2wW4qcWhWpIRv1qge0DurxJDzjkdgDd/odCWRgAY5w bC2jloIlALpomtXmsSAEiO5Eiz3qlIIaFo1EQ7lNjGvYw9eWteVsXj8IKIccE0qSP2NU GQcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:mime-version:references :in-reply-to:message-id:date:to:from:arc-authentication-results; bh=3B+IDwYlUdRZPcjAilibwN9TneGTLk/D6rvEEVtLvcM=; b=PgFdM2FTs1lf0bpLzUJZNIhpiElRhoQiMhPMtDnoZY1gWTT3SNmeVe8ogCbBTsk0QW F2+nrI76zQY2vq3w7/kqhk/FRcdmBKIiZN+ea33UDI37ebZ6nEWKFHEUAjWKrLnSrxr5 RPvXWfoh3cdOUcK5OF8D0vG6X4qVklAU6BhuXb2x3yXkvyzj8Xg97FR4T/VIqB1Q4tvd 9GkxwzIkZwuGVnL40O6sNmJBLy16zrca0AWs/d/LSTsnP3UbM4eqJiRZQo9IFxG02yGo YPc4pMXJGhWy7o7o8CBo6dJ+4zNAmMTCdCK8Qa+YqsnXqcl//2gBcbzDey67tx9R7kKE YBog== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c6si2277701qkb.164.2018.04.23.00.56.52 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 23 Apr 2018 00:56:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:51983 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWLE-000238-AA for patch@linaro.org; Mon, 23 Apr 2018 03:56:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60992) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWHM-0008Qy-Kk for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:52:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fAWHJ-0000BV-Iv for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:52:52 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:52170) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fAWHJ-0000Ao-9u for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:52:49 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3N7nVTj027828; Mon, 23 Apr 2018 09:52:41 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2tsguf-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 09:52:40 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5765C3D; Mon, 23 Apr 2018 07:52:40 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0D2B811E3; Mon, 23 Apr 2018 07:52:40 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 23 Apr 2018 09:52:39 +0200 From: Christophe Lyon To: , , , , Date: Mon, 23 Apr 2018 09:51:52 +0200 Message-ID: <20180423075215.4572-2-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180423075215.4572-1-christophe.lyon@st.com> References: <20180423075215.4572-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-23_04:, , signatures=0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC v2 1/4] Remove CONFIG_USE_FDPIC. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We want to avoid code disabled by default, because it ends up less tested. This patch removes all instances of #ifdef CONFIG_USE_FDPIC, most of which can be safely kept. For the ones that should be conditionally executed, we define elf_is_fdpic(). Without this patch, defining CONFIG_USE_FDPIC would prevent QEMU from building precisely because elf_is_fdpic is not defined. Signed-off-by: Christophe Lyon -- 2.6.3 Reviewed-by: Peter Maydell diff --git a/linux-user/elfload.c b/linux-user/elfload.c index c77ed1b..bbe93b0 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1681,7 +1681,12 @@ static void zero_bss(abi_ulong elf_bss, abi_ulong last_bss, int prot) } } -#ifdef CONFIG_USE_FDPIC +/* Default implementation, always false. */ +static int elf_is_fdpic(struct elfhdr *exec) +{ + return 0; +} + static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp) { uint16_t n; @@ -1706,7 +1711,6 @@ static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong s return sp; } -#endif static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, struct elfhdr *exec, @@ -1725,7 +1729,6 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, sp = p; -#ifdef CONFIG_USE_FDPIC /* Needs to be before we load the env/argc/... */ if (elf_is_fdpic(exec)) { /* Need 4 byte alignment for these structs */ @@ -1737,7 +1740,6 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, sp = loader_build_fdpic_loadmap(interp_info, sp); } } -#endif u_platform = 0; k_platform = ELF_PLATFORM; @@ -2153,10 +2155,8 @@ static void load_elf_image(const char *image_name, int image_fd, } bswap_phdr(phdr, ehdr->e_phnum); -#ifdef CONFIG_USE_FDPIC info->nsegs = 0; info->pt_dynamic_addr = 0; -#endif mmap_lock(); @@ -2173,9 +2173,7 @@ static void load_elf_image(const char *image_name, int image_fd, if (a > hiaddr) { hiaddr = a; } -#ifdef CONFIG_USE_FDPIC ++info->nsegs; -#endif } } @@ -2200,8 +2198,7 @@ static void load_elf_image(const char *image_name, int image_fd, } load_bias = load_addr - loaddr; -#ifdef CONFIG_USE_FDPIC - { + if (elf_is_fdpic(ehdr)) { struct elf32_fdpic_loadseg *loadsegs = info->loadsegs = g_malloc(sizeof(*loadsegs) * info->nsegs); @@ -2219,7 +2216,6 @@ static void load_elf_image(const char *image_name, int image_fd, } } } -#endif info->load_bias = load_bias; info->load_addr = load_addr; diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 192a0d2..da3b517 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -51,13 +51,13 @@ struct image_info { abi_ulong file_string; uint32_t elf_flags; int personality; -#ifdef CONFIG_USE_FDPIC + + /* The fields below are used in FDPIC mode. */ abi_ulong loadmap_addr; uint16_t nsegs; void *loadsegs; abi_ulong pt_dynamic_addr; struct image_info *other_info; -#endif }; #ifdef TARGET_I386 From patchwork Mon Apr 23 07:51:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 133974 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp701340lji; Mon, 23 Apr 2018 00:58:15 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrQaDhja10z9c5qxvffwz/xAMK1uGv1GDJkySUt3a7i0HjnqU7ikiLkrf9agDpDbrt92D+k X-Received: by 10.55.57.134 with SMTP id g128mr21289482qka.369.1524470295826; Mon, 23 Apr 2018 00:58:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524470295; cv=none; d=google.com; s=arc-20160816; b=z7dgNZnsBsEtWiMVQULbVJBarj+CJhS2TVfgYLTFowDGm27jG5YCGrIKOEU+2TbxLZ WwblJ2H9fEvRr4QeX8qbd1WWaEhuSo2tEWe97lGMpPOzMiXKtAHxOuZrJxBq8FmhhBdS X+isA2ihNg2Mt2iF1so8UDai7DaGNQu9K8TpDMvmRM+AaRl5CEnWYRnhgfViRwgwdg2R s7DkgpSEFS+KGSP+GBlTmtAeMXL7s/DinrSb+CTeBRLTcYEsw6Ljn6n4WoN9KTJzmRYm fN4DdG6izL3aWAR8PmvvKNKlxHZBjFuRQ0LjBM6qSBHOMWauE9vjFgWH8AOwn0bOPfOB zYiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=6KrPELbn9ochoMczgYbSqG0jAtnKiYLepoONM2OyDIQ=; b=bncTRpowA60JrVgWA6zY6Y04Kc1Ri3ZkEaYFwmUURwLl3dkxfha+/Qr5XEFHQ1BtZD 8glNE4bQQFwszTYE9ohkuKwcC+REJnQMIaqHGVzehUX6N1NeBY4D0P8QOQwTYUurBNVb QjJRXZjtXK/HA4C6CdJTVT/xRjWN97YN77LfIHT59y9PD4y7YDXCeCOD45YdqvOJ8UkL nZ81t9uO8OqGymPIKit6e8WzAp7iFFSFf0V+m3ZjaCtms2A+F/XZKg3pMZPvd4auYpOS I4HCxWUGL4K8OwwMjyoOfOicIIGihyX2M6981caY0Je9mVHsFMMj12fvsKObK6Yxy3oY I0TA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id e64si8112910qkh.332.2018.04.23.00.58.15 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 23 Apr 2018 00:58:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:52131 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWMZ-0003Js-BJ for patch@linaro.org; Mon, 23 Apr 2018 03:58:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32903) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWHd-0000A8-Ei for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fAWHa-0000IN-BQ for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:09 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:20030) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fAWHa-0000Hv-1A for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:06 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3N7nUcp027825; Mon, 23 Apr 2018 09:53:01 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2tsgw6-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 09:53:01 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A6C3F38; Mon, 23 Apr 2018 07:53:00 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4C342118E; Mon, 23 Apr 2018 07:53:00 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 23 Apr 2018 09:52:59 +0200 From: Christophe Lyon To: , , , , Date: Mon, 23 Apr 2018 09:51:53 +0200 Message-ID: <20180423075215.4572-3-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180423075215.4572-1-christophe.lyon@st.com> References: <20180423075215.4572-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-23_04:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx07-.pphosted.com id w3N7nUcp027825 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC v2 2/4] linux-user: ARM-FDPIC: Identify ARM FDPIC binaries X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Define an ARM-specific version of elf_is_fdpic: FDPIC ELF objects are identified with e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC. Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 Reviewed-by: Peter Maydell diff --git a/include/elf.h b/include/elf.h index c0dc9bb..934dbbd 100644 --- a/include/elf.h +++ b/include/elf.h @@ -1483,6 +1483,7 @@ typedef struct elf64_shdr { #define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ #define ELFOSABI_MODESTO 11 /* Novell Modesto. */ #define ELFOSABI_OPENBSD 12 /* OpenBSD. */ +#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */ #define ELFOSABI_ARM 97 /* ARM */ #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index bbe93b0..76d7718 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1681,11 +1681,18 @@ static void zero_bss(abi_ulong elf_bss, abi_ulong last_bss, int prot) } } +#ifdef TARGET_ARM +static int elf_is_fdpic(struct elfhdr *exec) +{ + return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC; +} +#else /* Default implementation, always false. */ static int elf_is_fdpic(struct elfhdr *exec) { return 0; } +#endif static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp) { From patchwork Mon Apr 23 07:51:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 133975 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp703365lji; Mon, 23 Apr 2018 01:00:49 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpVREAwonBgkPzc0xIobUQ/w/W6y6RCF7sBxp4xTt2Z12RnS75FTHCHCE8VcH/LWQdfK8Vc X-Received: by 10.55.75.146 with SMTP id y140mr20549056qka.222.1524470449550; Mon, 23 Apr 2018 01:00:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524470449; cv=none; d=google.com; s=arc-20160816; b=Iz2mbXaJtmmvfHMYa0n7souBmWiEg7WT/id4IXLY9UyWpeHw5BqPfDpM5dTy2YtCJI Yt4CM5Zeawn1S9dVP7G6keg4P4Wu4QJn5AC6Z+EG4BLZCK+wcJ4t4mVEe8PeAz3Q30A3 zreEnVTR6rOyQQnoUsSBqoHZsKmFxQiad7GpMK10OeyS9ru2I2f2lgrCQK9Pu+jKI2Du IBtwXm9PwELURmQqVozENEbxkQsi8k1a5/OYITfG50WM6iY9HlfHjUU1P6bZKA4Ap6j0 rVNwU6YZsm80nlMcxS46IHu8nB/KjS70zQKTimo6eFdXb4QvX04WdlICxc4diFjnZkpk JIIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=5Zsji9SoaaQBFFjtViPA+5zhfnxNSwsLAWGRGFUl99k=; b=Lt3jwDSbNOcDcWS+W1jhjIgVyxQ/voo5sW8HBplg8pdxJucGs/hccqPyzl9pRK5+le 6sPSuBGjh5d2OHX8l+SgUS1vuEJpGEsluVmEnExYmaUHNOnAfw+Li2vKqQVZNrirKmCd zx+akglvVzEXuBmNxnUCwdmQIbgMQTFSc4hxUG56TkhN6R+q03YZnpGPQ4eRJsnLLSbg jB+A8c/Lab/jReDC62dDe0XEEORcKbF8/2+dWCgIBGPSpA+c0ZFLDRQrPUgnvtB52IF1 BqvKh29BWAd9xXSZL0hpnE66lMKZuOohSTTxOs/qYfi5x/XEtiThK3sLSFqFhrDbugxQ JJKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id n6-v6si6001171qtp.279.2018.04.23.01.00.49 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 23 Apr 2018 01:00:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:52189 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWP2-0004Zw-U1 for patch@linaro.org; Mon, 23 Apr 2018 04:00:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWHx-0000L4-7O for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fAWHu-0000RV-3v for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:29 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:33251) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fAWHt-0000RA-QP for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:26 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3N7nTXj027816; Mon, 23 Apr 2018 09:53:21 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2tsgy2-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 09:53:21 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E362934; Mon, 23 Apr 2018 07:53:20 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9131E14D5; Mon, 23 Apr 2018 07:53:20 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 23 Apr 2018 09:53:20 +0200 From: Christophe Lyon To: , , , , Date: Mon, 23 Apr 2018 09:51:54 +0200 Message-ID: <20180423075215.4572-4-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180423075215.4572-1-christophe.lyon@st.com> References: <20180423075215.4572-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-23_04:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx07-.pphosted.com id w3N7nTXj027816 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC v2 3/4] linux-user: ARM-FDPIC: Add support of FDPIC for ARM. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add FDPIC info into image_info structure since interpreter info is on stack and needs to be saved to be accessed later on. Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 76d7718..1ee1e38 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -78,6 +78,11 @@ enum { */ #define personality(pers) (pers & PER_MASK) +int info_is_fdpic(struct image_info *info) +{ + return (info->personality == PER_LINUX_FDPIC); +} + /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE #define MAP_DENYWRITE 0 @@ -287,6 +292,24 @@ static inline void init_thread(struct target_pt_regs *regs, /* For uClinux PIC binaries. */ /* XXX: Linux does this only on ARM with no MMU (do we care ?) */ regs->uregs[10] = infop->start_data; + + /* Support ARM FDPIC. */ + if (info_is_fdpic(infop)) { + /* As described in the ABI document, r7 points to the loadmap info + * prepared by the kernel. If an interpreter is needed, r8 points + * to the interpreter loadmap and r9 points to the interpreter + * PT_DYNAMIC info. If no interpreter is needed, r8 is zer0, and + * r9 points to the main program PT_DYNAMIC info. */ + regs->uregs[7] = infop->loadmap_addr; + if (infop->interpreter_loadmap_addr) { + /* Executable is dynamically loaded. */ + regs->uregs[8] = infop->interpreter_loadmap_addr; + regs->uregs[9] = infop->interpreter_pt_dynamic_addr; + } else { + regs->uregs[8] = 0; + regs->uregs[9] = infop->pt_dynamic_addr; + } + } } #define ELF_NREG 18 @@ -1745,6 +1768,11 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, if (interp_info) { interp_info->other_info = info; sp = loader_build_fdpic_loadmap(interp_info, sp); + info->interpreter_loadmap_addr = interp_info->loadmap_addr; + info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr; + } else { + info->interpreter_loadmap_addr = 0; + info->interpreter_pt_dynamic_addr = 0; } } diff --git a/linux-user/main.c b/linux-user/main.c index 2acac36..3579f0e 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -4893,6 +4893,9 @@ int main(int argc, char **argv, char **envp) env->cp15.sctlr_el[1] |= SCTLR_B; } #endif + + /* Are we running an FDPIC binary? */ + ((TaskState *)thread_cpu->opaque)->is_fdpic = info_is_fdpic(info); } #elif defined(TARGET_SPARC) { diff --git a/linux-user/qemu.h b/linux-user/qemu.h index da3b517..a2ed148 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -57,6 +57,8 @@ struct image_info { uint16_t nsegs; void *loadsegs; abi_ulong pt_dynamic_addr; + abi_ulong interpreter_loadmap_addr; + abi_ulong interpreter_pt_dynamic_addr; struct image_info *other_info; }; @@ -145,6 +147,9 @@ typedef struct TaskState { */ int signal_pending; + /* We need to know if we have an FDPIC binary to adapt signal + * syscalls. */ + int is_fdpic; } __attribute__((aligned(16))) TaskState; extern char *exec_path; @@ -182,6 +187,7 @@ abi_ulong loader_build_argptr(int envc, int argc, abi_ulong sp, int loader_exec(int fdexec, const char *filename, char **argv, char **envp, struct target_pt_regs * regs, struct image_info *infop, struct linux_binprm *); +int info_is_fdpic(struct image_info *info); uint32_t get_elf_eflags(int fd); int load_elf_binary(struct linux_binprm *bprm, struct image_info *info); From patchwork Mon Apr 23 07:51:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 133972 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp700028lji; Mon, 23 Apr 2018 00:56:25 -0700 (PDT) X-Google-Smtp-Source: AB8JxZre0NFchw0dga6PLyGU2egUalwbWZbAjj4QPJW51iLYn1oR1696fXGXeu/P4YRqEuSKoduv X-Received: by 10.55.112.71 with SMTP id l68mr16285144qkc.219.1524470185436; Mon, 23 Apr 2018 00:56:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524470185; cv=none; d=google.com; s=arc-20160816; b=FrHCi5G+ftrSdPpPaKeK8watPKMecIaRpfjlnTX/WDBW565NupRIAHzILrm/FSmUBQ lIXLtGy8DuwFmn6+54HLZkf9pCZnBy/f8CH9n0b3KSNDewBr9YPm1uG82kWBzM1uFJ/w +NI9tlNttRvGFzdSkh9bQlqdOqEtySypP6n83a3VUutV0RhR75wF0kNi/ZjpwqWOfTZj jB4PQCkXgrl3ocdCjOhKDTvj+yboyxm8djTGFYetUgX9Zl2ywqv+ofpnsY3wYEOwXl+R pfkShxyPp02dzGwH0H6IR50j8avUjjAPlMubRHDkib1PN/VPlrLSXV8M8JXkYg2sl9yK sRog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=QBKpvlGv3jGI4OaNKwAQDlbenUYgWop01IUuwsAKjxM=; b=JyX4YWJUebhCPtEFyfWTIRL+nf5sWIhfjj1os6nY2mXHVlh8/UX3eyLNC9blwRTu63 AnWP6waGfPbNY/hjVWdu9bL9UKGSALwyMnpK8RyDQTkfu7rLPDAc+EtZAMi52+eq4+uZ iGFkdN8ZMuNeQDzap3p+ukkXsmF34ZGMl/JoFe18vIEMl6YVH5AHp+sXGWEOGpF0vDtf AhRCkDEuWyqcJ7OP7QdKZL/sbgaqoYcPmJTHSqbLp7fwZR2nB9/cK7XtjrEjrwpRuxKs 8Du3F6PaA815W2VkFTVGVy2Mkj+T9zQj37L33iOhH2sC56P8Nly7O5lfKT5Ke6mSHoQi Rokg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id q123si808073qke.105.2018.04.23.00.56.25 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 23 Apr 2018 00:56:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:51973 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWKm-0001Ui-U8 for patch@linaro.org; Mon, 23 Apr 2018 03:56:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fAWIF-0000Vu-2M for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fAWID-0000a9-LN for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:47 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:6653) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fAWID-0000YJ-Cj for qemu-devel@nongnu.org; Mon, 23 Apr 2018 03:53:45 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3N7nDhL004589; Mon, 23 Apr 2018 09:53:41 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hftrwhm3f-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 09:53:41 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 132523F; Mon, 23 Apr 2018 07:53:41 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E766D14D5; Mon, 23 Apr 2018 07:53:40 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 23 Apr 2018 09:53:40 +0200 From: Christophe Lyon To: , , , , Date: Mon, 23 Apr 2018 09:51:55 +0200 Message-ID: <20180423075215.4572-5-christophe.lyon@st.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180423075215.4572-1-christophe.lyon@st.com> References: <20180423075215.4572-1-christophe.lyon@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG5NODE1.st.com (10.75.127.13) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-23_04:, , signatures=0 X-MIME-Autoconverted: from 8bit to quoted-printable by mx07-.pphosted.com id w3N7nDhL004589 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 62.209.51.94 Subject: [Qemu-devel] [ARM/FDPIC v2 4/4] linux-user: ARM-FDPIC: Add support for signals for FDPIC targets X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The FDPIC restorer needs to deal with a function descriptor, hence we have to extend 'retcode' such that it can hold the instructions needed to perform this. The restorer sequence uses the same thumbness as the exception handler (mainly to support Thumb-only architectures). Co-Authored-By: Mickaël Guêné Signed-off-by: Christophe Lyon -- 2.6.3 diff --git a/linux-user/signal.c b/linux-user/signal.c index 8d9e6e8..d01b459 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2045,13 +2045,13 @@ struct sigframe_v1 { struct target_sigcontext sc; abi_ulong extramask[TARGET_NSIG_WORDS-1]; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct sigframe_v2 { struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v1 @@ -2060,14 +2060,14 @@ struct rt_sigframe_v1 abi_ulong puc; struct target_siginfo info; struct target_ucontext_v1 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; struct rt_sigframe_v2 { struct target_siginfo info; struct target_ucontext_v2 uc; - abi_ulong retcode; + abi_ulong retcode[4]; }; #define TARGET_CONFIG_CPU_32 1 @@ -2090,6 +2090,21 @@ static const abi_ulong retcodes[4] = { SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN }; +/* + * Stub needed to make sure the FD register (r9) contains the right + * value. + */ +static const unsigned long sigreturn_fdpic_codes[3] = { + 0xe59fc004, /* ldr r12, [pc, #4] to read function descriptor */ + 0xe59c9004, /* ldr r9, [r12, #4] to setup GOT */ + 0xe59cf000 /* ldr pc, [r12] to jump into restorer */ +}; + +static const unsigned long sigreturn_fdpic_thumb_codes[3] = { + 0xc008f8df, /* ldr r12, [pc, #8] to read function descriptor */ + 0x9004f8dc, /* ldr r9, [r12, #4] to setup GOT */ + 0xf000f8dc /* ldr pc, [r12] to jump into restorer */ +}; static inline int valid_user_regs(CPUARMState *regs) { @@ -2149,7 +2164,21 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, { abi_ulong handler = ka->_sa_handler; abi_ulong retcode; - int thumb = handler & 1; + abi_ulong funcdesc_ptr = 0; + + int thumb; + int is_fdpic = ((TaskState *)thread_cpu->opaque)->is_fdpic; + + if (is_fdpic) { + /* In FDPIC mode, ka->_sa_handler points to a function + * descriptor (FD). The first word contains the address of the + * handler. The second word contains the value of the PIC + * register (r9). */ + funcdesc_ptr = ka->_sa_handler; + get_user_ual(handler, funcdesc_ptr); + } + thumb = handler & 1; + uint32_t cpsr = cpsr_read(env); cpsr &= ~CPSR_IT; @@ -2160,20 +2189,50 @@ setup_return(CPUARMState *env, struct target_sigaction *ka, } if (ka->sa_flags & TARGET_SA_RESTORER) { - retcode = ka->sa_restorer; - } else { - unsigned int idx = thumb; + if (is_fdpic) { + /* For FDPIC we ensure that the restorer is called with a + * correct r9 value. For that we need to write code on + * the stack that sets r9 and jumps back to restorer + * value. + */ + if (thumb) { + __put_user(sigreturn_fdpic_thumb_codes[0], rc); + __put_user(sigreturn_fdpic_thumb_codes[1], rc + 1); + __put_user(sigreturn_fdpic_thumb_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } else { + __put_user(sigreturn_fdpic_codes[0], rc); + __put_user(sigreturn_fdpic_codes[1], rc + 1); + __put_user(sigreturn_fdpic_codes[2], rc + 2); + __put_user((abi_ulong)ka->sa_restorer, rc + 3); + } - if (ka->sa_flags & TARGET_SA_SIGINFO) { - idx += 2; + retcode = rc_addr + thumb; + } else { + retcode = ka->sa_restorer; } + } else { + if (is_fdpic) { + qemu_log_mask(LOG_UNIMP, + "arm: FDPIC signal return not implemented"); + abort(); + } else { + unsigned int idx = thumb; + + if (ka->sa_flags & TARGET_SA_SIGINFO) { + idx += 2; + } - __put_user(retcodes[idx], rc); + __put_user(retcodes[idx], rc); - retcode = rc_addr + thumb; + retcode = rc_addr + thumb; + } } env->regs[0] = usig; + if (is_fdpic) { + get_user_ual(env->regs[9], funcdesc_ptr + 4); + } env->regs[13] = frame_addr; env->regs[14] = retcode; env->regs[15] = handler & (thumb ? ~1 : ~3); @@ -2270,7 +2329,7 @@ static void setup_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->extramask[i - 1]); } - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v1, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2292,7 +2351,7 @@ static void setup_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, regs); - setup_return(regs, ka, &frame->retcode, frame_addr, usig, + setup_return(regs, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct sigframe_v2, retcode)); unlock_user_struct(frame, frame_addr, 1); @@ -2347,7 +2406,7 @@ static void setup_rt_frame_v1(int usig, struct target_sigaction *ka, __put_user(set->sig[i], &frame->uc.tuc_sigmask.sig[i]); } - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v1, retcode)); env->regs[1] = info_addr; @@ -2378,7 +2437,7 @@ static void setup_rt_frame_v2(int usig, struct target_sigaction *ka, setup_sigframe_v2(&frame->uc, set, env); - setup_return(env, ka, &frame->retcode, frame_addr, usig, + setup_return(env, ka, frame->retcode, frame_addr, usig, frame_addr + offsetof(struct rt_sigframe_v2, retcode)); env->regs[1] = info_addr;