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[209.51.188.17]) by mx.google.com with ESMTPS id a11si14209908ilb.95.2021.03.09.11.28.05 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Mar 2021 11:28:05 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="SSpE/De8"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42170 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJi1T-0004I2-6C for patch@linaro.org; Tue, 09 Mar 2021 14:28:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJg33-0003Xz-Hb for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:33 -0500 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]:34991) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lJg31-0003qX-8K for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:33 -0500 Received: by mail-ej1-x62c.google.com with SMTP id dx17so29875234ejb.2 for ; Tue, 09 Mar 2021 09:21:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pOpDSl4PCJAfRmZAM02jJCUO0bme5ak2R8cL4PaIcKc=; b=SSpE/De8pF3COUTEilqAPnt0qp7zNMvryjwI3BIMCRyf9Q7lcmAaifdD3KR08VnvNO woq5GcfitvYM2N2ofoQB7BF6ZzvCj7RitE+MXhdDB1H1GcgVd+WGACAYYf7OTr7ZtxPO U9L+c5iQSC4oCoERWAMsmGerfPlGDUXoC3yUbIeiHLssZDLXqHt974G9phqBbgCmd3F6 0Yfywg0GYb0U0Q8S3Z1pA65yaR6Z+yMrSHwrhcH++dcCrdcVeY8KUnY/s+ROvG0wMv3o 87sxS51HK3gHGmwjVALNQxOIBzZaefjIDrOGZPYb5mCVCoKdAbjtvkqXZfGX/OniVrt/ 9gAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pOpDSl4PCJAfRmZAM02jJCUO0bme5ak2R8cL4PaIcKc=; b=JuXDXbSZSBRsRW0sQ59HIhvhESjhesHjwl1RIHC4Fi6Hfxw1/k2DGPGoJMQPyYQFZS XqFkKs8m5gm3HLkItWuyM8aJ8iC2b4LwWcBZu16EqQN9dmvcy5PQ4UH5DPPshQy9uQzQ 25w0FILCrxqsBdTc8NAG6rhqgupZd3kpIu4R6wDU4PWy9+SujWdzgC4j9aw3LciNxf3A Yw/1qstIa/pdR/etzmcOsCHdoOPIibJAYLQ5HcZvTxpeyWouxxL2K+XCGaoUBGgDIY6e Wi5KSpoUcWnA84iJRp9lkcLqN2IV9dMcT9bFYGOGFa9gMnFTNyrmzyO03RbOn/d7PZcg 56Ig== X-Gm-Message-State: AOAM5306sdiEcg9Ln5w3KEdQA3JpwV/zCZ8Wj67LVjvk8RhZAoMpnG6P CtZlUUdbTZoZREY7L6NVbc8/zNIR725MCQ== X-Received: by 2002:a17:906:789:: with SMTP id l9mr21095455ejc.161.1615310489683; Tue, 09 Mar 2021 09:21:29 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id r24sm9379394edw.11.2021.03.09.09.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 09:21:27 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 3E8711FF87; Tue, 9 Mar 2021 17:21:27 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v3 1/4] semihosting: move semihosting tests to multiarch Date: Tue, 9 Mar 2021 17:21:24 +0000 Message-Id: <20210309172127.20470-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210309172127.20470-1-alex.bennee@linaro.org> References: <20210309172127.20470-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , keithp@keithp.com, "open list:ARM TCG CPUs" , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It may be arm-compat-semihosting but more than one architecture uses it so lets move the tests into the multiarch area. We gate it on the feature and split the semicall.h header between the arches. Also clean-up a bit of the Makefile messing about to one common set of runners. Signed-off-by: Alex Bennée --- tests/tcg/aarch64/semicall.h | 18 +++++++++++ tests/tcg/arm/semicall.h | 15 +-------- tests/tcg/riscv64/semicall.h | 22 +++++++++++++ .../arm-compat-semi}/semiconsole.c | 2 ++ .../arm-compat-semi}/semihosting.c | 5 ++- tests/tcg/Makefile.target | 3 ++ tests/tcg/aarch64/Makefile.target | 18 ----------- tests/tcg/arm/Makefile.target | 16 ++-------- tests/tcg/multiarch/Makefile.target | 31 +++++++++++++++++++ 9 files changed, 83 insertions(+), 47 deletions(-) create mode 100644 tests/tcg/aarch64/semicall.h create mode 100644 tests/tcg/riscv64/semicall.h rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%) rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%) -- 2.20.1 diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h new file mode 100644 index 0000000000..8a3fce35c5 --- /dev/null +++ b/tests/tcg/aarch64/semicall.h @@ -0,0 +1,18 @@ +/* + * Semihosting Tests - AArch64 helper + * + * Copyright (c) 2019 + * Written by Alex Bennée + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + +uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) +{ + register uintptr_t t asm("x0") = type; + register uintptr_t a0 asm("x1") = arg0; + asm("hlt 0xf000" + : "=r" (t) + : "r" (t), "r" (a0)); + return t; +} diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h index d4f6818192..ad8ac51310 100644 --- a/tests/tcg/arm/semicall.h +++ b/tests/tcg/arm/semicall.h @@ -1,5 +1,5 @@ /* - * Semihosting Tests + * Semihosting Tests - ARM Helper * * Copyright (c) 2019 * Written by Alex Bennée @@ -7,13 +7,8 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ -#define SYS_WRITE0 0x04 -#define SYS_READC 0x07 -#define SYS_REPORTEXC 0x18 - uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) { -#if defined(__arm__) register uintptr_t t asm("r0") = type; register uintptr_t a0 asm("r1") = arg0; #ifdef __thumb__ @@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) #endif asm(SVC : "=r" (t) : "r" (t), "r" (a0)); -#else - register uintptr_t t asm("x0") = type; - register uintptr_t a0 asm("x1") = arg0; - asm("hlt 0xf000" - : "=r" (t) - : "r" (t), "r" (a0)); -#endif - return t; } diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h new file mode 100644 index 0000000000..f8c88f32dc --- /dev/null +++ b/tests/tcg/riscv64/semicall.h @@ -0,0 +1,22 @@ +/* + * Semihosting Tests - RiscV64 Helper + * + * Copyright (c) 2021 + * Written by Alex Bennée + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + +uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) +{ + register uintptr_t t asm("a0") = type; + register uintptr_t a0 asm("a1") = arg0; + asm(".option norvc\n\t" + ".balign 16\n\t" + "slli zero, zero, 0x1f\n\t" + "ebreak\n\t" + "srai zero, zero, 0x7\n\t" + : "=r" (t) + : "r" (t), "r" (a0)); + return t; +} diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c similarity index 93% rename from tests/tcg/arm/semiconsole.c rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c index 6ef0bd2450..1d82efc589 100644 --- a/tests/tcg/arm/semiconsole.c +++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c @@ -7,6 +7,8 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ +#define SYS_READC 0x07 + #include #include #include "semicall.h" diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c similarity index 85% rename from tests/tcg/arm/semihosting.c rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c index 33faac9916..b3fd16cd12 100644 --- a/tests/tcg/arm/semihosting.c +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c @@ -7,12 +7,15 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ +#define SYS_WRITE0 0x04 +#define SYS_REPORTEXC 0x18 + #include #include "semicall.h" int main(int argc, char *argv[argc]) { -#if defined(__arm__) +#if UINTPTR_MAX == UINT32_MAX uintptr_t exit_code = 0x20026; #else uintptr_t exit_block[2] = {0x20026, 0}; diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 24d75a5801..cab8c6b3a2 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -32,6 +32,9 @@ all: -include ../../../config-host.mak -include ../config-$(TARGET).mak +ifeq ($(CONFIG_USER_ONLY),y) +-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak +endif # for including , in command strings COMMA := , diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index bf53ad0087..56e48f4b34 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-%: CFLAGS += -march=armv8.5-a+memtag endif -# Semihosting smoke test for linux-user -AARCH64_TESTS += semihosting -run-semihosting: semihosting - $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") - -run-plugin-semihosting-with-%: - $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ - -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ - $(call strip-plugin,$<) 2> $<.err, \ - "$< on $(TARGET_NAME) with $*") - -AARCH64_TESTS += semiconsole -run-semiconsole: semiconsole - $(call skip-test, $<, "MANUAL ONLY") - -run-plugin-semiconsole-with-%: - $(call skip-test, $<, "MANUAL ONLY") - ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),) # System Registers Tests AARCH64_TESTS += sysregs diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target index ec95156562..1deda384df 100644 --- a/tests/tcg/arm/Makefile.target +++ b/tests/tcg/arm/Makefile.target @@ -30,37 +30,25 @@ run-fcvt: fcvt $(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref) # Semihosting smoke test for linux-user -ARM_TESTS += semihosting semihosting: CFLAGS += -mthumb -run-semihosting: semihosting - $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") ARM_TESTS += semihosting-arm semihosting-arm: CFLAGS += -marm -semihosting-arm: semihosting.c - $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) run-semihosting-arm: semihosting-arm $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") -run-plugin-semihosting-with-%: +run-plugin-semihosting-arm-with-%: $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ $(call strip-plugin,$<) 2> $<.err, \ "$< on $(TARGET_NAME) with $*") -ARM_TESTS += semiconsole semiconsole-arm +ARM_TESTS += semiconsole-arm semiconsole: CFLAGS += -mthumb -run-semiconsole: semiconsole - $(call skip-test, $<, "MANUAL ONLY") - -run-plugin-semiconsole-with-%: - $(call skip-test, $<, "MANUAL ONLY") semiconsole-arm: CFLAGS += -marm -semiconsole-arm: semiconsole.c - $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) run-semiconsole-arm: semiconsole-arm $(call skip-test, $<, "MANUAL ONLY") diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target index abbdb2e126..a3a751723d 100644 --- a/tests/tcg/multiarch/Makefile.target +++ b/tests/tcg/multiarch/Makefile.target @@ -69,6 +69,37 @@ run-gdbstub-%: endif EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read +# ARM Compatible Semi Hosting Tests +# +# Despite having ARM in the name we actually have several +# architectures that implement it. We gate the tests on the feature +# appearing in config. +# +ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y) +VPATH += $(MULTIARCH_SRC)/arm-compat-semi + +# Add -I path back to TARGET_NAME for semicall.h +semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME) + +run-semihosting: semihosting + $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") + +run-plugin-semihosting-with-%: + $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ + -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ + $(call strip-plugin,$<) 2> $<.err, \ + "$< on $(TARGET_NAME) with $*") + +semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME) + +run-semiconsole: semiconsole + $(call skip-test, $<, "MANUAL ONLY") + +run-plugin-semiconsole-with-%: + $(call skip-test, $<, "MANUAL ONLY") + +TESTS += semihosting semiconsole +endif # Update TESTS TESTS += $(MULTIARCH_TESTS) From patchwork Tue Mar 9 17:21:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 396091 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp2863204jai; Tue, 9 Mar 2021 11:32:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJxvtiBZ75//IT81umXj0UDQx0QGaqadWV16na7PPIWmn4iPH5cFxG3JHKDAQc6cLQ7jcoLT X-Received: by 2002:a05:6602:2432:: with SMTP id g18mr24594565iob.86.1615318358269; Tue, 09 Mar 2021 11:32:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615318358; cv=none; d=google.com; s=arc-20160816; b=0xKDoBVHTZBbfcmzor3MFpAKX/K93ty5uvu41KNVKwuE32MdLtJviCMygLmzRj8+Qs r7uucnY4mlVSdbnXV3kp7VbQLvp+3Zrv35jJlIKVKhER2r+IpQeVkI/DKuAcUWYWq795 uo0kwkWG6j3wjoVTFR4mypr2Ure+6VokjbvSeqjQ2twRz8V2oXMz1rVSpiR2Y8Z9Msdo t21CzK/eAq/9CxCN6/cMqlcEzA1grjKBbWviYhApDW+okAwxkU4PEoa+YIxXkmsl/8gG 0xrhxM0a6OmMEOi04Lsd/AhNv6hISCf+YhCl5rP+GCdzpyjIdNtSVM1zAu6zb7RvLrPF ouIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=O2LvglrxP6LVVT9OEB0NOZldt8R6l+wqFUrx+5/Or9E=; b=ntFTLN+jr7D+2UAV4g742hiDkM4mlrN1jl8qjhY2xLr/0qUF4ll1lJwKhTn/CKfyia Xud+iJWvQVmTMl51KOVTEcS+rxK/SJmjOmhY6fvKvJZYIwg2u4p6xsuEsFKh0b8o3Ouf F0ulS4By6hq6TKCWr+rM7RYMaOkdpvO/Ir8Nh3+X5X78CJiy3tJy/7lU9lKdosy8aGZP hBgOH7ifavXv2mLqYmWwuttlXSi/i+lkA30Zx0F5/ombEm4HXvOAiJacStY2RUFHfaAG dy7LxCu4Y5bY0GyP9tltlWwGS+o8cPU9qFP64aNJavSqPE3ipVjsikrXIGpXxyLk8GWD ULUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Eyy8FQB0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r7si12351842jad.72.2021.03.09.11.32.37 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Mar 2021 11:32:37 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Eyy8FQB0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50600 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJi5s-0007v9-Jl for patch@linaro.org; Tue, 09 Mar 2021 14:32:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJg34-0003az-RF for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:34 -0500 Received: from mail-ej1-x631.google.com ([2a00:1450:4864:20::631]:33910) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lJg32-0003ra-Sj for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:34 -0500 Received: by mail-ej1-x631.google.com with SMTP id hs11so29877203ejc.1 for ; Tue, 09 Mar 2021 09:21:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O2LvglrxP6LVVT9OEB0NOZldt8R6l+wqFUrx+5/Or9E=; b=Eyy8FQB0NthfNw2Rb9CLuWT62FhcUZlhcgJW8LcKOhxNP/kvZZrdbvYjioaFIBPXT8 +5XktAIY+0Ky+E3RQmNmiNvuepE/wTSJdLdUfk5DXDIn8g35BlxzDjGwzmMb7p4+QJwC K3usEiwKHpCwG04vqtijuMrxSLH38f1gW3VFa9A9P00v7S5CQfl+F2MQrIyc1XRFWKm0 E8rYrqpVFutOTOIfdXNCBZPTfZvfCaNs/pWkxDV0ETQ3d0eqbsuo5qtIiGZYHHL3923J n+5XNI5NMBrhZ3DIihTz/3gGp80UtrXDjI7u2lqR5tMbPifEfy0QkyB6RlYpw+Dd962X gnxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=O2LvglrxP6LVVT9OEB0NOZldt8R6l+wqFUrx+5/Or9E=; b=AQcT9eyuv3TxISfDUdxpQQsda9fStSbwxeJrMy1kTT36SothYIv6e6mt/pfByPtA6B LKn/WpmyI4CXvYkFujLCU2UeqJB470MX4iJ59f1zagK0kApmkkr/bDEM+01drEzrbeda NmepRKzq5IWsiA0xdM+n2IWykcpH3/uE1btpTJ9O23cZYNsHGN71ddZdX+gHOesrLFI2 P/C6KqJWzeAqbkXak2QrPCsXtwOb9A0it57v9Fw5HysFLnzAZzKQlabPsl9GoVZD7ePt oQZgZtm4SU4xyY2YtGHzeiAcaCSVpgYtZKdpr4H6B8fwTfU3o8XDZTs4rzC0/v6u7OKO 0K6Q== X-Gm-Message-State: AOAM530uT24pwXDkdo7iLYGmJIIfmdIlBI8vzTMOx0aSHUZbztiQbNGE dYltM4zkV9MiLe4gMHLnk5uYVQ== X-Received: by 2002:a17:906:5453:: with SMTP id d19mr20953760ejp.150.1615310491467; Tue, 09 Mar 2021 09:21:31 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id m7sm8626664ejk.52.2021.03.09.09.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 09:21:28 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 53C6A1FF8C; Tue, 9 Mar 2021 17:21:27 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v3 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Date: Tue, 9 Mar 2021 17:21:25 +0000 Message-Id: <20210309172127.20470-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210309172127.20470-1-alex.bennee@linaro.org> References: <20210309172127.20470-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , keithp@keithp.com, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" >From the semihosting point of view what we want to know is the current mode of the processor. Unify this into a single helper and allow us to use the same GET/SET_ARG helpers for the rest of the code. Having the helper will also be useful later. Note: we aren't currently testing riscv32 due to missing toolchain for check-tcg tests. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell --- v3 - consistent #ifdeffery --- semihosting/arm-compat-semi.c | 56 ++++++++++++----------------------- 1 file changed, 19 insertions(+), 37 deletions(-) -- 2.20.1 diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 94950b6c56..0f0e129a7c 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = { }, }; -/* Read the input value from the argument block; fail the semihosting - * call if the memory read fails. +/* + * Read the input value from the argument block; fail the semihosting + * call if the memory read fails. Eventually we could use a generic + * CPUState helper function here. */ -#ifdef TARGET_ARM +static inline bool is_64bit_semihosting(CPUArchState *env) +{ +#if defined(TARGET_ARM) + return is_a64(env); +#elif defined(TARGET_RISCV) + return !riscv_cpu_is_32bit(env); +#else +#error un-handled architecture +#endif +} + + #define GET_ARG(n) do { \ - if (is_a64(env)) { \ + if (is_64bit_semihosting(env)) { \ if (get_user_u64(arg ## n, args + (n) * 8)) { \ errno = EFAULT; \ - return set_swi_errno(cs, -1); \ + return set_swi_errno(cs, -1); \ } \ } else { \ if (get_user_u32(arg ## n, args + (n) * 4)) { \ @@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = { } while (0) #define SET_ARG(n, val) \ - (is_a64(env) ? \ + (is_64bit_semihosting(env) ? \ put_user_u64(val, args + (n) * 8) : \ put_user_u32(val, args + (n) * 4)) -#endif -#ifdef TARGET_RISCV - -/* - * get_user_ual is defined as get_user_u32 in softmmu-semi.h, - * we need a macro that fetches a target_ulong - */ -#define get_user_utl(arg, p) \ - ((sizeof(target_ulong) == 8) ? \ - get_user_u64(arg, p) : \ - get_user_u32(arg, p)) - -/* - * put_user_ual is defined as put_user_u32 in softmmu-semi.h, - * we need a macro that stores a target_ulong - */ -#define put_user_utl(arg, p) \ - ((sizeof(target_ulong) == 8) ? \ - put_user_u64(arg, p) : \ - put_user_u32(arg, p)) - -#define GET_ARG(n) do { \ - if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \ - errno = EFAULT; \ - return set_swi_errno(cs, -1); \ - } \ - } while (0) - -#define SET_ARG(n, val) \ - put_user_utl(val, args + (n) * sizeof(target_ulong)) -#endif /* * Do a semihosting call. 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[209.51.188.17]) by mx.google.com with ESMTPS id l13si2141869qth.397.2021.03.09.11.54.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Mar 2021 11:54:44 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fxV4h0ni; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47942 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJiRI-0006Nt-7y for patch@linaro.org; Tue, 09 Mar 2021 14:54:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35206) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJg36-0003g4-U8 for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:36 -0500 Received: from mail-ej1-x634.google.com ([2a00:1450:4864:20::634]:39875) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lJg35-0003tD-9V for qemu-devel@nongnu.org; Tue, 09 Mar 2021 12:21:36 -0500 Received: by mail-ej1-x634.google.com with SMTP id p7so18467421eju.6 for ; Tue, 09 Mar 2021 09:21:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H2Dg/3xWo/lJhWRHAFHTsEix8OkL3E+jnOBvruDCvb4=; b=fxV4h0niEbAoIWX5kC3jEVjMF0cC3xY5RwPK1Hcu4EfSkXhMZpzPXGWydcnN3sZVSb db4aMDpqwQQAzqQRhHXVB1HgYindL5z4X84WP09l78KisIj6zozhX1dRYK5UAquYRSDj JrLhtjHGO27OKAHjZVjAPEa+g4reWYN1CPg3VlSG2ClOl5owwzc0i4t6/kLnNOEicEVO PdPtoRs9jPyOXdrMPv1DdUbjzIOJyt9apD2gpEWSICq0CWuhcIjHtfc25v/GLmuKkK1l 5zEEFjl4sp+kIN7btafywapHmQbIeO0EfZt1V83GjhIKq5OoeG/XNOa6fxKni93xfu7t prlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H2Dg/3xWo/lJhWRHAFHTsEix8OkL3E+jnOBvruDCvb4=; b=Z6Gb15i9loByvJX0zSZy3otEAgRyoQ6u590nsA41tE6+Z1tRDHt/zt/Wa0YoW5e/Uv PhnADV/fQylgHqDPhUd2Ufh9HBIp1+cfp90RQpOL57tJBAzsMFq50LuzKm3wlruEfay2 DDTSvFIpKWuPQTaE0Pykp0jibSipQFBSPZldX1svNfS/5snBg9F9+u0jj5pdTgncmvz0 o/azqgJ8lfzh2iVBvEsuKxI1PClPKJG8Ae4Zu9nCj/lw4CjGHv6zTmSt7RjKRxSIq+Lf Q1E2/FpnDjA1IJHLLF1HSnx9V4WL7CXYgrUAlcW66l7+bnOOfCTCVqCoBINXEQEyFj6X P44A== X-Gm-Message-State: AOAM533QuvwuVtZYitmve4cvaq1H4UTsvx2sVIq4RAu3h/CHE+vSOCrh vuSf9Z9iI9YHAHyL7xRsqV0xiA== X-Received: by 2002:a17:906:5e4a:: with SMTP id b10mr21435871eju.116.1615310493927; Tue, 09 Mar 2021 09:21:33 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id h10sm9747740edk.17.2021.03.09.09.21.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 09:21:30 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 7ED801FF90; Tue, 9 Mar 2021 17:21:27 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v3 4/4] tests/tcg: add HeapInfo checking to semihosting test Date: Tue, 9 Mar 2021 17:21:27 +0000 Message-Id: <20210309172127.20470-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210309172127.20470-1-alex.bennee@linaro.org> References: <20210309172127.20470-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: keithp@keithp.com, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Query the SYS_HEAPINFO semicall and do some basic verification of the information via libc calls. Signed-off-by: Alex Bennée --- .../multiarch/arm-compat-semi/semihosting.c | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) -- 2.20.1 diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c index b3fd16cd12..5fa3c0a82d 100644 --- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c @@ -8,9 +8,16 @@ */ #define SYS_WRITE0 0x04 +#define SYS_HEAPINFO 0x16 #define SYS_REPORTEXC 0x18 +#define _GNU_SOURCE /* asprintf is a GNU extension */ + #include +#include +#include +#include +#include #include "semicall.h" int main(int argc, char *argv[argc]) @@ -21,8 +28,34 @@ int main(int argc, char *argv[argc]) uintptr_t exit_block[2] = {0x20026, 0}; uintptr_t exit_code = (uintptr_t) &exit_block; #endif + struct { + void *heap_base; + void *heap_limit; + void *stack_base; + void *stack_limit; + } info; + void *ptr_to_info = (void *) &info; + char *heap_info, *stack_info; + void *brk = sbrk(0); + + __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n"); + + memset(&info, 0, sizeof(info)); + __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info); + + asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit); + __semi_call(SYS_WRITE0, (uintptr_t) heap_info); + if (info.heap_base != brk) { + sprintf(heap_info, "heap mismatch: %p\n", brk); + __semi_call(SYS_WRITE0, (uintptr_t) heap_info); + return -1; + } + + asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack_limit); + __semi_call(SYS_WRITE0, (uintptr_t) stack_info); + free(heap_info); + free(stack_info); - __semi_call(SYS_WRITE0, (uintptr_t) "Hello World"); __semi_call(SYS_REPORTEXC, exit_code); /* if we get here we failed */ return -1;