From patchwork Mon Mar 8 05:07:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0AB1C43331 for ; Mon, 8 Mar 2021 05:08:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A52C5651FA for ; Mon, 8 Mar 2021 05:08:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234285AbhCHFIP (ORCPT ); Mon, 8 Mar 2021 00:08:15 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:37996 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231189AbhCHFHu (ORCPT ); Mon, 8 Mar 2021 00:07:50 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12857j9S023557; Sun, 7 Mar 2021 23:07:45 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180065; bh=kDesQPQvYRjN7JUDLg1aWRBB+2K3tXaBtJ48Qzz8gLs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LiSpDpkdv04HcKRhxO7apZWBqtBQDdcOd3V2xTCnCRX9MXb3/O00Vk+NKDweNlxTM iTKdguhJti+wQ8B7sBJo8zY83mfGB1W7dC45S+HLXW2N315ZXzh376qEtB07SopUTb IuQ8iv7TWK7UoJwWqjMt1pI+FeUjfKtUrYJYkoD4= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12857jmk068185 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:07:45 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:07:45 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:07:45 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aKx086547; Sun, 7 Mar 2021 23:07:41 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla , Subject: [PATCH v5 01/13] phy: cadence: Sierra: Fix PHY power_on sequence Date: Mon, 8 Mar 2021 10:37:20 +0530 Message-ID: <20210308050732.7140-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Commit 44d30d622821d ("phy: cadence: Add driver for Sierra PHY") de-asserts PHY_RESET even before the configurations are loaded in phy_init(). However PHY_RESET should be de-asserted only after all the configurations has been initialized, instead of de-asserting in probe. Fix it here. Fixes: 44d30d622821d ("phy: cadence: Add driver for Sierra PHY") Signed-off-by: Kishon Vijay Abraham I Cc: # v5.4+ Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 26a0badabe38..19f32ae877b9 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -319,6 +319,12 @@ static int cdns_sierra_phy_on(struct phy *gphy) u32 val; int ret; + ret = reset_control_deassert(sp->phy_rst); + if (ret) { + dev_err(dev, "Failed to take the PHY out of reset\n"); + return ret; + } + /* Take the PHY lane group out of reset */ ret = reset_control_deassert(ins->lnk_rst); if (ret) { @@ -616,7 +622,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) pm_runtime_enable(dev); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); - reset_control_deassert(sp->phy_rst); return PTR_ERR_OR_ZERO(phy_provider); put_child: From patchwork Mon Mar 8 05:07:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395331 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1421867jai; Sun, 7 Mar 2021 21:08:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJzRPHyvdL1aTC5v4wmvjzEzOe3L9g4e8st8oYzPqZ1suKTnXb9YOJxXtZqYSCK2oswqeYJH X-Received: by 2002:a05:6402:5244:: with SMTP id t4mr19324396edd.87.1615180132096; Sun, 07 Mar 2021 21:08:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180132; cv=none; d=google.com; s=arc-20160816; b=L7t3Vr8MJMvLt66AlL9mc0ekuFX9AXlXO78QtK/PGuWtOMtIr+wT6fAWLIEMdnBu7l JnoGJUMMiTEq+2gBp+4YF8Dh0yg5lBfBEkW67qZlTtpXJKzdjwIxiJ6uIpRQ7Ii6ojcc ywJK7sY8zhdZZkB5Iya4bJ26l8jEx+3gHR0RrgB2VK5VRHBG9bew8eexyEa9JjeJYCx6 zVfgPfBvul1p2Gye8TjQDpIYpWQl+MMhglKjUwCiySxPPUzAHxMKfZcW51mUUtWeqA8e AZiZUXzngEfN3X3wG1D4eMecpGebLaKNNYzz6Sk93HPgfqZx8xgS0PijO7vqt71kGE84 9x9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=VxF8kGigCKqkh77tBFluIHDcpsujh9oOUvSPK2P6qiw=; b=BkZ7gwQytqzcymt1lnOSAU/UuGudobsUA/FMyErsuS08tEjFQ4o4c1GrWzEPGLPLQe IVqfW6VmBPGwPDA+/OUvaTF2DLqYa9SQfZDo63Ie/0HXBldbMg4jorUk3MGP8md3AXuI jV2HxRQA9o7AnTVTr84mu6qyfp0hNKrwJf0W4UUmwFi6UcmeF2S9tIs/iD33d+AVjG2Z +xU7qa9hzB+sRcPF2GLDxKvnvrLQkfCa5VT6rGu9SVxQT/XoTr/kU8kEIChzjr5dJoZ0 EfiS0Te7AyahTGr3sm7pehkCAODTerwy60ROhy/1/6IkA/NkQR+pS4SAV2uJVhF2Zbu/ EZPg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EFUrGEaY; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w26si6504740ejn.699.2021.03.07.21.08.51; Sun, 07 Mar 2021 21:08:52 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EFUrGEaY; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234291AbhCHFIQ (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:16 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36262 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232500AbhCHFH5 (ORCPT ); Mon, 8 Mar 2021 00:07:57 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12857rZV077188; Sun, 7 Mar 2021 23:07:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180073; bh=VxF8kGigCKqkh77tBFluIHDcpsujh9oOUvSPK2P6qiw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=EFUrGEaYjX5lsX5OEztGYkKS3d78ZfBBPEryK2HUNG4ntqNL+MQ/HrQ7jluRBn9SI 8lEiCf9+BKCmQZw4caI+/4W/Y81xrUQsfLj1G4A8pIxixTUICw71b+0ZJgxDsS9jFZ eChTqSDtBqFXzbAtOgqc8uGKNjuFpUe/KboTq98E= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12857rtT068274 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:07:53 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:07:52 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:07:52 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL1086547; Sun, 7 Mar 2021 23:07:49 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 03/13] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes Date: Mon, 8 Mar 2021 10:37:22 +0530 Message-ID: <20210308050732.7140-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cadence Sierra PHY driver registers PHY using devm_phy_create() for all sub-nodes of Sierra device tree node. However Sierra device tree node can have sub-nodes for the various clocks in addtion to the PHY. Use devm_phy_create() only for nodes with name "phy" (or "link" for old device tree) which represent the actual PHY. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 19f32ae877b9..f7ba0ed416bc 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -577,6 +577,10 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) for_each_available_child_of_node(dn, child) { struct phy *gphy; + if (!(of_node_name_eq(child, "phy") || + of_node_name_eq(child, "link"))) + continue; + sp->phys[node].lnk_rst = of_reset_control_array_get_exclusive(child); From patchwork Mon Mar 8 05:07:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395332 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1421899jai; Sun, 7 Mar 2021 21:08:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJxPfsQE3j1kbF1VNBpa+AHMOcBLZAjdFD1sAb5508FVKxsQ5CgDvKTJPXqRpAyh6pCuoKaQ X-Received: by 2002:a17:906:30da:: with SMTP id b26mr13116006ejb.376.1615180134264; Sun, 07 Mar 2021 21:08:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180134; cv=none; d=google.com; s=arc-20160816; b=gFg5mhJ84kp7NOTxJHvWTIRUuE3XngmRjpjUsh6cY1KDjewwuRvn6agL6fr5KqwyBz jumMDr0WFORWVxCzJVRpvJFuUfeW4hu/MaaIcod/QtUR07GrJF4e/sbuEU/dXN4LOCdO UMHfHn3Uf7ZEV8f8EFQW6ZWMLp59XoP0jelu2Noaf/+OReUyx0ABgMoQCI0FmJz0Wr+8 6+SYR8Fypyk/Ea0UBqeVHIVQ4Hby79AcRuQMVgSbgw6L5E+yYI2j262XQtmmtT1HC8KF IfgCMDEbOzc26DyhJU6WVelrSh2ix8NckWgB6JJEdeJimYgv5eKDJmPpg8fXiGLMFuJW YS1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=OsKa0EDwQKMOxN4rn2UsJ4wTaESxeSKXJwtpa+eVAPs=; b=gPRutQjvwUgiRvZyPK7jICJ0WKK94UXq5Yy215HrBSg+V9nyti5v5EpeilIluNqVyS 7GZA7qHBdqLgkMVJGBqslju808JOvlfuQWKAj1mjSLlZknHIKtDQBtR8eleIzlC9Pk+Y 2ViTX8wSXgzotXLzOh3y6VO/4Y4EYuN0qY7JgUDqQa/ZqWG18cT09bB99lNeKDo//ioS xd5Ky7rpKh1F5nA17dGl6y/yV9VgrY2kG36H4uq3BPMcjclFBaZtPj7W/GbVoa2rKZ/z //LXK8lMi7886HIPIxnDqfNwx1fAYyJcbNFSAsjD3Wik0qX/GStlk8GFrd++XQK6nA7l LZyw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ypAwe6Um; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w26si6504740ejn.699.2021.03.07.21.08.54; Sun, 07 Mar 2021 21:08:54 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ypAwe6Um; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234294AbhCHFIR (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:17 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36280 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234263AbhCHFIB (ORCPT ); Mon, 8 Mar 2021 00:08:01 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12857uJS077195; Sun, 7 Mar 2021 23:07:56 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180076; bh=OsKa0EDwQKMOxN4rn2UsJ4wTaESxeSKXJwtpa+eVAPs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ypAwe6Um9TfNu1TEIq711pOm40jXtAglwNi/i2VI9FsciMMhZZbalT3Y5uNJT7Wp1 brFFnEpPxxlsFPTp3K0pvu+QrpgxjCyHSON736Za8B08Qo+cnNq1wBkW41C9/IxLv5 ys0dX2vv36gLUCjTV7xuiA09Vs7UHo8hb8g7/zms= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12857ucf068310 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:07:56 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:07:56 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:07:56 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL2086547; Sun, 7 Mar 2021 23:07:53 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode Date: Mon, 8 Mar 2021 10:37:23 +0530 Message-ID: <20210308050732.7140-5-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org "serdes" node (child node of WIZ) can have sub-nodes for representing links or it can have sub-nodes for representing the various clocks within the serdes. Instead of trying to read "reg" from every child node used for assigning "lane_phy_type", read only if the child node's name is "phy" or "link" subnode. Ideally all PHY dt nodes should have node name as "phy", however existing devicetree used "link" as subnode. So in order to maintain old DT compatibility get PHY properties for "phy" or "link" subnode. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/ti/phy-j721e-wiz.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index 1bb73822f44a..659597645201 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -1102,6 +1102,10 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz) u32 reg, num_lanes = 1, phy_type = PHY_NONE; int ret, i; + if (!(of_node_name_eq(subnode, "phy") || + of_node_name_eq(subnode, "link"))) + continue; + ret = of_property_read_u32(subnode, "reg", ®); if (ret) { dev_err(dev, From patchwork Mon Mar 8 05:07:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395335 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1421928jai; Sun, 7 Mar 2021 21:08:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJwOg8X/H/KQhvyuGzuGB/OjelLwqJadjVPz2Y2Lm5KC/JqFSYg+woq8wVtPo+XaxSAXGUg1 X-Received: by 2002:a17:906:f210:: with SMTP id gt16mr13068903ejb.206.1615180136170; Sun, 07 Mar 2021 21:08:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180136; cv=none; d=google.com; s=arc-20160816; b=HNNxbtq6ZCDgrApB3rsAfaSRBqtvFR9+KzPy2/W8M6m21jtiDaWGt2dg8Xuhu3ZGE+ W1osND/UAMjccfzpk+iMpz2O9RuSbkasfVC/f/GTEEE0EIolzDr/nXaamvrR2OXVy//o f50LSTpRX60Js6uJVKsiV68j/bOHgwX7sz1HG5zF1igHsEWsW/a0khNs/83AJCKe/E9x 1vD3jN0aT3y1I/Fy8N9CxWxV0TOmsS9nvNIbzE70r223CJAvd0m2KR6ehN1zN09uLbJo vb5YldTgFdlZgVQw4XN8x1k47gmz1UFLsU0JHtGlEFBd/uamSMhrSDapDBtBPe0W8zdM SXRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; b=0NgEznpm/Jdybs0j38iww2N7B84g7KFjffobrgGwX5JU3ODO8QglcB0Hppgppxqtxf jFXwLGlms/70XGHHsNrXSAv3uuPlSVejHsRkw/fRpLRr42jYWFAOU1za3BXjs95I+kdA QluXrjVvJSc31QbDNn+6xMXqFzHG53hmIOl5zKfc75qCwlz8+PqcSbXp9NICdFsVxl0y l5ufIpNVNP+UlOsKQsCD15JbtccLfiw86j0pw7TmXuyzYM36L5KJbvf0gsR3w26K0xQw /ZHHoBglOtyo7+szuARzmtk1lrryssh7Nbsgebs73YfGx6QBjVv5onaX/THhoo49KF6r 8kdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=wDAlGoIY; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w26si6504740ejn.699.2021.03.07.21.08.56; Sun, 07 Mar 2021 21:08:56 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=wDAlGoIY; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234298AbhCHFIS (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:18 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36296 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234264AbhCHFIF (ORCPT ); Mon, 8 Mar 2021 00:08:05 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 128580qb077226; Sun, 7 Mar 2021 23:08:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180080; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wDAlGoIYg3vBTytrL7JEhHSMGMnNntta11ENmdsXjwVubCZBuOH485rSYMA/+naKw upGoOUu0F0EzlMGuIIGMST8aV9gKcqez9jFBUm2XZyyl2Y7vgOEv19PLqzzmd0kp8i +VmhudGV737w2NDaiE7JoxW3nPkA0ivD8Mw9BVJ8= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 128580XA116621 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:00 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:00 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:00 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL3086547; Sun, 7 Mar 2021 23:07:57 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 05/13] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function Date: Mon, 8 Mar 2021 10:37:24 +0530 Message-ID: <20210308050732.7140-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Group all devm_clk_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 57 +++++++++++++++--------- 1 file changed, 35 insertions(+), 22 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index f7ba0ed416bc..7bf1b4c7774a 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -477,6 +477,38 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, + struct device *dev) +{ + struct clk *clk; + int ret; + + clk = devm_clk_get_optional(dev, "phy_clk"); + if (IS_ERR(clk)) { + dev_err(dev, "failed to get clock phy_clk\n"); + return PTR_ERR(clk); + } + sp->clk = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk_dig_div = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk1_dig_div = clk; + + return 0; +} + static int cdns_sierra_phy_probe(struct platform_device *pdev) { struct cdns_sierra_phy *sp; @@ -487,7 +519,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) unsigned int id_value; int i, ret, node = 0; void __iomem *base; - struct clk *clk; struct device_node *dn = dev->of_node, *child; if (of_get_child_count(dn) == 0) @@ -524,11 +555,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) platform_set_drvdata(pdev, sp); - sp->clk = devm_clk_get_optional(dev, "phy_clk"); - if (IS_ERR(sp->clk)) { - dev_err(dev, "failed to get clock phy_clk\n"); - return PTR_ERR(sp->clk); - } + ret = cdns_sierra_phy_get_clocks(sp, dev); + if (ret) + return ret; sp->phy_rst = devm_reset_control_get(dev, "sierra_reset"); if (IS_ERR(sp->phy_rst)) { @@ -542,22 +571,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) return PTR_ERR(sp->apb_rst); } - clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk_dig_div = clk; - - clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk1_dig_div = clk; - ret = clk_prepare_enable(sp->clk); if (ret) return ret; From patchwork Mon Mar 8 05:07:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395334 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1421916jai; Sun, 7 Mar 2021 21:08:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJxNNy5ZedEjB8RcZ3lniWh27TfvVb0gWgrWj4ea3m8JRo/UT9qld+GCAzX2xA3QsGLfd3si X-Received: by 2002:a05:6402:35c9:: with SMTP id z9mr20360289edc.94.1615180134973; Sun, 07 Mar 2021 21:08:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180134; cv=none; d=google.com; s=arc-20160816; b=Js7me64kLyO3AMkXiU6OjyisHJDRfAEKKffANdsgDJytQhU/D+1LEoBaYpBJ7eAt4Z KlqcSoul24RJDSLRm3AEEBvg02RiBHH06eeruN+URqA2cPtInol8D/8JaQURuJi4VtaW 87OHYrvkOlITZ6VJ3m3br1KakZ0bXV+XQonJyhi5or2grhYNTdvz69Oa9gxcqUm5vpUD 9ti8SXfH0LsFFAv4U8ZHQUDR0WZK7XCDIoZLH+n0hPs1rk+9pXQV4zv5pxMUeFJ6NHSp 5uFTh2DovTEjkRpDwPK6g3lknQZvcPyEpYGgxsJHpH0SMvCZAemlsvcDupnOAiZqEyMk 99lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=WnJojV2RIcrSpG/FMHpx7hS8r2BmwynHcxEFLLXKjTQ=; b=rebgIEvymBNgqlXMPaAWIBbYerg5wiU4vFZ149we2zoivqmNhg+JgPE+sqpVQd5bRW 3Er1TsJiBH5bugmE5MC4GBSTEhWceDHt6tNINWPndYNOydMuCOthLhQxh/14/6cofV9b i7DVhJnx4yrdHjYPobgGZkvMR4odzRw9yaraNq8veu1wDj6e/eg029uncxbA56OB96k+ MAWT32RXVsJlD/ux6zL97x1Ff1ln0iuXZc3vEzm3P8PNuQZYYDK8WX9LSLCi+VJA4TKp iH+5FZk7b+Xn0qq7GL/IINZX6IkcNS3Im0D6yUg9Gr0gnI3yeF+6Kjs/+SHsckT6pbra BptQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=lp3NZukR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w26si6504740ejn.699.2021.03.07.21.08.54; Sun, 07 Mar 2021 21:08:54 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=lp3NZukR; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234303AbhCHFIS (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:18 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38034 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234275AbhCHFIJ (ORCPT ); Mon, 8 Mar 2021 00:08:09 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 128584la023603; Sun, 7 Mar 2021 23:08:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180084; bh=WnJojV2RIcrSpG/FMHpx7hS8r2BmwynHcxEFLLXKjTQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lp3NZukRwThTCLbk6tP775r66fCez+U6m8bc7mYbW+Is/I2cDCW0wKqoI6QdmKgSR cTScH0KmUKWKmAaS/VEzijH6TOnyu0m8ocE2x+Lzim4qfqvTfq0IhFryktG8DyCcRi XgCtSewj3va1c7o58EgWasrWKwgHBgUnYHhN6694= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 128584E2040107 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:04 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:03 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:03 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL4086547; Sun, 7 Mar 2021 23:08:00 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 06/13] phy: cadence: cadence-sierra: Move all reset_control_get*() to a separate function Date: Mon, 8 Mar 2021 10:37:25 +0530 Message-ID: <20210308050732.7140-7-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Group devm_reset_control_get() and devm_reset_control_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 36 ++++++++++++++++-------- 1 file changed, 25 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 7bf1b4c7774a..935f165404e4 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -509,6 +509,28 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, + struct device *dev) +{ + struct reset_control *rst; + + rst = devm_reset_control_get(dev, "sierra_reset"); + if (IS_ERR(rst)) { + dev_err(dev, "failed to get reset\n"); + return PTR_ERR(rst); + } + sp->phy_rst = rst; + + rst = devm_reset_control_get_optional(dev, "sierra_apb"); + if (IS_ERR(rst)) { + dev_err(dev, "failed to get apb reset\n"); + return PTR_ERR(rst); + } + sp->apb_rst = rst; + + return 0; +} + static int cdns_sierra_phy_probe(struct platform_device *pdev) { struct cdns_sierra_phy *sp; @@ -559,17 +581,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - sp->phy_rst = devm_reset_control_get(dev, "sierra_reset"); - if (IS_ERR(sp->phy_rst)) { - dev_err(dev, "failed to get reset\n"); - return PTR_ERR(sp->phy_rst); - } - - sp->apb_rst = devm_reset_control_get_optional(dev, "sierra_apb"); - if (IS_ERR(sp->apb_rst)) { - dev_err(dev, "failed to get apb reset\n"); - return PTR_ERR(sp->apb_rst); - } + ret = cdns_sierra_phy_get_resets(sp, dev); + if (ret) + return ret; ret = clk_prepare_enable(sp->clk); if (ret) From patchwork Mon Mar 8 05:07:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395333 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1421909jai; Sun, 7 Mar 2021 21:08:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJzvIf0/w7eDKZUtwC2flOI1ucFDAsGFPw78cN2tZJPjry4XxTnZktyX5J0P6INsGR7004dQ X-Received: by 2002:a17:906:4705:: with SMTP id y5mr13596573ejq.119.1615180134616; Sun, 07 Mar 2021 21:08:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180134; cv=none; d=google.com; s=arc-20160816; b=kj/52ngYovhW9yG2ERl7sTg5Ib0PpYdTgcb9Imb7HWMRbyHDmlbULqn70e6NEdTTIy opIToZwVGn4LbdQi2V0Q3nAZZRGrcr36Vju+aV0aIbAGWoYfsy5aANH5AvNSk7TNcqHO gh8I1XqqOOD7m+7yabXVfBzxIE92zEIIiWzDQTendfHCd/DLm3rymq82DWMeT1vutrZs occ/3bG7HxRmJfyfnmYYEgwqRjVgaGYbg2e/HDMr3NJL4qxnK6Suka5r+14XZTetGwRR TxgwI1sTBGtrD6c8fpdGYU2zBUW5hEVB0MCNeJL2ODgyX6qo9rZl6QnA1eKQMVcEHU/K BrrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=TsbqIXJs6B38X8Auxf3dPsgKPxUh2cFtxGTPMXU1r1Y=; b=joFDOsKs+NAFbN3RIAUIUKJ/S/U/4kVDdXEagvIGGd3DfFNHqEuugW/VcIk2Bv/5fk SS8Mkc6NJdnvy1zkddnsXV0o1fNm+L3CPSN02IzgJzLuBiRLUucWnTIbq3bWhNiz9Tn+ G6TMpshuT61beNdpMatHBVnsOoNcFwMenj3Bs+hpw7khmnLS78gyEA+VSXzhOlZ/cjL4 qJ3lvoV7RAMccjgZwVXIvQGW888xHjRt7P5GIC6S/tEiTIQAOtBFnJtWr75xFFU9/Ewq msSCGgM72ICcUSPWH7h4CEjJbU91xsunwLYgjK3ZtjEsCAXS8tEl5zL8tWZ5LvLCdk/T sAfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PvNl8bYr; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w26si6504740ejn.699.2021.03.07.21.08.54; Sun, 07 Mar 2021 21:08:54 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PvNl8bYr; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234305AbhCHFIS (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:18 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36308 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234277AbhCHFIM (ORCPT ); Mon, 8 Mar 2021 00:08:12 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 128587V3077248; Sun, 7 Mar 2021 23:08:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180087; bh=TsbqIXJs6B38X8Auxf3dPsgKPxUh2cFtxGTPMXU1r1Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PvNl8bYrArU2Gfmx3pDFfnCh1TMxQeqMp/M4pgKducGmhVzlujoDxVuNAPy2QPpmu AmXnflDg+tW3qNEo6dmJ5r4sAxOgyfYO1vs4o2uTsJVKMZg+pAfsA0zIW9WcXL6bkE tkpI4sqlMzpHEhGXf8kA2y4vISThLvheYc9fPfy0= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 128587gs117135 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:07 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:07 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:07 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL5086547; Sun, 7 Mar 2021 23:08:04 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 07/13] phy: cadence: cadence-sierra: Explicitly request exclusive reset control Date: Mon, 8 Mar 2021 10:37:26 +0530 Message-ID: <20210308050732.7140-8-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Since the reset controls obtained in Sierra is exclusively used by the Sierra device, use exclusive reset control request API calls. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Philipp Zabel --- drivers/phy/cadence/phy-cadence-sierra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 935f165404e4..44c52a0842dc 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -514,14 +514,14 @@ static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, { struct reset_control *rst; - rst = devm_reset_control_get(dev, "sierra_reset"); + rst = devm_reset_control_get_exclusive(dev, "sierra_reset"); if (IS_ERR(rst)) { dev_err(dev, "failed to get reset\n"); return PTR_ERR(rst); } sp->phy_rst = rst; - rst = devm_reset_control_get_optional(dev, "sierra_apb"); + rst = devm_reset_control_get_optional_exclusive(dev, "sierra_apb"); if (IS_ERR(rst)) { dev_err(dev, "failed to get apb reset\n"); return PTR_ERR(rst); From patchwork Mon Mar 8 05:07:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395336 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1422540jai; Sun, 7 Mar 2021 21:10:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJzhBgMCTqyzOYFdf7ygCqpQxEtfw3S0rsXIExd144K4kuLYRpHKFtAs9G12nDN1iZKZ/VWs X-Received: by 2002:a17:906:eb89:: with SMTP id mh9mr13569879ejb.122.1615180224992; Sun, 07 Mar 2021 21:10:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180224; cv=none; d=google.com; s=arc-20160816; b=Ni6Glbj/LTvVrAL3oRD79d+L2SweTh8L6oEdZtpmXY2cO8Oyd4qH+YqlZTCMPo0iYJ l4WWMhPwVrEpqqbv0EY5KMe/9e5Jrba70IN+/KRlueKZvlFAEIhBwXWyfWuZNBgVK/it RTiCk+b110Zom9mH2N0XknP/31wv+qTBhiAJTaAa9LvCimZIpT60eS/lRGvjbvDlbcQ0 mBb2W1NtUG1lIPgVy+Yw1REspk4Yacdncd1yidyLKp6m0yzTgyThmPImUtHTIJW5CWXs 7hidmDaJYLPWu1awqSrIlN2YG3edZBUM28rQqgGc+hmgsEyTUdQcj5ZX0vh/DlNzxZQl RIjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=pRK8XOEkhDdvAT2TMSHqs5UzWg743i9yUsPPhy+2lsc=; b=yDYG9omEX2EVc0/mY0JVN8lgqO9BZzlnB/QpmZxFAPOao+mtuX/fCmH7ZPYlZ5FwTs zHh94C5W+42wC52B6A2dAyXumZ9yBZojMPAE/DQCb8vroMhNrZJm2fOSqlp2OjYpJiJZ olXbnvpv2eeQYgFlGtJfr2mPqx4lCJo2SogQgEZPJ9dFIsVvSRrVt3wHiKgmU0qmrqyg Ps7+7TsBA/xivDivw7WQCVrAReT0mkuEs+nlwZ1JhISTEgU2aq48xmJAWrZuYSTCyjyy b8vkBXiPZS46YynZvvK/O+89b5tbRM6s8H/qRGJPeoRivOIV1OFko9N3RjH0Btedg5wk sb8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eIKJ3yoh; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.24; Sun, 07 Mar 2021 21:10:24 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eIKJ3yoh; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234354AbhCHFIr (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:47 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38052 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234280AbhCHFIP (ORCPT ); Mon, 8 Mar 2021 00:08:15 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858BcV023628; Sun, 7 Mar 2021 23:08:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180091; bh=pRK8XOEkhDdvAT2TMSHqs5UzWg743i9yUsPPhy+2lsc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eIKJ3yohwZL4crXpkQY/g+noCQiYXp9pdEcLVywBZH9bpfKPJJLr5XfYrsJqOrPhp 8+W/ODjFZRs/0uN0EodANwDTBxv5CBFEyBGj931eBdK5Kkig3z6kYl/fEL3RLC+LN6 URCPDabJg8wbsBjtj2xkifACX4HijOVkVXK6O8Y8= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858B8d006678 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:11 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:10 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:10 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL6086547; Sun, 7 Mar 2021 23:08:07 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 08/13] phy: cadence-torrent: Use a common header file for Cadence SERDES Date: Mon, 8 Mar 2021 10:37:27 +0530 Message-ID: <20210308050732.7140-9-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. In order to have a single header file for all Cadence SERDES move phy-cadence-torrent.h to phy-cadence.h. This is in preparation for adding Cadence Sierra SERDES specific macros. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-torrent.c | 2 +- .../phy/{phy-cadence-torrent.h => phy-cadence.h} | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) rename include/dt-bindings/phy/{phy-cadence-torrent.h => phy-cadence.h} (51%) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 63ac8a3baeca..4059d36d039f 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence.h similarity index 51% rename from include/dt-bindings/phy/phy-cadence-torrent.h rename to include/dt-bindings/phy/phy-cadence.h index 3c92c6192493..4a5ea52a856f 100644 --- a/include/dt-bindings/phy/phy-cadence-torrent.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -1,15 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * This header provides constants for Cadence Torrent SERDES. + * This header provides constants for Cadence SERDES. */ -#ifndef _DT_BINDINGS_TORRENT_SERDES_H -#define _DT_BINDINGS_TORRENT_SERDES_H +#ifndef _DT_BINDINGS_CADENCE_SERDES_H +#define _DT_BINDINGS_CADENCE_SERDES_H +/* Torrent */ #define TORRENT_SERDES_NO_SSC 0 #define TORRENT_SERDES_EXTERNAL_SSC 1 #define TORRENT_SERDES_INTERNAL_SSC 2 #define CDNS_TORRENT_REFCLK_DRIVER 0 -#endif /* _DT_BINDINGS_TORRENT_SERDES_H */ +#endif /* _DT_BINDINGS_CADENCE_SERDES_H */ From patchwork Mon Mar 8 05:07:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395337 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1422544jai; Sun, 7 Mar 2021 21:10:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJyp3I5APbr94VscKcMZ1s9zieQqpdaJkCPgA1A2OTuP5kQwA8OFvIQEyDWp4Lb0nhGQMjJt X-Received: by 2002:a50:fd8b:: with SMTP id o11mr20186150edt.346.1615180225324; Sun, 07 Mar 2021 21:10:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180225; cv=none; d=google.com; s=arc-20160816; b=F27SdmRchPEoETo2cVDyVOd2Q+1/FJVAoqxjDlnqGdzGdyUMibiJQdAPFj0LR5Qeu7 4kYjTH95dUhGWMnu/pCIvKku6ZpaNQcPc+7nFMVuxafQ3EgQPI3ByBKvrdc+IwvXUGPl oThj4Y/savy2mCBxRTZFiCYHROeqXfqmc8w8c/R3R6esjGaYhePtM4LU/k7B0H3Wd+Gs dYm6DhcyeJWeM9XX+T4Jpw6Hgp2yQyt6L9if84HAqkFcqTSPAwqJOigcGmaFE9TIM9gh 9BgEBXX0QzlB1HkmYM6L4wQhbrAvojIlr128h26z315cTai85oK+eXGAD+KSD8tmnabU dbVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=fTTzBtUNI6wOHn23Acadhw+lAANu22wL/U385vCODoY=; b=1A3rJ1tY74GQ++oQNv2ThTz0gGVz5ofQYf8rV/GsS7pDXBPgTb/8lTZLuETWvYNI0Q uhFpXa4Y3HzVWrPlkYmjtDlON7SJhlCyGaYTsiKDt18wTLGoBrneBxVoUe0Kg+k04MrA w4pqvFhYn+NFSRKq4jAE/Ov5aq5OKAZuK1RgYEIEXAhbpC/On8kQaTi3TY6vv2DKWc/M VNllrY1juN3fC9tH/5EQPizw9Oh1LD4+VcKAQBEQiBNzki7THJB8v02V1IjVXImV6PT1 ykQ9IqIEJ3RNIIrrTszLs0l4R0YugKZ4kqnbbPjpWO4p8Vkkg+yEGgxzNYYomsvZka9O 2kJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eDF4bfxU; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.25; Sun, 07 Mar 2021 21:10:25 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eDF4bfxU; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234356AbhCHFIs (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:48 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38062 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234308AbhCHFIT (ORCPT ); Mon, 8 Mar 2021 00:08:19 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858E4F023642; Sun, 7 Mar 2021 23:08:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180094; bh=fTTzBtUNI6wOHn23Acadhw+lAANu22wL/U385vCODoY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eDF4bfxUnaPVKwi+WWebmePqPsUnO7rjsYK9JZNWmP/3qqYkryA6VL/8pEd/BOrtw Hy2/A/ZziCDnVY6E/Ci0USNuV3PjSRHR9b2jefGFWxOEURlnorI8Dbxf08ivb2ZeCw M8NKCu6lxl0BVJEfJen8acNGKyWtH+ox9+0KCLss= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858E0Y040369 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:14 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:13 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:13 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL7086547; Sun, 7 Mar 2021 23:08:11 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 09/13] phy: cadence: cadence-sierra: Add array of input clocks in "struct cdns_sierra_phy" Date: Mon, 8 Mar 2021 10:37:28 +0530 Message-ID: <20210308050732.7140-10-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Instead of having separate structure members for each input clock, add an array for the input clocks within "struct cdns_sierra_phy". This is in preparation for adding more input clocks required for supporting additional clock combination. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 25 ++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 44c52a0842dc..a45278c30948 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -144,6 +144,13 @@ #define SIERRA_MAX_LANES 16 #define PLL_LOCK_TIME 100000 +#define CDNS_SIERRA_INPUT_CLOCKS 3 +enum cdns_sierra_clock_input { + PHY_CLK, + CMN_REFCLK_DIG_DIV, + CMN_REFCLK1_DIG_DIV, +}; + static const struct reg_field macro_id_type = REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15); static const struct reg_field phy_pll_cfg_1 = @@ -197,9 +204,7 @@ struct cdns_sierra_phy { struct regmap_field *macro_id_type; struct regmap_field *phy_pll_cfg_1; struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; - struct clk *clk; - struct clk *cmn_refclk_dig_div; - struct clk *cmn_refclk1_dig_div; + struct clk *input_clks[CDNS_SIERRA_INPUT_CLOCKS]; int nsubnodes; u32 num_lanes; bool autoconf; @@ -281,8 +286,8 @@ static int cdns_sierra_phy_init(struct phy *gphy) if (phy->autoconf) return 0; - clk_set_rate(phy->cmn_refclk_dig_div, 25000000); - clk_set_rate(phy->cmn_refclk1_dig_div, 25000000); + clk_set_rate(phy->input_clks[CMN_REFCLK_DIG_DIV], 25000000); + clk_set_rate(phy->input_clks[CMN_REFCLK1_DIG_DIV], 25000000); if (ins->phy_type == PHY_TYPE_PCIE) { num_cmn_regs = phy->init_data->pcie_cmn_regs; num_ln_regs = phy->init_data->pcie_ln_regs; @@ -488,7 +493,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, dev_err(dev, "failed to get clock phy_clk\n"); return PTR_ERR(clk); } - sp->clk = clk; + sp->input_clks[PHY_CLK] = clk; clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); if (IS_ERR(clk)) { @@ -496,7 +501,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, ret = PTR_ERR(clk); return ret; } - sp->cmn_refclk_dig_div = clk; + sp->input_clks[CMN_REFCLK_DIG_DIV] = clk; clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); if (IS_ERR(clk)) { @@ -504,7 +509,7 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, ret = PTR_ERR(clk); return ret; } - sp->cmn_refclk1_dig_div = clk; + sp->input_clks[CMN_REFCLK1_DIG_DIV] = clk; return 0; } @@ -585,7 +590,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - ret = clk_prepare_enable(sp->clk); + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); if (ret) return ret; @@ -662,7 +667,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) reset_control_put(sp->phys[i].lnk_rst); of_node_put(child); clk_disable: - clk_disable_unprepare(sp->clk); + clk_disable_unprepare(sp->input_clks[PHY_CLK]); reset_control_assert(sp->apb_rst); return ret; } From patchwork Mon Mar 8 05:07:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395338 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1422548jai; Sun, 7 Mar 2021 21:10:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJymHI+8PG8HY8m5DQm4MpdoiK4S/mh77WmtelfxecYVc0EMzinORsbaZGmZTR5i8HJI7Lro X-Received: by 2002:a17:906:2dc1:: with SMTP id h1mr13519117eji.460.1615180225657; Sun, 07 Mar 2021 21:10:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180225; cv=none; d=google.com; s=arc-20160816; b=nVI6sx+YEPDbVrW2ZEt2VV0Ldz4VzLzfgKDDUi84fyIgGUcPW7c2XkXPVCfx9aUEQ0 rqb6G2lJmi8/BFIFi+C3w+8mQeJUyMNl9iM6JtP3gi1ryVm5VUPbpfcNOkQcJOFH5wwC mfBjo8zlX3o93GOg07Mz0gDxPc8tzQl+mkq5dI5vSiX94Fh4zWeU+wvVZhaYuCmZFixx fjmAwsQ8E0dcVDHVFI3j4GUMrPSyDubgLzH9hB/0ULNFav11Bnmy7XxbWJs0qKKoOVSn tzrGwLZ6NjVWa+z6dYDdprAPRnhYQGA14P2C5NAKbHnsfnrgADZNdJ/+/cIQYVzX1O1m 22mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=UNoEYKDBGTzOJeT/EP06qqm1sw++l0u4ofBeIhu+mFQ=; b=mEkMVp7p45GbAX787+B3lx6zWrKGVu3nhSvulf8fLoY9Bfuvus4uXkkaPSlgyH4Enn FbboUNoMRrDe2oUSQCajZEzA0ITPEN9U8esFeWrAAIu8fOUwzB3xoKa7HOWpZzYGsR4F dFf796NPIPO8COEWumwaxuF8ATeCZ4/9BxvV7HHttr1DiUAAXbNFwzlOmqxRmL1LG2bQ 4Y3TmoWaXhpBY/h5BhD59LNgfcNs9Ku/MvMoU6m7RiDul06L4bQLJJYHST0Qjv/iKbn6 dFkF/E3STtsD4BuGhnQN5lq6V2QDNSQNliOoftS+FcS6RJVRdmYJbc3DDSNSTGgvMXUn 2P5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kkGBMFqK; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.25; Sun, 07 Mar 2021 21:10:25 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kkGBMFqK; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234358AbhCHFIt (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:49 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38072 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234334AbhCHFIW (ORCPT ); Mon, 8 Mar 2021 00:08:22 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858HoQ023656; Sun, 7 Mar 2021 23:08:17 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180097; bh=UNoEYKDBGTzOJeT/EP06qqm1sw++l0u4ofBeIhu+mFQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=kkGBMFqKaCMFT2cdpHYS0/xT5zBGCTDbhSo6LEzrSkC9V7HH13ml4JfETb/chMaB8 4R5oOnJ9aJZt3pMjoaLx/1lKSWz6frBGXKtCuJUYLJAFVuWEjEQl+N4g6EpbI63X63 QWMTfQ/ZvAocYTxcxpqQxOAtRO4Y/K48XjJsCgno= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858HH4068766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:17 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:17 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:17 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL8086547; Sun, 7 Mar 2021 23:08:14 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 10/13] phy: cadence: cadence-sierra: Add missing clk_disable_unprepare() in .remove callback Date: Mon, 8 Mar 2021 10:37:29 +0530 Message-ID: <20210308050732.7140-11-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org commit 44d30d622821("phy: cadence: Add driver for Sierra PHY") enabled the clock in probe and failed to disable in remove callback. Add missing clk_disable_unprepare() in cdns_sierra_phy_remove(). Fixes: 44d30d622821("phy: cadence: Add driver for Sierra PHY") Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index a45278c30948..ac32b7b0289f 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -689,6 +689,9 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_assert(phy->phys[i].lnk_rst); reset_control_put(phy->phys[i].lnk_rst); } + + clk_disable_unprepare(phy->input_clks[PHY_CLK]); + return 0; } From patchwork Mon Mar 8 05:07:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395340 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1422558jai; Sun, 7 Mar 2021 21:10:27 -0800 (PST) X-Google-Smtp-Source: ABdhPJxjh+mhgH2JnoQU8X87BbCOucJEKwMh7sQ//OehYqRAowp8mAVvuWnnn2qv6piKNfECKywo X-Received: by 2002:a50:ef11:: with SMTP id m17mr13809652eds.151.1615180227395; Sun, 07 Mar 2021 21:10:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180227; cv=none; d=google.com; s=arc-20160816; b=ix4ZkBwii0HNvXGHLC4TiVchiX17IAmCe9ZdPs819+LPrGegnpfOLpYzOJM0AgcTJO Nq3t/STPPbRyVmuzcyH/jj4D0WqUU1MkrznQ/ceaB1FosYzXL4ax6VUND9WVzqHUjxTr rF5Eg2lcO03sS5A0Jw00w0c9wiVRw4SO3JiB9JNrzH44RdP7erGwR4iXpSqTj8BTZjFa q23rt1GAX5BUP0cXrTTwJdR2afNmQkP08VGHZPvdiA8JKcL2DEvCbILUWHHZDJ9Q9YwA wrWBdjEN4a3S3Pj8nKOIdDHq2bo7xZrEFy7/7PCMnDPkYzBJ6z9vvYumnZ5eFobnq575 QYpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=7JT1cqvwkft7bIfWWqmj+KOSHCAdRh24MWWOwaCY3/Y=; b=Qt/+Q+0K7DcGzz4jf7dhZ777dLLR5sjUNsCDk3NmrUmspt38vkGMpJsiX0jrvRZaQj 4tjZOHGL5dlF3h6An2SntIwEv3y8p9M5AFng6YM/ClazFasQ6BXdy8Nb13Ubcbwmws52 aERZh2KtxR7XlPip7uezlUmIqTtn0cX/QyPN2k2jaIbJf6awV2gLvsHDvr09GatWI+f3 BNDV/8qPG3BU07hphehqta8GNj1XiQTWqJeDYjJRbV1aOsHmM9fEmyK4ZAu0CxKIWbpx iKjpXLop9/UHPqKMDyb+6uGU7Nzgd0EPRAvrEl3wmtgKCQqWEZsgiNGA9vCz6PbynIcY u8+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gnTyOxm+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.27; Sun, 07 Mar 2021 21:10:27 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gnTyOxm+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234362AbhCHFIu (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:50 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38082 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234277AbhCHFIZ (ORCPT ); Mon, 8 Mar 2021 00:08:25 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858KBF023663; Sun, 7 Mar 2021 23:08:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180100; bh=7JT1cqvwkft7bIfWWqmj+KOSHCAdRh24MWWOwaCY3/Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gnTyOxm+/t67SMipjfqZvHcUaUL9oHup7X8CtbpvM1dKyDFaAKZZStzx8OieqkVJq 6125MhEBdDr4NO5tFmjY56R1uK2n54VjgQz+/gY2whPeU44BkR4Mmj1XGQlfvOGLLZ oiq5bHQZHJeCJ/EGg0WTz3ax5YnWBFN2AAumaeQE= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858KZL068820 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:20 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:20 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:20 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aL9086547; Sun, 7 Mar 2021 23:08:17 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 11/13] dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider Date: Mon, 8 Mar 2021 10:37:30 +0530 Message-ID: <20210308050732.7140-12-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add #clock-cells binding to model Sierra as clock provider and include clock IDs for PLL_CMNLC and PLL_CMNLC1. Signed-off-by: Kishon Vijay Abraham I --- .../bindings/phy/phy-cadence-sierra.yaml | 17 ++++++++++++++++- include/dt-bindings/phy/phy-cadence.h | 4 ++++ 2 files changed, 20 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml index d210843863df..84383e2e0b34 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml @@ -26,6 +26,9 @@ properties: '#size-cells': const: 0 + '#clock-cells': + const: 1 + resets: minItems: 1 maxItems: 2 @@ -49,12 +52,24 @@ properties: const: serdes clocks: - maxItems: 2 + minItems: 2 + maxItems: 4 clock-names: + minItems: 2 items: - const: cmn_refclk_dig_div - const: cmn_refclk1_dig_div + - const: pll0_refclk + - const: pll1_refclk + + assigned-clocks: + minItems: 1 + maxItems: 2 + + assigned-clock-parents: + minItems: 1 + maxItems: 2 cdns,autoconf: type: boolean diff --git a/include/dt-bindings/phy/phy-cadence.h b/include/dt-bindings/phy/phy-cadence.h index 4a5ea52a856f..4652bcb86265 100644 --- a/include/dt-bindings/phy/phy-cadence.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -13,4 +13,8 @@ #define CDNS_TORRENT_REFCLK_DRIVER 0 +/* Sierra */ +#define CDNS_SIERRA_PLL_CMNLC 0 +#define CDNS_SIERRA_PLL_CMNLC1 1 + #endif /* _DT_BINDINGS_CADENCE_SERDES_H */ From patchwork Mon Mar 8 05:07:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 395339 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1422553jai; Sun, 7 Mar 2021 21:10:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJwZ7u7ussZdzKQRG7RDhjI7lMkFjAXIrjpzgXl+/Bdf5le2XN1/1WUhUmfYqBh+/TA9HuZb X-Received: by 2002:a17:906:4442:: with SMTP id i2mr13659232ejp.41.1615180226564; Sun, 07 Mar 2021 21:10:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615180226; cv=none; d=google.com; s=arc-20160816; b=ep5VFnMcAWmmg7iFro/5q6MPkP6oQe4N+ZgbrvBRUNH5+3B4a6CpDc/W8LULXEPFCK u6pQvwsQv4fV/Hc8+tIE9iGrqev+sLAz0ccHuWn+t2eKcTAOr0/tuJMyzxOfSAGSj8cE 9HSTZ2gyJcSe7zA7gK/n2F+34A8fbYFCJQytZuHi671SCu7H/sRNViiGmnyV7OoSxz2u yL1QTHLQRaWWiruZjstxU4iRazMgh+hp+jUGtM+fCUkTFaySmsZyBRX1LN1a2A7iE8/X WTddfWfD7GA7YCnjqt1O9PjywTXTv4vsqIPol7ath+ZvnjldA1Y2mLreoxQWLnMG684t 30wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=s2+8cghWfie9VB5JGAK09BwYQIrTf5D8iqC7CsdN+mo=; b=VsCYHQGiF2cT064/jLW0mV4tvW6twYLxWkT2GWQ7B30X+aw6Gn5wsrNbxdOc/LVcU3 mrOXoxysSpCrb2BAkYLFke0PeNFNRX5Y7SmXcwcJE6iqY+1e892xuLZ0uji3C4ekgBq6 OkrR3Dcsm3H51cd3mowBmqHrlWvXevd0wVuiM2DEmChmXM63RMrnGR5pxpmY7lAU8SZ4 fyVNeOkV1knI/UyFIqtzafmWnwKz5ReEHvkI2jzVJJ+Q7h6Sl+ZiLFNtxfVGnRlnJ9za ZnW1wT7HS8hrJdwXK8ImAtefNtt2LnkerhxO6Ei8Op2LN6HhF2nL/Ci+A5/o6JH0PxGy 3FvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qUiPtcit; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.26; Sun, 07 Mar 2021 21:10:26 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qUiPtcit; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234366AbhCHFIu (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:50 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38088 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234351AbhCHFI3 (ORCPT ); Mon, 8 Mar 2021 00:08:29 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858OKE023678; Sun, 7 Mar 2021 23:08:24 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180104; bh=s2+8cghWfie9VB5JGAK09BwYQIrTf5D8iqC7CsdN+mo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qUiPtcitoabZsHopbPEiRZs7xqrGq3p7Ptj7Ytu1gjAHBTirb0rxBzSjGrXJk/zTP VQeI2vWNwssxmHnxyXM4Sown8IECEg98GcdrwX1wXPv1CyzUt+fSrb7Vpi0jem7fgt Ij5N8uQrHlP/chRlhqe6Tf+1sBR6TuXsR7twi4Ks= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858OY4040498 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:24 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:23 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:24 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aLA086547; Sun, 7 Mar 2021 23:08:21 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 12/13] phy: cadence: phy-cadence-sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) Date: Mon, 8 Mar 2021 10:37:31 +0530 Message-ID: <20210308050732.7140-13-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as clocks so that it's possible to select one of these two inputs from device tree. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/Kconfig | 1 + drivers/phy/cadence/phy-cadence-sierra.c | 271 ++++++++++++++++++++++- 2 files changed, 267 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig index 432832bdbd16..23d5382c34ed 100644 --- a/drivers/phy/cadence/Kconfig +++ b/drivers/phy/cadence/Kconfig @@ -24,6 +24,7 @@ config PHY_CADENCE_DPHY config PHY_CADENCE_SIERRA tristate "Cadence Sierra PHY Driver" depends on OF && HAS_IOMEM && RESET_CONTROLLER + depends on COMMON_CLK select GENERIC_PHY help Enable this to support the Cadence Sierra PHY driver diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index ac32b7b0289f..b80afc11dd5c 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -7,6 +7,7 @@ * */ #include +#include #include #include #include @@ -20,10 +21,12 @@ #include #include #include +#include /* PHY register offsets */ #define SIERRA_COMMON_CDB_OFFSET 0x0 #define SIERRA_MACRO_ID_REG 0x0 +#define SIERRA_CMN_PLLLC_GEN_PREG 0x42 #define SIERRA_CMN_PLLLC_MODE_PREG 0x48 #define SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG 0x49 #define SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG 0x4A @@ -31,6 +34,9 @@ #define SIERRA_CMN_PLLLC_BWCAL_MODE1_PREG 0x4F #define SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG 0x50 #define SIERRA_CMN_PLLLC_SS_TIME_STEPSIZE_MODE_PREG 0x62 +#define SIERRA_CMN_REFRCV_PREG 0x98 +#define SIERRA_CMN_REFRCV1_PREG 0xB8 +#define SIERRA_CMN_PLLLC1_GEN_PREG 0xC2 #define SIERRA_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \ ((0x4000 << (block_offset)) + \ @@ -144,13 +150,19 @@ #define SIERRA_MAX_LANES 16 #define PLL_LOCK_TIME 100000 -#define CDNS_SIERRA_INPUT_CLOCKS 3 +#define CDNS_SIERRA_OUTPUT_CLOCKS 2 +#define CDNS_SIERRA_INPUT_CLOCKS 5 enum cdns_sierra_clock_input { PHY_CLK, - CMN_REFCLK_DIG_DIV, - CMN_REFCLK1_DIG_DIV, + CMN_REFCLK_DIG_DIV, + CMN_REFCLK1_DIG_DIV, + PLL0_REFCLK, + PLL1_REFCLK, }; +#define SIERRA_NUM_CMN_PLLC 2 +#define SIERRA_NUM_CMN_PLLC_PARENTS 2 + static const struct reg_field macro_id_type = REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15); static const struct reg_field phy_pll_cfg_1 = @@ -158,6 +170,53 @@ static const struct reg_field phy_pll_cfg_1 = static const struct reg_field pllctrl_lock = REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0); +static const char * const clk_names[] = { + [CDNS_SIERRA_PLL_CMNLC] = "pll_cmnlc", + [CDNS_SIERRA_PLL_CMNLC1] = "pll_cmnlc1", +}; + +enum cdns_sierra_cmn_plllc { + CMN_PLLLC, + CMN_PLLLC1, +}; + +struct cdns_sierra_pll_mux_reg_fields { + struct reg_field pfdclk_sel_preg; + struct reg_field plllc1en_field; + struct reg_field termen_field; +}; + +static const struct cdns_sierra_pll_mux_reg_fields cmn_plllc_pfdclk1_sel_preg[] = { + [CMN_PLLLC] = { + .pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC_GEN_PREG, 1, 1), + .plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 8, 8), + .termen_field = REG_FIELD(SIERRA_CMN_REFRCV1_PREG, 0, 0), + }, + [CMN_PLLLC1] = { + .pfdclk_sel_preg = REG_FIELD(SIERRA_CMN_PLLLC1_GEN_PREG, 1, 1), + .plllc1en_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 8, 8), + .termen_field = REG_FIELD(SIERRA_CMN_REFRCV_PREG, 0, 0), + }, +}; + +struct cdns_sierra_pll_mux { + struct clk_hw hw; + struct regmap_field *pfdclk_sel_preg; + struct regmap_field *plllc1en_field; + struct regmap_field *termen_field; + struct clk_init_data clk_data; +}; + +#define to_cdns_sierra_pll_mux(_hw) \ + container_of(_hw, struct cdns_sierra_pll_mux, hw) + +static const int pll_mux_parent_index[][SIERRA_NUM_CMN_PLLC_PARENTS] = { + [CMN_PLLLC] = { PLL0_REFCLK, PLL1_REFCLK }, + [CMN_PLLLC1] = { PLL1_REFCLK, PLL0_REFCLK }, +}; + +static u32 cdns_sierra_pll_mux_table[] = { 0, 1 }; + struct cdns_sierra_inst { struct phy *phy; u32 phy_type; @@ -204,10 +263,15 @@ struct cdns_sierra_phy { struct regmap_field *macro_id_type; struct regmap_field *phy_pll_cfg_1; struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES]; + struct regmap_field *cmn_refrcv_refclk_plllc1en_preg[SIERRA_NUM_CMN_PLLC]; + struct regmap_field *cmn_refrcv_refclk_termen_preg[SIERRA_NUM_CMN_PLLC]; + struct regmap_field *cmn_plllc_pfdclk1_sel_preg[SIERRA_NUM_CMN_PLLC]; struct clk *input_clks[CDNS_SIERRA_INPUT_CLOCKS]; int nsubnodes; u32 num_lanes; bool autoconf; + struct clk_onecell_data clk_data; + struct clk *output_clks[CDNS_SIERRA_OUTPUT_CLOCKS]; }; static int cdns_regmap_write(void *context, unsigned int reg, unsigned int val) @@ -369,6 +433,153 @@ static const struct phy_ops ops = { .owner = THIS_MODULE, }; +static u8 cdns_sierra_pll_mux_get_parent(struct clk_hw *hw) +{ + struct cdns_sierra_pll_mux *mux = to_cdns_sierra_pll_mux(hw); + struct regmap_field *field = mux->pfdclk_sel_preg; + unsigned int val; + + regmap_field_read(field, &val); + return clk_mux_val_to_index(hw, cdns_sierra_pll_mux_table, 0, val); +} + +static int cdns_sierra_pll_mux_set_parent(struct clk_hw *hw, u8 index) +{ + struct cdns_sierra_pll_mux *mux = to_cdns_sierra_pll_mux(hw); + struct regmap_field *plllc1en_field = mux->plllc1en_field; + struct regmap_field *termen_field = mux->termen_field; + struct regmap_field *field = mux->pfdclk_sel_preg; + int val, ret; + + ret = regmap_field_write(plllc1en_field, 0); + ret |= regmap_field_write(termen_field, 0); + if (index == 1) { + ret |= regmap_field_write(plllc1en_field, 1); + ret |= regmap_field_write(termen_field, 1); + } + + val = cdns_sierra_pll_mux_table[index]; + ret |= regmap_field_write(field, val); + + return ret; +} + +static const struct clk_ops cdns_sierra_pll_mux_ops = { + .set_parent = cdns_sierra_pll_mux_set_parent, + .get_parent = cdns_sierra_pll_mux_get_parent, +}; + +static int cdns_sierra_pll_mux_register(struct cdns_sierra_phy *sp, + struct regmap_field *pfdclk1_sel_field, + struct regmap_field *plllc1en_field, + struct regmap_field *termen_field, + int clk_index) +{ + struct cdns_sierra_pll_mux *mux; + struct device *dev = sp->dev; + struct clk_init_data *init; + const char **parent_names; + unsigned int num_parents; + char clk_name[100]; + struct clk *clk; + int i; + + mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); + if (!mux) + return -ENOMEM; + + num_parents = SIERRA_NUM_CMN_PLLC_PARENTS; + parent_names = devm_kzalloc(dev, (sizeof(char *) * num_parents), GFP_KERNEL); + if (!parent_names) + return -ENOMEM; + + for (i = 0; i < num_parents; i++) { + clk = sp->input_clks[pll_mux_parent_index[clk_index][i]]; + if (IS_ERR_OR_NULL(clk)) { + dev_err(dev, "No parent clock for derived_refclk\n"); + return PTR_ERR(clk); + } + parent_names[i] = __clk_get_name(clk); + } + + snprintf(clk_name, sizeof(clk_name), "%s_%s", dev_name(dev), clk_names[clk_index]); + + init = &mux->clk_data; + + init->ops = &cdns_sierra_pll_mux_ops; + init->flags = CLK_SET_RATE_NO_REPARENT; + init->parent_names = parent_names; + init->num_parents = num_parents; + init->name = clk_name; + + mux->pfdclk_sel_preg = pfdclk1_sel_field; + mux->plllc1en_field = plllc1en_field; + mux->termen_field = termen_field; + mux->hw.init = init; + + clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + sp->output_clks[clk_index] = clk; + + return 0; +} + +static int cdns_sierra_phy_register_pll_mux(struct cdns_sierra_phy *sp) +{ + struct regmap_field *pfdclk1_sel_field; + struct regmap_field *plllc1en_field; + struct regmap_field *termen_field; + struct device *dev = sp->dev; + int ret = 0, i, clk_index; + + clk_index = CDNS_SIERRA_PLL_CMNLC; + for (i = 0; i < SIERRA_NUM_CMN_PLLC; i++, clk_index++) { + pfdclk1_sel_field = sp->cmn_plllc_pfdclk1_sel_preg[i]; + plllc1en_field = sp->cmn_refrcv_refclk_plllc1en_preg[i]; + termen_field = sp->cmn_refrcv_refclk_termen_preg[i]; + + ret = cdns_sierra_pll_mux_register(sp, pfdclk1_sel_field, plllc1en_field, + termen_field, clk_index); + if (ret) { + dev_err(dev, "Fail to register cmn plllc mux\n"); + return ret; + } + } + + return 0; +} + +static void cdns_sierra_clk_unregister(struct cdns_sierra_phy *sp) +{ + struct device *dev = sp->dev; + struct device_node *node = dev->of_node; + + of_clk_del_provider(node); +} + +static int cdns_sierra_clk_register(struct cdns_sierra_phy *sp) +{ + struct device *dev = sp->dev; + struct device_node *node = dev->of_node; + int ret; + + ret = cdns_sierra_phy_register_pll_mux(sp); + if (ret) { + dev_err(dev, "Failed to pll mux clocks\n"); + return ret; + } + + sp->clk_data.clks = sp->output_clks; + sp->clk_data.clk_num = CDNS_SIERRA_OUTPUT_CLOCKS; + ret = of_clk_add_provider(node, of_clk_src_onecell_get, &sp->clk_data); + if (ret) + dev_err(dev, "Failed to add clock provider: %s\n", node->name); + + return ret; +} + static int cdns_sierra_get_optional(struct cdns_sierra_inst *inst, struct device_node *child) { @@ -407,6 +618,7 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) { struct device *dev = sp->dev; struct regmap_field *field; + struct reg_field reg_field; struct regmap *regmap; int i; @@ -418,6 +630,32 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) } sp->macro_id_type = field; + for (i = 0; i < SIERRA_NUM_CMN_PLLC; i++) { + reg_field = cmn_plllc_pfdclk1_sel_preg[i].pfdclk_sel_preg; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "PLLLC%d_PFDCLK1_SEL failed\n", i); + return PTR_ERR(field); + } + sp->cmn_plllc_pfdclk1_sel_preg[i] = field; + + reg_field = cmn_plllc_pfdclk1_sel_preg[i].plllc1en_field; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "REFRCV%d_REFCLK_PLLLC1EN failed\n", i); + return PTR_ERR(field); + } + sp->cmn_refrcv_refclk_plllc1en_preg[i] = field; + + reg_field = cmn_plllc_pfdclk1_sel_preg[i].termen_field; + field = devm_regmap_field_alloc(dev, regmap, reg_field); + if (IS_ERR(field)) { + dev_err(dev, "REFRCV%d_REFCLK_TERMEN failed\n", i); + return PTR_ERR(field); + } + sp->cmn_refrcv_refclk_termen_preg[i] = field; + } + regmap = sp->regmap_phy_config_ctrl; field = devm_regmap_field_alloc(dev, regmap, phy_pll_cfg_1); if (IS_ERR(field)) { @@ -511,6 +749,22 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, } sp->input_clks[CMN_REFCLK1_DIG_DIV] = clk; + clk = devm_clk_get_optional(dev, "pll0_refclk"); + if (IS_ERR(clk)) { + dev_err(dev, "pll0_refclk clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->input_clks[PLL0_REFCLK] = clk; + + clk = devm_clk_get_optional(dev, "pll1_refclk"); + if (IS_ERR(clk)) { + dev_err(dev, "pll1_refclk clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->input_clks[PLL1_REFCLK] = clk; + return 0; } @@ -586,13 +840,17 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) return ret; - ret = cdns_sierra_phy_get_resets(sp, dev); + ret = cdns_sierra_clk_register(sp); if (ret) return ret; + ret = cdns_sierra_phy_get_resets(sp, dev); + if (ret) + goto unregister_clk; + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); if (ret) - return ret; + goto unregister_clk; /* Enable APB */ reset_control_deassert(sp->apb_rst); @@ -669,6 +927,8 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) clk_disable: clk_disable_unprepare(sp->input_clks[PHY_CLK]); reset_control_assert(sp->apb_rst); +unregister_clk: + cdns_sierra_clk_unregister(sp); return ret; } @@ -691,6 +951,7 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) } clk_disable_unprepare(phy->input_clks[PHY_CLK]); + cdns_sierra_clk_unregister(phy); return 0; } From patchwork Mon Mar 8 05:07:32 2021 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id dg23si6340931edb.519.2021.03.07.21.10.27; Sun, 07 Mar 2021 21:10:27 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gA3eY+1+; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234367AbhCHFIv (ORCPT + 6 others); Mon, 8 Mar 2021 00:08:51 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36338 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234352AbhCHFIc (ORCPT ); Mon, 8 Mar 2021 00:08:32 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12858Rar077337; Sun, 7 Mar 2021 23:08:27 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1615180107; bh=+Y00hdZP+qH3GUjqo1BgTa5yanHKcZM8l+fdCNkwrBk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gA3eY+1+ymr21oGfHhAxPHO806Ci6caZG8eWEsHwXX2WusNGv0fVh5YbUhPqNtLJC RiJd2UYUcCD5/9umsRCObXPQHc/xPVHZxux3KCp+ix497pTWdg7B5i7FBDCTU5HbSB mT3JkH7W64HaSTGrHzfyx/w7INIrzkQ9krba7Ozg= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12858RL2068871 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 7 Mar 2021 23:08:27 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Sun, 7 Mar 2021 23:08:27 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Sun, 7 Mar 2021 23:08:27 -0600 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12857aLB086547; Sun, 7 Mar 2021 23:08:24 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Philipp Zabel , Swapnil Jakhade CC: , , Lokesh Vutla Subject: [PATCH v5 13/13] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Date: Mon, 8 Mar 2021 10:37:32 +0530 Message-ID: <20210308050732.7140-14-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Get pll_cmnlc and pll_cmnlc1 optional clocks and enable them. This will enable REFRCV/1 in case the pll_cmnlc/1 takes input from REFRCV/1 respectively. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 40 ++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index b80afc11dd5c..16adc6dff04e 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -768,6 +768,40 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_enable_clocks(struct cdns_sierra_phy *sp) +{ + int ret; + + ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); + if (ret) + return ret; + + ret = clk_prepare_enable(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + if (ret) + goto err_pll_cmnlc; + + ret = clk_prepare_enable(sp->output_clks[CDNS_SIERRA_PLL_CMNLC1]); + if (ret) + goto err_pll_cmnlc1; + + return 0; + +err_pll_cmnlc: + clk_disable_unprepare(sp->input_clks[PHY_CLK]); + +err_pll_cmnlc1: + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + + return ret; +} + +static void cdns_sierra_phy_disable_clocks(struct cdns_sierra_phy *sp) +{ + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC1]); + clk_disable_unprepare(sp->output_clks[CDNS_SIERRA_PLL_CMNLC]); + clk_disable_unprepare(sp->input_clks[PHY_CLK]); +} + static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, struct device *dev) { @@ -848,7 +882,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) goto unregister_clk; - ret = clk_prepare_enable(sp->input_clks[PHY_CLK]); + ret = cdns_sierra_phy_enable_clocks(sp); if (ret) goto unregister_clk; @@ -925,7 +959,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) reset_control_put(sp->phys[i].lnk_rst); of_node_put(child); clk_disable: - clk_disable_unprepare(sp->input_clks[PHY_CLK]); + cdns_sierra_phy_disable_clocks(sp); reset_control_assert(sp->apb_rst); unregister_clk: cdns_sierra_clk_unregister(sp); @@ -941,6 +975,7 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_assert(phy->apb_rst); pm_runtime_disable(&pdev->dev); + cdns_sierra_phy_disable_clocks(phy); /* * The device level resets will be put automatically. * Need to put the subnode resets here though. @@ -950,7 +985,6 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) reset_control_put(phy->phys[i].lnk_rst); } - clk_disable_unprepare(phy->input_clks[PHY_CLK]); cdns_sierra_clk_unregister(phy); return 0;