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[81.169.180.215]) by mx.google.com with ESMTP id l57si345052edb.393.2018.04.17.18.07.25; Tue, 17 Apr 2018 18:07:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id AE6D2C21E62; Wed, 18 Apr 2018 01:06:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 16FB8C21C29; Wed, 18 Apr 2018 01:06:34 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D367CC21DA1; Wed, 18 Apr 2018 01:06:15 +0000 (UTC) Received: from mx.socionext.com (mx.socionext.com [202.248.49.38]) by lists.denx.de (Postfix) with ESMTP id 17B43C21DD4 for ; Wed, 18 Apr 2018 01:06:14 +0000 (UTC) Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 18 Apr 2018 10:06:13 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id D7A36180B6D for ; Wed, 18 Apr 2018 10:06:13 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Wed, 18 Apr 2018 10:06:13 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id A32D21A0DEC; Wed, 18 Apr 2018 10:06:13 +0900 (JST) From: Kunihiko Hayashi To: u-boot@lists.denx.de Date: Wed, 18 Apr 2018 10:06:07 +0900 Message-Id: <1524013567-1798-1-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 X-Mailman-Approved-At: Wed, 18 Apr 2018 01:06:32 +0000 Subject: [U-Boot] [PATCH] reset: uniphier: add ethernet reset control support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add reset lines for ethernet controller on each SoC. Signed-off-by: Kunihiko Hayashi --- drivers/reset/reset-uniphier.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index a40cea5..e7a7da7 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -43,6 +43,7 @@ struct uniphier_reset_data { /* System reset data */ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(6, 0x2000, 12), /* ETHER */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC */ UNIPHIER_RESETX(12, 0x2000, 6), /* GIO */ UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ @@ -52,6 +53,7 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(6, 0x2000, 12), /* ETHER */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC */ UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ @@ -68,6 +70,7 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(6, 0x200c, 6), /* ETHER */ UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC */ UNIPHIER_RESETX(12, 0x200c, 5), /* GIO */ UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */ @@ -80,6 +83,8 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(6, 0x200c, 9), /* ETHER0 */ + UNIPHIER_RESETX(7, 0x200c, 10), /* ETHER1 */ UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ UNIPHIER_RESETX(12, 0x200c, 5), /* USB30 (GIO0) */ UNIPHIER_RESETX(13, 0x200c, 6), /* USB31 (GIO1) */