From patchwork Thu Mar 4 09:21:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 393799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63F98C433DB for ; Thu, 4 Mar 2021 09:23:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2F90464F04 for ; Thu, 4 Mar 2021 09:23:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237441AbhCDJXK (ORCPT ); Thu, 4 Mar 2021 04:23:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236880AbhCDJWj (ORCPT ); Thu, 4 Mar 2021 04:22:39 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92FBAC061574 for ; Thu, 4 Mar 2021 01:21:59 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id t9so6150887pjl.5 for ; Thu, 04 Mar 2021 01:21:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=5rqX3oISXCRcG3SDYtERKxsOzMD4aRyBT5O+WgeLhRw=; b=fWkzNOJETrckU74xDmRsKDLDtsJLxQRGZNuaJLloXyBfmmfpWRU9fKQOeR5IHtITRL RSHzLQEOXWqDqQPPettK0WLYVFhqXce4dA7jn1I38GQbKfGhXp+jd7PmYZnY7P0x3cJ4 CIVMXXW8j5EXbHQoXp0xDgwVlcyXB9umBP38g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=5rqX3oISXCRcG3SDYtERKxsOzMD4aRyBT5O+WgeLhRw=; b=kaE4bVe1ktapG92vNaL0gO/718lpbg+/bJStBqY/6SRq5xZRCeyiIE44PjaKaN0/Ij FnImMZj45BTj8UskM1x0udeXKpaeujjKNFDpmQbO3w64L0de+o1UgBZADxiTksKh3Hts iztn6ViJKqdRXmxe/wz7t/HO8pkyWWl8ZNXXwQKMKAaXTU79aFRct5hNZP2mOX/jKryy 5DfXX21bFP4AbFv9SFmh67/wU2gbnFQEyknPwXL0eZChKPtJrkfvpBDO7b8DCQLuuWf8 fsESuz/xurhl6MzsUarotKolxDyEJNCZly8mSmOrwBu08eilvPfZq0bYJkG9aWA7xrIo Plfw== X-Gm-Message-State: AOAM533mK4Im+slhEdEZggZbVyxmqBfLJeBI6y08Jt395PbIYgbmEjfg Bz9R63GgV/A/Ih6i/ts5fozVYw== X-Google-Smtp-Source: ABdhPJz881CCYGH780UwEgnivv1z/1mmBBu93Cn0k7MDpBPNgmSOsOVD5JVOIpZ0o8bHGdTrrbsmhA== X-Received: by 2002:a17:90b:3809:: with SMTP id mq9mr3193659pjb.32.1614849718804; Thu, 04 Mar 2021 01:21:58 -0800 (PST) Received: from ub-XPS-13-9350.domain.name ([103.161.30.228]) by smtp.gmail.com with ESMTPSA id 14sm27326981pfy.55.2021.03.04.01.21.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Mar 2021 01:21:58 -0800 (PST) From: Jagan Teki To: Rob Herring , Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Sam Ravnborg , Robert Foss Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v4 1/2] dt-bindings: display: bridge: Add Chipone ICN6211 bindings Date: Thu, 4 Mar 2021 14:51:32 +0530 Message-Id: <20210304092133.21717-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org ICN6211 is MIPI-DSI to RGB Converter bridge from Chipone. It has a flexible configuration of MIPI DSI signal input and produces RGB565, RGB666, RGB888 output format. Add dt-bingings for it. Signed-off-by: Jagan Teki Reviewed-by: Robert Foss Reviewed-by: Rob Herring --- Changes for v4: - fixed Laurent comments - added regulators - replace reset with EN - fixed warnings pointed by Robert Changes for v3: - updated to new dt-bindings style .../display/bridge/chipone,icn6211.yaml | 99 +++++++++++++++++++ MAINTAINERS | 5 + 2 files changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml new file mode 100644 index 000000000000..62c3bd4cb28d --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/chipone,icn6211.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge + +maintainers: + - Jagan Teki + +description: | + ICN6211 is MIPI-DSI to RGB Converter bridge from chipone. + + It has a flexible configuration of MIPI DSI signal input and + produce RGB565, RGB666, RGB888 output format. + +properties: + compatible: + enum: + - chipone,icn6211 + + reg: + maxItems: 1 + description: virtual channel number of a DSI peripheral + + enable-gpios: + description: Bridge EN pin, chip is reset when EN is low. + + vdd1-supply: + description: A 1.8V/2.5V/3.3V supply that power the MIPI RX. + + vdd2-supply: + description: A 1.8V/2.5V/3.3V supply that power the PLL. + + vdd3-supply: + description: A 1.8V/2.5V/3.3V supply that power the RGB output. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Video port for MIPI DSI input + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Video port for MIPI DPI output (panel or connector). + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - enable-gpios + - ports + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + bridge@0 { + compatible = "chipone,icn6211"; + reg = <0>; + enable-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* LCD-RST: PL5 */ + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_in_dsi: endpoint { + remote-endpoint = <&dsi_out_bridge>; + }; + }; + + port@1 { + reg = <1>; + + bridge_out_panel: endpoint { + remote-endpoint = <&panel_out_bridge>; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9d241b832aae..065cbdc889d3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5529,6 +5529,11 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.yaml F: drivers/gpu/drm/panel/panel-boe-himax8279d.c +DRM DRIVER FOR CHIPONE ICN6211 MIPI-DSI to RGB CONVERTER BRIDGE +M: Jagan Teki +S: Maintained +F: Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml + DRM DRIVER FOR FARADAY TVE200 TV ENCODER M: Linus Walleij S: Maintained From patchwork Thu Mar 4 09:21:33 2021 Content-Type: text/plain; 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It has a flexible configuration of MIPI DSI signal input and produce RGB565, RGB666, RGB888 output format. Add bridge driver for it. Signed-off-by: Jagan Teki Reviewed-by: Robert Foss --- Changes for v4: - added regulators - replace reset with EN - fixed warnings pointed by Robert Changes for v3: - updated the driver to inline with new drm bridge style MAINTAINERS | 1 + drivers/gpu/drm/bridge/Kconfig | 13 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/chipone-icn6211.c | 293 +++++++++++++++++++++++ 4 files changed, 308 insertions(+) create mode 100644 drivers/gpu/drm/bridge/chipone-icn6211.c diff --git a/MAINTAINERS b/MAINTAINERS index 065cbdc889d3..9c59402e51bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5533,6 +5533,7 @@ DRM DRIVER FOR CHIPONE ICN6211 MIPI-DSI to RGB CONVERTER BRIDGE M: Jagan Teki S: Maintained F: Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml +F: drivers/gpu/drm/bridge/chipone-icn6211.c DRM DRIVER FOR FARADAY TVE200 TV ENCODER M: Linus Walleij diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index e4110d6ca7b3..330ee70ed746 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -27,6 +27,19 @@ config DRM_CDNS_DSI Support Cadence DPI to DSI bridge. This is an internal bridge and is meant to be directly embedded in a SoC. +config DRM_CHIPONE_ICN6211 + tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge" + depends on OF + select DRM_MIPI_DSI + select DRM_PANEL_BRIDGE + help + ICN6211 is MIPI-DSI/RGB Converter bridge from chipone. + + It has a flexible configuration of MIPI DSI signal input + and produce RGB565, RGB666, RGB888 output format. + + If in doubt, say "N". + config DRM_CHRONTEL_CH7033 tristate "Chrontel CH7033 Video Encoder" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 86e7acc76f8d..3eb84b638988 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o +obj-$(CONFIG_DRM_CHIPONE_ICN6211) += chipone-icn6211.o obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c new file mode 100644 index 000000000000..a6151db95586 --- /dev/null +++ b/drivers/gpu/drm/bridge/chipone-icn6211.c @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Amarula Solutions(India) + * Author: Jagan Teki + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include