From patchwork Fri Feb 26 20:03:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388210 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D805C433E9 for ; Fri, 26 Feb 2021 20:05:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E1CB64EDB for ; Fri, 26 Feb 2021 20:05:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230022AbhBZUFR (ORCPT ); Fri, 26 Feb 2021 15:05:17 -0500 Received: from relay04.th.seeweb.it ([5.144.164.165]:37499 "EHLO relay04.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229967AbhBZUFN (ORCPT ); Fri, 26 Feb 2021 15:05:13 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id E6EBC1F87C; Fri, 26 Feb 2021 21:04:29 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/41] arm64: dts: qcom: sdm630: Rewrite memory map Date: Fri, 26 Feb 2021 21:03:31 +0100 Message-Id: <20210226200414.167762-2-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The memory map was wrong. Fix it. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 41 ++++++++++++---------------- 1 file changed, 18 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index f91a928466c3..5ea3884b3ccb 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -343,10 +343,19 @@ wlan_msa_mem: wlan-msa-mem@85700000 { }; qhee_code: qhee-code@85800000 { - reg = <0x0 0x85800000 0x0 0x3700000>; + reg = <0x0 0x85800000 0x0 0x600000>; no-map; }; + rmtfs_mem: memory@85e00000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0x85e00000 0x0 0x200000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + smem_region: smem-mem@86000000 { reg = <0 0x86000000 0 0x200000>; no-map; @@ -357,58 +366,44 @@ tz_mem: memory@86200000 { no-map; }; - modem_fw_mem: modem-fw-region@8ac00000 { + mpss_region: mpss@8ac00000 { reg = <0x0 0x8ac00000 0x0 0x7e00000>; no-map; }; - adsp_fw_mem: adsp-fw-region@92a00000 { + adsp_region: adsp@92a00000 { reg = <0x0 0x92a00000 0x0 0x1e00000>; no-map; }; - pil_mba_mem: pil-mba-region@94800000 { + mba_region: mba@94800000 { reg = <0x0 0x94800000 0x0 0x200000>; no-map; }; - buffer_mem: buffer-region@94a00000 { + buffer_mem: tzbuffer@94a00000 { reg = <0x0 0x94a00000 0x0 0x100000>; no-map; }; - venus_fw_mem: venus-fw-region@9f800000 { + venus_region: venus@9f800000 { reg = <0x0 0x9f800000 0x0 0x800000>; no-map; }; - secure_region2: secure-region2@f7c00000 { - reg = <0x0 0xf7c00000 0x0 0x5c00000>; - no-map; - }; - adsp_mem: adsp-region@f6000000 { reg = <0x0 0xf6000000 0x0 0x800000>; no-map; }; - qseecom_ta_mem: qseecom-ta-region@fec00000 { - reg = <0x0 0xfec00000 0x0 0x1000000>; - no-map; - }; - qseecom_mem: qseecom-region@f6800000 { reg = <0x0 0xf6800000 0x0 0x1400000>; no-map; }; - secure_display_memory: secure-region@f5c00000 { - reg = <0x0 0xf5c00000 0x0 0x5c00000>; - no-map; - }; - - cont_splash_mem: cont-splash-region@9d400000 { - reg = <0x0 0x9d400000 0x0 0x23ff000>; + zap_shader_region: gpu@fed00000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xfed00000 0x0 0xa00000>; no-map; }; }; From patchwork Fri Feb 26 20:03:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEC2AC43603 for ; Fri, 26 Feb 2021 20:05:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A696464F21 for ; Fri, 26 Feb 2021 20:05:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230134AbhBZUFe (ORCPT ); Fri, 26 Feb 2021 15:05:34 -0500 Received: from relay03.th.seeweb.it ([5.144.164.164]:41389 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230107AbhBZUFc (ORCPT ); Fri, 26 Feb 2021 15:05:32 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id C43201FAB6; Fri, 26 Feb 2021 21:04:33 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/41] arm64: dts: qcom: sdm630: Add RPMPD nodes Date: Fri, 26 Feb 2021 21:03:32 +0100 Message-Id: <20210226200414.167762-3-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the rpmpd node on the sdm630 and define the available levels. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 5ea3884b3ccb..0dd838ef5d6e 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include @@ -423,6 +424,52 @@ rpmcc: clock-controller { compatible = "qcom,rpmcc-sdm660", "qcom,rpmcc"; #clock-cells = <1>; }; + + rpmpd: power-controller { + compatible = "qcom,sdm660-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp_ret: opp1 { + opp-level = ; + }; + + rpmpd_opp_ret_plus: opp2 { + opp-level = ; + }; + + rpmpd_opp_min_svs: opp3 { + opp-level = ; + }; + + rpmpd_opp_low_svs: opp4 { + opp-level = ; + }; + + rpmpd_opp_svs: opp5 { + opp-level = ; + }; + + rpmpd_opp_svs_plus: opp6 { + opp-level = ; + }; + + rpmpd_opp_nom: opp7 { + opp-level = ; + }; + + rpmpd_opp_nom_plus: opp8 { + opp-level = ; + }; + + rpmpd_opp_turbo: opp9 { + opp-level = ; + }; + }; + }; }; }; From patchwork Fri Feb 26 20:03:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96340C432C3 for ; Fri, 26 Feb 2021 20:05:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 53E6F64F37 for ; Fri, 26 Feb 2021 20:05:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230113AbhBZUFb (ORCPT ); Fri, 26 Feb 2021 15:05:31 -0500 Received: from relay02.th.seeweb.it ([5.144.164.163]:47489 "EHLO relay02.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230087AbhBZUFa (ORCPT ); Fri, 26 Feb 2021 15:05:30 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 0B2A71FABA; Fri, 26 Feb 2021 21:04:37 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/41] arm64: dts: qcom: sdm630: Add MMCC node Date: Fri, 26 Feb 2021 21:03:33 +0100 Message-Id: <20210226200414.167762-4-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add MultiMedia Clock Controller node to allow for accessing and controlling Multimedia Subsystem clocks by their respective users. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 0dd838ef5d6e..e2cbe210048e 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -874,6 +874,34 @@ sdhc_1: sdhci@c0c4000 { status = "disabled"; }; + mmcc: clock-controller@c8c0000 { + compatible = "qcom,mmcc-sdm630"; + reg = <0x0c8c0000 0x40000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "xo", + "sleep_clk", + "gpll0", + "gpll0_div", + "dsi0pll", + "dsi0pllbyte", + "dsi1pll", + "dsi1pllbyte", + "dp_link_2x_clk_divsel_five", + "dp_vco_divided_clk_src_mux"; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>, + <&gcc GCC_MMSS_GPLL0_CLK>, + <&gcc GCC_MMSS_GPLL0_DIV_CLK>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>; + }; + blsp1_dma: dma-controller@c144000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0c144000 0x1f000>; From patchwork Fri Feb 26 20:03:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388208 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D60EDC433E6 for ; Fri, 26 Feb 2021 20:06:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 909DE64ECE for ; Fri, 26 Feb 2021 20:06:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230141AbhBZUFn (ORCPT ); Fri, 26 Feb 2021 15:05:43 -0500 Received: from m-r1.th.seeweb.it ([5.144.164.170]:57845 "EHLO m-r1.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230125AbhBZUFe (ORCPT ); Fri, 26 Feb 2021 15:05:34 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id EC2B61FAB7; Fri, 26 Feb 2021 21:04:49 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/41] arm64: dts: qcom: sdm630: Add interconnect provider nodes Date: Fri, 26 Feb 2021 21:03:34 +0100 Message-Id: <20210226200414.167762-5-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add interconnect provider nodes to allow for NoC bus scaling. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 59 ++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index e2cbe210048e..c46b7327afbe 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -516,11 +517,38 @@ rng: rng@793000 { clock-names = "core"; }; + bimc: interconnect@1008000 { + compatible = "qcom,sdm660-bimc"; + reg = <0x01008000 0x78000>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + restart@10ac000 { compatible = "qcom,pshold"; reg = <0x010ac000 0x4>; }; + cnoc: interconnect@1500000 { + compatible = "qcom,sdm660-cnoc"; + reg = <0x01500000 0x10000>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_CNOC_CLK>, + <&rpmcc RPM_SMD_CNOC_A_CLK>; + }; + + snoc: interconnect@1626000 { + compatible = "qcom,sdm660-snoc"; + reg = <0x01626000 0x7090>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + anoc2_smmu: iommu@16c0000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x016c0000 0x40000>; @@ -564,6 +592,25 @@ anoc2_smmu: iommu@16c0000 { status = "disabled"; }; + a2noc: interconnect@1704000 { + compatible = "qcom,sdm660-a2noc"; + reg = <0x01704000 0xc100>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + }; + + mnoc: interconnect@1745000 { + compatible = "qcom,sdm660-mnoc"; + reg = <0x01745000 0xA010>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a", "iface"; + clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>, + <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>, + <&mmcc AHB_CLK_SRC>; + }; + tcsr_mutex_regs: syscon@1f40000 { compatible = "syscon"; reg = <0x01f40000 0x20000>; @@ -1156,6 +1203,18 @@ mmss_smmu: iommu@cd00000 { status = "disabled"; }; + gnoc: interconnect@17900000 { + compatible = "qcom,sdm660-gnoc"; + reg = <0x17900000 0xe000>; + #interconnect-cells = <1>; + /* + * This one apparently features no clocks, + * so let's not mess with the driver needlessly + */ + clock-names = "bus", "bus_a"; + clocks = <&xo_board>, <&xo_board>; + }; + apcs_glb: mailbox@17911000 { compatible = "qcom,sdm660-apcs-hmss-global"; reg = <0x17911000 0x1000>; From patchwork Fri Feb 26 20:03:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7374C43331 for ; Fri, 26 Feb 2021 20:06:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7E2CC64F0E for ; Fri, 26 Feb 2021 20:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbhBZUF5 (ORCPT ); Fri, 26 Feb 2021 15:05:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230175AbhBZUFy (ORCPT ); Fri, 26 Feb 2021 15:05:54 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48912C061797 for ; Fri, 26 Feb 2021 12:04:58 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 01EA11FAC6; Fri, 26 Feb 2021 21:04:54 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/41] arm64: dts: qcom: sdm630: Add MDSS nodes Date: Fri, 26 Feb 2021 21:03:35 +0100 Message-Id: <20210226200414.167762-6-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add MDSS node along with its children to enable display functionality. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 198 ++++++++++++++++++++++++++- 1 file changed, 196 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index c46b7327afbe..e0c6099d0810 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -941,14 +941,208 @@ mmcc: clock-controller@c8c0000 { <&sleep_clk>, <&gcc GCC_MMSS_GPLL0_CLK>, <&gcc GCC_MMSS_GPLL0_DIV_CLK>, - <0>, - <0>, + <&dsi0_phy 1>, + <&dsi0_phy 0>, <0>, <0>, <0>, <0>; }; + dsi_opp_table: dsi-opp-table { + compatible = "operating-points-v2"; + + opp-131250000 { + opp-hz = /bits/ 64 <131250000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-210000000 { + opp-hz = /bits/ 64 <210000000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-262500000 { + opp-hz = /bits/ 64 <262500000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + + mdss: mdss@c900000 { + compatible = "qcom,mdss"; + reg = <0x0c900000 0x1000>, + <0x0c9b0000 0x1040>; + reg-names = "mdss_phys", "vbif_phys"; + + power-domains = <&mmcc MDSS_GDSC>; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_VSYNC_CLK>, + <&mmcc MDSS_MDP_CLK>; + clock-names = "iface", + "bus", + "vsync", + "core"; + + interrupts = ; + + interrupt-controller; + #interrupt-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + mdp: mdp@c901000 { + compatible = "qcom,mdp5"; + reg = <0x0c901000 0x89000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + assigned-clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + assigned-clock-rates = <300000000>, + <19200000>; + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync"; + + interconnects = <&mnoc 2 &bimc 5>, + <&mnoc 3 &bimc 5>, + <&gnoc 0 &mnoc 17>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "rotator-mem"; + iommus = <&mmss_smmu 0>; + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmpd SDM660_VDDCX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdp5_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + + mdp_opp_table: mdp-opp { + compatible = "operating-points-v2"; + + opp-150000000 { + opp-hz = /bits/ 64 <150000000>; + opp-peak-kBps = <320000 320000 76800>; + required-opps = <&rpmpd_opp_low_svs>; + }; + opp-275000000 { + opp-hz = /bits/ 64 <275000000>; + opp-peak-kBps = <6400000 6400000 160000>; + required-opps = <&rpmpd_opp_svs>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <6400000 6400000 190000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + opp-330000000 { + opp-hz = /bits/ 64 <330000000>; + opp-peak-kBps = <6400000 6400000 240000>; + required-opps = <&rpmpd_opp_nom>; + }; + opp-412500000 { + opp-hz = /bits/ 64 <412500000>; + opp-peak-kBps = <6400000 6400000 320000>; + required-opps = <&rpmpd_opp_turbo>; + }; + }; + }; + + dsi0: dsi@c994000 { + compatible = "qcom,mdss-dsi-ctrl"; + reg = <0x0c994000 0x400>; + reg-names = "dsi_ctrl"; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmpd SDM660_VDDCX>; + + interrupt-parent = <&mdss>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + + assigned-clocks = <&mmcc BYTE0_CLK_SRC>, + <&mmcc PCLK0_CLK_SRC>; + assigned-clock-parents = <&dsi0_phy 0>, + <&dsi0_phy 1>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_BYTE0_CLK>, + <&mmcc MDSS_BYTE0_INTF_CLK>, + <&mmcc MNOC_AHB_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MISC_AHB_CLK>, + <&mmcc MDSS_PCLK0_CLK>, + <&mmcc MDSS_ESC0_CLK>; + clock-names = "mdp_core", + "byte", + "byte_intf", + "mnoc", + "iface", + "bus", + "core_mmss", + "pixel", + "core"; + + phys = <&dsi0_phy>; + phy-names = "dsi"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&mdp5_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + }; + + dsi0_phy: dsi-phy@c994400 { + compatible = "qcom,dsi-phy-14nm-660"; + reg = <0x0c994400 0x100>, + <0x0c994500 0x300>, + <0x0c994800 0x188>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>; + clock-names = "iface", "ref"; + }; + }; + blsp1_dma: dma-controller@c144000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0c144000 0x1f000>; From patchwork Fri Feb 26 20:03:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42130C4332D for ; Fri, 26 Feb 2021 20:06:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A6B564F31 for ; Fri, 26 Feb 2021 20:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbhBZUFu (ORCPT ); Fri, 26 Feb 2021 15:05:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230140AbhBZUFl (ORCPT ); Fri, 26 Feb 2021 15:05:41 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF9B9C0617AA for ; Fri, 26 Feb 2021 12:05:03 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1ECFA1FACC; Fri, 26 Feb 2021 21:04:59 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio Subject: [PATCH 06/41] arm64: dts: qcom: sdm630: Fix intc reg indentation Date: Fri, 26 Feb 2021 21:03:36 +0100 Message-Id: <20210226200414.167762-7-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Konrad Dybcio Signed-off-by: Konrad Dybcio Signed-off-by:  Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index e0c6099d0810..274d39d4ab35 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1477,8 +1477,8 @@ frame@17928000 { intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; - reg = <0x17a00000 0x10000>, /* GICD */ - <0x17b00000 0x100000>; /* GICR * 8 */ + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17b00000 0x100000>; /* GICR * 8 */ #interrupt-cells = <3>; #address-cells = <1>; #size-cells = <1>; From patchwork Fri Feb 26 20:03:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387729 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0B95C433E0 for ; Fri, 26 Feb 2021 20:07:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 60E0864ECE for ; Fri, 26 Feb 2021 20:07:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230362AbhBZUG4 (ORCPT ); Fri, 26 Feb 2021 15:06:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230235AbhBZUGq (ORCPT ); Fri, 26 Feb 2021 15:06:46 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C7B0C06121D for ; Fri, 26 Feb 2021 12:05:08 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 480621FAD3; Fri, 26 Feb 2021 21:05:05 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/41] arm64: dts: qcom: sdm630: Add qfprom subnodes Date: Fri, 26 Feb 2021 21:03:37 +0100 Message-Id: <20210226200414.167762-8-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno These will be required for USB and Adreno support. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 274d39d4ab35..6a6a34438ac8 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -508,6 +508,16 @@ qfprom: qfprom@780000 { reg = <0x00780000 0x621c>; #address-cells = <1>; #size-cells = <1>; + + qusb2_hstx_trim: hstx-trim@240 { + reg = <0x240 0x1>; + bits = <25 3>; + }; + + gpu_speed_bin: gpu_speed_bin@41a0 { + reg = <0x41a0 0x1>; + bits = <21 7>; + }; }; rng: rng@793000 { From patchwork Fri Feb 26 20:03:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387730 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00D60C43332 for ; Fri, 26 Feb 2021 20:06:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C64AD64F0E for ; Fri, 26 Feb 2021 20:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230144AbhBZUF6 (ORCPT ); Fri, 26 Feb 2021 15:05:58 -0500 Received: from relay03.th.seeweb.it ([5.144.164.164]:33239 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230140AbhBZUFz (ORCPT ); Fri, 26 Feb 2021 15:05:55 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1C6781FABC; Fri, 26 Feb 2021 21:05:10 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/41] arm64: dts: qcom: sdm630: Add USB configuration Date: Fri, 26 Feb 2021 21:03:38 +0100 Message-Id: <20210226200414.167762-9-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This will let us use USB2 on our devices. The SoC supposedly supports USB3, but there are no known cases of devices that actually have USB3 wired up in hardware. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 64 ++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 6a6a34438ac8..551b70a8f22a 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -904,6 +904,70 @@ spmi_bus: spmi@800f000 { cell-index = <0>; }; + usb3: usb@a8f8800 { + compatible = "qcom,sdm660-dwc3", "qcom,dwc3"; + reg = <0x0a8f8800 0x400>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", "bus", + "mock_utmi", "sleep"; + + assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>, + <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + assigned-clock-rates = <19200000>, <120000000>, + <19200000>; + + interrupts = , + ; + interrupt-names = "hs_phy_irq", "ss_phy_irq"; + + power-domains = <&gcc USB_30_GDSC>; + qcom,select-utmi-as-pipe-clk; + + resets = <&gcc GCC_USB_30_BCR>; + + usb3_dwc3: dwc3@a800000 { + compatible = "snps,dwc3"; + reg = <0x0a800000 0xc8d0>; + interrupts = ; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + + /* + * SDM630 technically supports USB3 but I + * haven't seen any devices making use of it. + */ + maximum-speed = "high-speed"; + phys = <&qusb2phy>; + phy-names = "usb2-phy"; + snps,hird-threshold = /bits/ 8 <0>; + }; + }; + + qusb2phy: phy@c012000 { + compatible = "qcom,sdm660-qusb2-phy"; + reg = <0x0c012000 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&gcc GCC_RX1_USB2_CLKREF_CLK>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + nvmem-cells = <&qusb2_hstx_trim>; + status = "disabled"; + }; + sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5"; reg = <0x0c0c4000 0x1000>, From patchwork Fri Feb 26 20:03:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8D87C433E0 for ; Fri, 26 Feb 2021 20:08:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9306C64EED for ; Fri, 26 Feb 2021 20:08:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230417AbhBZUIK (ORCPT ); Fri, 26 Feb 2021 15:08:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230253AbhBZUHc (ORCPT ); Fri, 26 Feb 2021 15:07:32 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69EFBC061786; Fri, 26 Feb 2021 12:05:17 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 9EA2D1FACD; Fri, 26 Feb 2021 21:05:14 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/41] arm64: dts: qcom: sdm630: Fix TLMM node and pinctrl configuration Date: Fri, 26 Feb 2021 21:03:39 +0100 Message-Id: <20210226200414.167762-10-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Previous pinctrl configuration was wrong. Fix it. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 221 ++++++++++++++++++--------- 1 file changed, 145 insertions(+), 76 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 551b70a8f22a..410a97ea2bb3 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -626,14 +626,18 @@ tcsr_mutex_regs: syscon@1f40000 { reg = <0x01f40000 0x20000>; }; - tlmm: pinctrl@3000000 { + tlmm: pinctrl@3100000 { compatible = "qcom,sdm630-pinctrl"; - reg = <0x03000000 0xc00000>; + reg = <0x03100000 0x400000>, + <0x03500000 0x400000>, + <0x03900000 0x400000>; + reg-names = "south", "center", "north"; interrupts = ; gpio-controller; - #gpio-cells = <0x2>; + gpio-ranges = <&tlmm 0 0 114>; + #gpio-cells = <2>; interrupt-controller; - #interrupt-cells = <0x2>; + #interrupt-cells = <2>; blsp1_uart1_default: blsp1-uart1-default { pins = "gpio0", "gpio1", "gpio2", "gpio3"; @@ -653,40 +657,51 @@ blsp1_uart2_default: blsp1-uart2-default { bias-disable; }; - blsp2_uart1_tx_active: blsp2-uart1-tx-active { - pins = "gpio16"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_uart1_tx_sleep: blsp2-uart1-tx-sleep { - pins = "gpio16"; - drive-strength = <2>; - bias-pull-up; - }; - - blsp2_uart1_rxcts_active: blsp2-uart1-rxcts-active { - pins = "gpio17", "gpio18"; - drive-strength = <2>; - bias-disable; - }; - - blsp2_uart1_rxcts_sleep: blsp2-uart1-rxcts-sleep { - pins = "gpio17", "gpio18"; - drive-strength = <2>; - bias-no-pull; - }; - - blsp2_uart1_rfr_active: blsp2-uart1-rfr-active { - pins = "gpio19"; - drive-strength = <2>; - bias-disable; + blsp2_uart1_default: blsp2-uart1-active { + pinmux { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + function = "blsp_uart5"; + }; + pinconf-tx-rts { + pins = "gpio16", "gpio19"; + drive-strength = <2>; + bias-disable; + }; + pinconf-rx { + /* + * Avoid garbage data while BT module + * is powered off or not driving signal + */ + pins = "gpio17"; + drive-strength = <2>; + bias-pull-up; + }; + pinconf-cts { + /* Match the pull of the BT module */ + pins = "gpio18"; + drive-strength = <2>; + bias-pull-down; + }; }; - blsp2_uart1_rfr_sleep: blsp2-uart1-rfr-sleep { - pins = "gpio19"; - drive-strength = <2>; - bias-no-pull; + blsp2_uart1_sleep: blsp2-uart1-sleep { + pinmux { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + function = "gpio"; + }; + pinconf-tx { + pins = "gpio16"; + drive-strength = <2>; + bias-pull-up; + }; + pinconf-rx-cts-rts { + pins = "gpio17", "gpio18", + "gpio19"; + drive-strength = <2>; + bias-no-pull; + }; }; i2c1_default: i2c1-default { @@ -785,50 +800,106 @@ i2c8_sleep: i2c8-sleep { bias-pull-up; }; - sdc1_clk_on: sdc1-clk-on { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <16>; - }; + sdc1_state_on: sdc1-on { + pinconf-clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; - sdc1_clk_off: sdc1-clk-off { - pins = "sdc1_clk"; - bias-disable; - drive-strength = <2>; - }; + pinconf-cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; - sdc1_cmd_on: sdc1-cmd-on { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <10>; - }; + pinconf-data { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <10>; + }; - sdc1_cmd_off: sdc1-cmd-off { - pins = "sdc1_cmd"; - bias-pull-up; - drive-strength = <2>; + pinconf-rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; }; - sdc1_data_on: sdc1-data-on { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <8>; - }; + sdc1_state_off: sdc1-off { + pinconf-clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; - sdc1_data_off: sdc1-data-off { - pins = "sdc1_data"; - bias-pull-up; - drive-strength = <2>; + pinconf-cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + pinconf-data { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + + pinconf-rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; }; - sdc1_rclk_on: sdc1-rclk-on { - pins = "sdc1_rclk"; - bias-pull-down; + sdc2_state_on: sdc2-on { + pinconf-clk { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <16>; + }; + + pinconf-cmd { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + pinconf-data { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + + pinconf-sd-cd { + pins = "gpio54"; + bias-pull-up; + drive-strength = <2>; + }; }; - sdc1_rclk_off: sdc1-rclk-off { - pins = "sdc1_rclk"; - bias-pull-down; + sdc2_state_off: sdc2-off { + pinconf-clk { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <2>; + }; + + pinconf-cmd { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + pinconf-data { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <2>; + }; + + pinconf-sd-cd { + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + }; }; }; @@ -986,8 +1057,8 @@ sdhc_1: sdhci@c0c4000 { clock-names = "core", "iface", "xo", "ice"; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; - pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; + pinctrl-0 = <&sdc1_state_on>; + pinctrl-1 = <&sdc1_state_off>; bus-width = <8>; non-removable; @@ -1354,10 +1425,8 @@ blsp2_uart1: serial@c1af000 { dmas = <&blsp2_dma 0>, <&blsp2_dma 1>; dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp2_uart1_tx_active &blsp2_uart1_rxcts_active - &blsp2_uart1_rfr_active>; - pinctrl-1 = <&blsp2_uart1_tx_sleep &blsp2_uart1_rxcts_sleep - &blsp2_uart1_rfr_sleep>; + pinctrl-0 = <&blsp2_uart1_default>; + pinctrl-1 = <&blsp2_uart1_sleep>; status = "disabled"; }; From patchwork Fri Feb 26 20:03:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387728 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 734B8C43381 for ; Fri, 26 Feb 2021 20:07:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 34D6A64ECE for ; Fri, 26 Feb 2021 20:07:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230202AbhBZUGl (ORCPT ); Fri, 26 Feb 2021 15:06:41 -0500 Received: from relay04.th.seeweb.it ([5.144.164.165]:43151 "EHLO relay04.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230203AbhBZUGc (ORCPT ); Fri, 26 Feb 2021 15:06:32 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id B5A891F995; Fri, 26 Feb 2021 21:05:18 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/41] arm64: dts: qcom: sdm630: Add SDHCI2 node Date: Fri, 26 Feb 2021 21:03:40 +0100 Message-Id: <20210226200414.167762-11-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno This will enable usage of (generally) uSD cards. While at it, add accompanying OPP table for DVFS. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 50 ++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 410a97ea2bb3..c85a4a71fb0c 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1039,6 +1039,56 @@ qusb2phy: phy@c012000 { status = "disabled"; }; + sdhc_2: sdhci@c084000 { + compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0c084000 0x1000>; + reg-names = "hc"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + bus-width = <4>; + clocks = <&gcc GCC_SDCC2_APPS_CLK>, + <&gcc GCC_SDCC2_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; + + interconnects = <&a2noc 3 &a2noc 10>, + <&gnoc 0 &cnoc 28>; + operating-points-v2 = <&sdhc2_opp_table>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_state_on>; + pinctrl-1 = <&sdc2_state_off>; + power-domains = <&rpmpd SDM660_VDDCX>; + + status = "disabled"; + + sdhc2_opp_table: sdhc1-opp-table { + compatible = "operating-points-v2"; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <200000 140000>; + opp-avg-kBps = <130718 133320>; + }; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_svs>; + opp-peak-kBps = <250000 160000>; + opp-avg-kBps = <196078 150000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmpd_opp_nom>; + opp-peak-kBps = <4096000 4096000>; + opp-avg-kBps = <1338562 1338562>; + }; + }; + }; + sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5"; reg = <0x0c0c4000 0x1000>, From patchwork Fri Feb 26 20:03:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F25AC433DB for ; Fri, 26 Feb 2021 20:06:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B1B364E38 for ; Fri, 26 Feb 2021 20:06:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230297AbhBZUGf (ORCPT ); Fri, 26 Feb 2021 15:06:35 -0500 Received: from m-r1.th.seeweb.it ([5.144.164.170]:48573 "EHLO m-r1.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230212AbhBZUG0 (ORCPT ); Fri, 26 Feb 2021 15:06:26 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1A55C1F87C; Fri, 26 Feb 2021 21:05:23 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/41] arm64: dts: qcom: sdm630: Add interconnect and opp table to sdhc_1 Date: Fri, 26 Feb 2021 21:03:41 +0100 Message-Id: <20210226200414.167762-12-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The SDHC port 1 has interconnects and can make use of DVFS: define the interconnections and the OPP table in order to optimize performance and power consumption. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index c85a4a71fb0c..ed7d22aa734c 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1106,14 +1106,42 @@ sdhc_1: sdhci@c0c4000 { <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "core", "iface", "xo", "ice"; + interconnects = <&a2noc 2 &a2noc 10>, + <&gnoc 0 &cnoc 27>; + interconnect-names = "sdhc1-ddr", "cpu-sdhc1"; + operating-points-v2 = <&sdhc1_opp_table>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_state_on>; pinctrl-1 = <&sdc1_state_off>; + power-domains = <&rpmpd SDM660_VDDCX>; bus-width = <8>; non-removable; status = "disabled"; + + sdhc1_opp_table: sdhc1-opp-table { + compatible = "operating-points-v2"; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmpd_opp_low_svs>; + opp-peak-kBps = <200000 140000>; + opp-avg-kBps = <130718 133320>; + }; + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_svs>; + opp-peak-kBps = <250000 160000>; + opp-avg-kBps = <196078 150000>; + }; + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_nom>; + opp-peak-kBps = <4096000 4096000>; + opp-avg-kBps = <1338562 1338562>; + }; + }; }; mmcc: clock-controller@c8c0000 { From patchwork Fri Feb 26 20:03:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57622C433DB for ; Fri, 26 Feb 2021 20:08:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 079D064E38 for ; Fri, 26 Feb 2021 20:08:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230340AbhBZUHl (ORCPT ); Fri, 26 Feb 2021 15:07:41 -0500 Received: from relay02.th.seeweb.it ([5.144.164.163]:37005 "EHLO relay02.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230215AbhBZUHH (ORCPT ); Fri, 26 Feb 2021 15:07:07 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id B1BCC1FADD; Fri, 26 Feb 2021 21:05:27 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/41] arm64: dts: qcom: sdm630: Add GPU Clock Controller node Date: Fri, 26 Feb 2021 21:03:42 +0100 Message-Id: <20210226200414.167762-13-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Add the GPU Clock Controller in SDM630 and keep it disabled by default. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index ed7d22aa734c..cc8589cb5095 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -925,6 +926,22 @@ kgsl_smmu: iommu@5040000 { status = "disabled"; }; + gpucc: clock-controller@5065000 { + compatible = "qcom,gpucc-sdm630"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + reg = <0x05065000 0x9038>; + + clocks = <&xo_board>, + <&gcc GCC_GPU_GPLL0_CLK>, + <&gcc GCC_GPU_GPLL0_DIV_CLK>; + clock-names = "xo", + "gcc_gpu_gpll0_clk", + "gcc_gpu_gpll0_div_clk"; + status = "disabled"; + }; + lpass_smmu: iommu@5100000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x05100000 0x40000>; From patchwork Fri Feb 26 20:03:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFBA5C433E0 for ; Fri, 26 Feb 2021 20:07:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BB7564F17 for ; Fri, 26 Feb 2021 20:07:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230248AbhBZUHG (ORCPT ); Fri, 26 Feb 2021 15:07:06 -0500 Received: from m-r1.th.seeweb.it ([5.144.164.170]:40411 "EHLO m-r1.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230199AbhBZUGr (ORCPT ); Fri, 26 Feb 2021 15:06:47 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1BF051FABA; Fri, 26 Feb 2021 21:05:32 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/41] arm64: dts: qcom: sdm630: Add clocks and power domains to SMMU nodes Date: Fri, 26 Feb 2021 21:03:43 +0100 Message-Id: <20210226200414.167762-14-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Add the required clocks and power domains for the SMMUs to work. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 31 +++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index cc8589cb5095..9e50c9adada6 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -563,9 +563,14 @@ snoc: interconnect@1626000 { anoc2_smmu: iommu@16c0000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x016c0000 0x40000>; - #iommu-cells = <1>; + assigned-clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + assigned-clock-rates = <1000>; + clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + clock-names = "bus"; #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = , , @@ -907,9 +912,22 @@ pinconf-sd-cd { kgsl_smmu: iommu@5040000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x05040000 0x10000>; - #iommu-cells = <1>; + /* + * GX GDSC parent is CX. We need to bring up CX for SMMU + * but we need both up for Adreno. On the other hand, we + * need to manage the GX rpmpd domain in the adreno driver. + * Enable CX/GX GDSCs here so that we can manage just the GX + * RPM Power Domain in the Adreno driver. + */ + power-domains = <&gpucc GPU_GX_GDSC>; + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>, + <&gcc GCC_BIMC_GFX_CLK>, + <&gcc GCC_GPU_BIMC_GFX_CLK>; + clock-names = "iface", "mem", "mem_iface"; #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = , , @@ -1600,9 +1618,16 @@ blsp_i2c8: i2c@c1b8000 { mmss_smmu: iommu@cd00000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x0cd00000 0x40000>; - #iommu-cells = <1>; + clocks = <&mmcc MNOC_AHB_CLK>, + <&mmcc BIMC_SMMU_AHB_CLK>, + <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>, + <&mmcc BIMC_SMMU_AXI_CLK>; + clock-names = "iface-mm", "iface-smmu", + "bus-mm", "bus-smmu"; #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = , , From patchwork Fri Feb 26 20:03:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45177C433E9 for ; Fri, 26 Feb 2021 20:08:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E9A9A64F0E for ; Fri, 26 Feb 2021 20:08:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229949AbhBZUHr (ORCPT ); Fri, 26 Feb 2021 15:07:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230304AbhBZUHN (ORCPT ); Fri, 26 Feb 2021 15:07:13 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E387C061223 for ; Fri, 26 Feb 2021 12:05:39 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 8196D1FAD9; Fri, 26 Feb 2021 21:05:37 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/41] arm64: dts: qcom: sdm630: Add qcom, adreno-smmu compatible Date: Fri, 26 Feb 2021 21:03:44 +0100 Message-Id: <20210226200414.167762-15-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The Adreno SMMU in SDM630 needs this compatible string for proper context handling and split pagetables support. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 9e50c9adada6..deeb1237e67a 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -910,7 +910,8 @@ pinconf-sd-cd { }; kgsl_smmu: iommu@5040000 { - compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; + compatible = "qcom,sdm630-smmu-v2", + "qcom,adreno-smmu", "qcom,smmu-v2"; reg = <0x05040000 0x10000>; /* From patchwork Fri Feb 26 20:03:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 369BFC43332 for ; Fri, 26 Feb 2021 20:08:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DAF3664EED for ; Fri, 26 Feb 2021 20:08:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230366AbhBZUIb (ORCPT ); Fri, 26 Feb 2021 15:08:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230374AbhBZUHu (ORCPT ); Fri, 26 Feb 2021 15:07:50 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58EA7C061226 for ; Fri, 26 Feb 2021 12:05:44 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 971B91FAB6; Fri, 26 Feb 2021 21:05:41 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/41] arm64: dts: qcom: sdm630: Add TSENS node Date: Fri, 26 Feb 2021 21:03:45 +0100 Message-Id: <20210226200414.167762-16-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This will enable temperature reporting for various SoC components. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/thermal/qcom-tsens.yaml | 1 + arch/arm64/boot/dts/qcom/sdm630.dtsi | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 95462e071ab4..cdc2ab662436 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -40,6 +40,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,sc7180-tsens + - qcom,sdm630-tsens - qcom,sdm845-tsens - qcom,sm8150-tsens - qcom,sm8250-tsens diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index deeb1237e67a..2f35415cefed 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -627,6 +627,17 @@ mnoc: interconnect@1745000 { <&mmcc AHB_CLK_SRC>; }; + tsens: thermal-sensor@10ae000 { + compatible = "qcom,sdm630-tsens", "qcom,tsens-v2"; + reg = <0x010ae000 0x1000>, /* TM */ + <0x010ad000 0x1000>; /* SROT */ + #qcom,sensors = <12>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + tcsr_mutex_regs: syscon@1f40000 { compatible = "syscon"; reg = <0x01f40000 0x20000>; From patchwork Fri Feb 26 20:03:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A3B4C433E0 for ; Fri, 26 Feb 2021 20:09:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E230464ECE for ; Fri, 26 Feb 2021 20:09:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229885AbhBZUIv (ORCPT ); Fri, 26 Feb 2021 15:08:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230339AbhBZUHx (ORCPT ); Fri, 26 Feb 2021 15:07:53 -0500 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95D8AC0611C2 for ; Fri, 26 Feb 2021 12:05:48 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id DC2211FAB7; Fri, 26 Feb 2021 21:05:45 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 16/41] arm64: dts: qcom: sdm630: Add modem/ADSP SMP2P nodes Date: Fri, 26 Feb 2021 21:03:46 +0100 Message-Id: <20210226200414.167762-17-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SMP2P nodes that are required for ADSP and modem bringup. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 40 ++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 2f35415cefed..ffc18d0dee9e 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -481,6 +481,46 @@ smem: smem { hwlocks = <&tcsr_mutex 3>; }; + smp2p-adsp { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + interrupts = ; + mboxes = <&apcs_glb 10>; + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + adsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + adsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-mpss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + interrupts = ; + mboxes = <&apcs_glb 14>; + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + modem_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + modem_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; From patchwork Fri Feb 26 20:03:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A677C43333 for ; Fri, 26 Feb 2021 20:08:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40D3A64ECE for ; Fri, 26 Feb 2021 20:08:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230374AbhBZUIj (ORCPT ); Fri, 26 Feb 2021 15:08:39 -0500 Received: from relay03.th.seeweb.it ([5.144.164.164]:58133 "EHLO relay03.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbhBZUHh (ORCPT ); Fri, 26 Feb 2021 15:07:37 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 0A1071FBB2; Fri, 26 Feb 2021 21:05:49 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 17/41] arm64: dts: qcom: sdm630: Add thermal-zones configuration Date: Fri, 26 Feb 2021 21:03:47 +0100 Message-Id: <20210226200414.167762-18-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a basic thermal-zones configuration to make sure the SoC doesn't overheat itself to death. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 173 +++++++++++++++++++++++++++ 1 file changed, 173 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index ffc18d0dee9e..08e499229396 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -521,6 +521,179 @@ modem_smp2p_in: slave-kernel { }; }; + thermal-zones { + aoss-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 0>; + + trips { + aoss_alert0: trip-point0 { + temperature = <105000>; + hysteresis = <1000>; + type = "hot"; + }; + }; + }; + + cpuss0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 1>; + + trips { + cpuss0_alert0: trip-point0 { + temperature = <125000>; + hysteresis = <1000>; + type = "hot"; + }; + }; + }; + + cpuss1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 2>; + + trips { + cpuss1_alert0: trip-point0 { + temperature = <125000>; + hysteresis = <1000>; + type = "hot"; + }; + }; + }; + + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 3>; + + trips { + cpu0_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu0_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 4>; + + trips { + cpu1_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu1_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 5>; + + trips { + cpu2_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu2_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 6>; + + trips { + cpu3_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + + cpu3_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + /* + * According to what downstream DTS says, + * the entire power efficient cluster has + * only a single thermal sensor. + */ + + pwr-cluster-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 7>; + + trips { + pwr_cluster_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + + pwr_cluster_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 8>; + + trips { + gpu_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <1000>; + type = "hot"; + }; + }; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; From patchwork Fri Feb 26 20:03:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387726 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D4F3C4332B for ; Fri, 26 Feb 2021 20:08:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0279E64EED for ; Fri, 26 Feb 2021 20:08:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbhBZUIP (ORCPT ); Fri, 26 Feb 2021 15:08:15 -0500 Received: from relay01.th.seeweb.it ([5.144.164.162]:57417 "EHLO relay01.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229990AbhBZUHh (ORCPT ); Fri, 26 Feb 2021 15:07:37 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 436611FAF2; Fri, 26 Feb 2021 21:05:54 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/41] arm64: dts: qcom: sdm630: Add ADSP remoteproc configuration Date: Fri, 26 Feb 2021 21:03:48 +0100 Message-Id: <20210226200414.167762-19-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Configure the ADSP remote processor and add a simple sound{} node to make way for future development. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 83 ++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 08e499229396..f6abb2e79407 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -521,6 +522,9 @@ modem_smp2p_in: slave-kernel { }; }; + sound: sound { + }; + thermal-zones { aoss-thermal { polling-delay-passive = <250>; @@ -1885,6 +1889,85 @@ mmss_smmu: iommu@cd00000 { status = "disabled"; }; + adsp_pil: remoteproc@15700000 { + compatible = "qcom,sdm660-adsp-pil"; + reg = <0x15700000 0x4040>; + + interrupts-extended = + <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + + memory-region = <&adsp_region>; + power-domains = <&rpmpd SDM660_VDDCX>; + power-domain-names = "cx"; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + + label = "lpass"; + mboxes = <&apcs_glb 9>; + qcom,remote-pid = <2>; + #address-cells = <1>; + #size-cells = <0>; + + apr { + compatible = "qcom,apr-v2"; + qcom,glink-channels = "apr_audio_svc"; + qcom,apr-domain = ; + #address-cells = <1>; + #size-cells = <0>; + + q6core { + reg = ; + compatible = "qcom,q6core"; + }; + + q6afe: apr-service@4 { + compatible = "qcom,q6afe"; + reg = ; + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + }; + + q6asm: apr-service@7 { + compatible = "qcom,q6asm"; + reg = ; + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + iommus = <&lpass_smmu 1>; + }; + }; + + q6adm: apr-service@8 { + compatible = "qcom,q6adm"; + reg = ; + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; + }; + }; + gnoc: interconnect@17900000 { compatible = "qcom,sdm660-gnoc"; reg = <0x17900000 0xe000>; From patchwork Fri Feb 26 20:03:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46DB7C433E0 for ; Fri, 26 Feb 2021 20:18:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F41EB64F0E for ; Fri, 26 Feb 2021 20:18:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230022AbhBZUSR (ORCPT ); Fri, 26 Feb 2021 15:18:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231320AbhBZURC (ORCPT ); Fri, 26 Feb 2021 15:17:02 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 498A0C0611C3 for ; Fri, 26 Feb 2021 12:06:02 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 8D4CD1FABC; Fri, 26 Feb 2021 21:05:58 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/41] arm64: dts: qcom: sdm630: Raise tcsr_mutex_regs size Date: Fri, 26 Feb 2021 21:03:49 +0100 Message-Id: <20210226200414.167762-20-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enlarge the size to make sure all relevant registers can be reached. This will be required to support the modem. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index f6abb2e79407..d4dd8624cac5 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -857,7 +857,7 @@ tsens: thermal-sensor@10ae000 { tcsr_mutex_regs: syscon@1f40000 { compatible = "syscon"; - reg = <0x01f40000 0x20000>; + reg = <0x01f40000 0x40000>; }; tlmm: pinctrl@3100000 { From patchwork Fri Feb 26 20:03:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8F13C43381 for ; Fri, 26 Feb 2021 20:16:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B631464E6B for ; Fri, 26 Feb 2021 20:16:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231284AbhBZUQY (ORCPT ); Fri, 26 Feb 2021 15:16:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231282AbhBZUPY (ORCPT ); Fri, 26 Feb 2021 15:15:24 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C943CC0611BD for ; Fri, 26 Feb 2021 12:06:06 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 969751FAC6; Fri, 26 Feb 2021 21:06:03 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 20/41] arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration Date: Fri, 26 Feb 2021 21:03:50 +0100 Message-Id: <20210226200414.167762-21-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The SDM630 SoC features an Adreno 508.0 GPU with a minimum frequency of 160MHz and a maximum of (depending on the speed-bin) 775MHz. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 84 +++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index d4dd8624cac5..1da9b8aa5c0f 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, AngeloGioacchino Del Regno */ #include @@ -1137,6 +1138,87 @@ pinconf-sd-cd { }; }; + adreno_gpu: gpu@5000000 { + compatible = "qcom,adreno-508.0", "qcom,adreno"; + #stream-id-cells = <16>; + + reg = <0x05000000 0x40000>; + reg-names = "kgsl_3d0_reg_memory"; + + interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>, + <&gpucc GPUCC_RBBMTIMER_CLK>, + <&gcc GCC_BIMC_GFX_CLK>, + <&gcc GCC_GPU_BIMC_GFX_CLK>, + <&gpucc GPUCC_RBCPR_CLK>, + <&gpucc GPUCC_GFX3D_CLK>; + + clock-names = "iface", + "rbbmtimer", + "mem", + "mem_iface", + "rbcpr", + "core"; + + power-domains = <&rpmpd SDM660_VDDMX>; + iommus = <&kgsl_smmu 0>; + + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + + interconnects = <&gnoc 1 &bimc 5>; + interconnect-names = "gfx-mem"; + + operating-points-v2 = <&gpu_sdm630_opp_table>; + + gpu_sdm630_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-775000000 { + opp-hz = /bits/ 64 <775000000>; + opp-level = ; + opp-peak-kBps = <5412000>; + opp-supported-hw = <0xA2>; + }; + opp-647000000 { + opp-hz = /bits/ 64 <647000000>; + opp-level = ; + opp-peak-kBps = <4068000>; + opp-supported-hw = <0xFF>; + }; + opp-588000000 { + opp-hz = /bits/ 64 <588000000>; + opp-level = ; + opp-peak-kBps = <3072000>; + opp-supported-hw = <0xFF>; + }; + opp-465000000 { + opp-hz = /bits/ 64 <465000000>; + opp-level = ; + opp-peak-kBps = <2724000>; + opp-supported-hw = <0xFF>; + }; + opp-370000000 { + opp-hz = /bits/ 64 <370000000>; + opp-level = ; + opp-peak-kBps = <2188000>; + opp-supported-hw = <0xFF>; + }; + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + opp-level = ; + opp-peak-kBps = <1648000>; + opp-supported-hw = <0xFF>; + }; + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-level = ; + opp-peak-kBps = <1200000>; + opp-supported-hw = <0xFF>; + }; + }; + }; + kgsl_smmu: iommu@5040000 { compatible = "qcom,sdm630-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2"; From patchwork Fri Feb 26 20:03:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8ED1CC433E0 for ; Fri, 26 Feb 2021 20:18:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 47C9664F0E for ; Fri, 26 Feb 2021 20:18:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230282AbhBZUSe (ORCPT ); Fri, 26 Feb 2021 15:18:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230518AbhBZURQ (ORCPT ); Fri, 26 Feb 2021 15:17:16 -0500 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A9CCC061A27 for ; Fri, 26 Feb 2021 12:06:11 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 3EFD61FAD3; Fri, 26 Feb 2021 21:06:08 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 21/41] arm64: dts: qcom: pm660: Support SPMI regulators on PMIC sid 1 Date: Fri, 26 Feb 2021 21:03:51 +0100 Message-Id: <20210226200414.167762-22-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The PM660 PMIC has SPMI regulators on the PMIC SID 1: let's declare the second pmic subtree and add the spmi vregs compatible to probe them there. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm660.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom/pm660.dtsi index 2e6a6f6c3b66..c6c57fe626e3 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -47,4 +47,15 @@ pm660_gpios: gpios@c000 { #interrupt-cells = <2>; }; }; + + pmic@1 { + compatible = "qcom,pm660", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm660_spmi_regulators: pm660-regulators { + compatible = "qcom,pm660-regulators"; + }; + }; }; From patchwork Fri Feb 26 20:03:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2786C433DB for ; Fri, 26 Feb 2021 20:24:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F6D964F0E for ; Fri, 26 Feb 2021 20:24:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230095AbhBZUYR (ORCPT ); Fri, 26 Feb 2021 15:24:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231193AbhBZUVG (ORCPT ); Fri, 26 Feb 2021 15:21:06 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D036EC061A2A; Fri, 26 Feb 2021 12:06:16 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id DFC6D1FC51; Fri, 26 Feb 2021 21:06:12 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 22/41] arm64: dts: qcom: pm660l: Add WLED support Date: Fri, 26 Feb 2021 21:03:52 +0100 Message-Id: <20210226200414.167762-23-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This will enable backlight control on WLED-enabled devices. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm660l.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm660l.dtsi b/arch/arm64/boot/dts/qcom/pm660l.dtsi index edba6de02084..83cc92ba441d 100644 --- a/arch/arm64/boot/dts/qcom/pm660l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660l.dtsi @@ -31,6 +31,23 @@ pmic@3 { reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pm660l_wled: leds@d800 { + compatible = "qcom,pm660l-wled"; + reg = <0xd800 0xd900>; + interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ovp"; + label = "backlight"; + + qcom,switching-freq = <800>; + qcom,ovp-millivolt = <29600>; + qcom,current-boost-limit = <970>; + qcom,current-limit-microamp = <20000>; + qcom,num-strings = <2>; + qcom,enabled-strings = <0 1>; + + status = "disabled"; + }; }; }; From patchwork Fri Feb 26 20:03:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 292DEC433DB for ; Fri, 26 Feb 2021 20:24:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C85B064E6B for ; Fri, 26 Feb 2021 20:24:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbhBZUXx (ORCPT ); Fri, 26 Feb 2021 15:23:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229912AbhBZUUu (ORCPT ); Fri, 26 Feb 2021 15:20:50 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01F8BC061A2E; Fri, 26 Feb 2021 12:06:21 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id AD7B01FC51; Fri, 26 Feb 2021 21:06:18 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 23/41] arm64: dts: qcom: pm660l: Support SPMI regulators on PMIC sid 3 Date: Fri, 26 Feb 2021 21:03:53 +0100 Message-Id: <20210226200414.167762-24-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno The PM660L PMIC has SPMI regulators on the PMIC SID 3: let's add the compatible in order to probe them. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm660l.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm660l.dtsi b/arch/arm64/boot/dts/qcom/pm660l.dtsi index 83cc92ba441d..64a8e9b9afbe 100644 --- a/arch/arm64/boot/dts/qcom/pm660l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660l.dtsi @@ -48,6 +48,10 @@ pm660l_wled: leds@d800 { status = "disabled"; }; + + pm660l_spmi_regulators: pm660l-regulators { + compatible = "qcom,pm660l-regulators"; + }; }; }; From patchwork Fri Feb 26 20:03:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AC81C433DB for ; Fri, 26 Feb 2021 20:24:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3784664EFA for ; Fri, 26 Feb 2021 20:24:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230403AbhBZUYB (ORCPT ); Fri, 26 Feb 2021 15:24:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231286AbhBZUUv (ORCPT ); Fri, 26 Feb 2021 15:20:51 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3E6AC061A31 for ; Fri, 26 Feb 2021 12:06:26 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 62A451FC59; Fri, 26 Feb 2021 21:06:23 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 24/41] arm64: dts: qcom: pm660(l): Add VADC and temp alarm nodes Date: Fri, 26 Feb 2021 21:03:54 +0100 Message-Id: <20210226200414.167762-25-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC, temperature alarm and thermal zones for pm660(l) to allow for temperature and voltage readouts and prevent PMIC overheating. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm660.dtsi | 122 +++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pm660l.dtsi | 33 ++++++++ 2 files changed, 155 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom/pm660.dtsi index c6c57fe626e3..e847d7209afc 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -3,9 +3,35 @@ * Copyright (c) 2020, Konrad Dybcio */ +#include #include #include #include +#include + +/ { + thermal-zones { + pm660 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&pm660_temp>; + + trips { + pm660_alert0: pm660-alert0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + pm660_crit: pm660-crit { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; +}; &spmi_bus { @@ -37,6 +63,102 @@ pwrkey { }; + pm660_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm660_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pm660_adc: adc@3100 { + compatible = "qcom,spmi-adc-rev2"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + ref_gnd: ref_gnd@0 { + reg = ; + qcom,decimation = <1024>; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25: vref_1p25@1 { + reg = ; + qcom,decimation = <1024>; + qcom,pre-scaling = <1 1>; + }; + + die_temp: die_temp@6 { + reg = ; + qcom,decimation = <1024>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm: xo_therm@4c { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + msm_therm: msm_therm@4d { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + emmc_therm: emmc_therm@4e { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + pa_therm0: thermistor0@4f { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + pa_therm1: thermistor1@50 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + quiet_therm: quiet_therm@51 { + reg = ; + qcom,pre-scaling = <1 1>; + qcom,decimation = <1024>; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + vadc_vph_pwr: vph_pwr@83 { + reg = ; + qcom,decimation = <1024>; + qcom,pre-scaling = <1 3>; + }; + + vcoin: vcoin@83 { + reg = ; + qcom,decimation = <1024>; + qcom,pre-scaling = <1 3>; + }; + }; + pm660_gpios: gpios@c000 { compatible = "qcom,pm660-gpio"; reg = <0xc000>; diff --git a/arch/arm64/boot/dts/qcom/pm660l.dtsi b/arch/arm64/boot/dts/qcom/pm660l.dtsi index 64a8e9b9afbe..05086cbe573b 100644 --- a/arch/arm64/boot/dts/qcom/pm660l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660l.dtsi @@ -3,9 +3,35 @@ * Copyright (c) 2020, Konrad Dybcio */ +#include #include #include #include +#include + +/ { + thermal-zones { + pm660l { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&pm660l_temp>; + + trips { + pm660l_alert0: pm660l-alert0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + pm660l_crit: pm660l-crit { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; +}; &spmi_bus { @@ -15,6 +41,13 @@ pmic@2 { #address-cells = <1>; #size-cells = <0>; + pm660l_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pm660l_gpios: gpios@c000 { compatible = "qcom,pm660l-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Fri Feb 26 20:03:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5AB6C433E0 for ; Fri, 26 Feb 2021 20:10:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7A67A64DA3 for ; Fri, 26 Feb 2021 20:10:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230386AbhBZUKk (ORCPT ); Fri, 26 Feb 2021 15:10:40 -0500 Received: from relay04.th.seeweb.it ([5.144.164.165]:34653 "EHLO relay04.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230281AbhBZUKU (ORCPT ); Fri, 26 Feb 2021 15:10:20 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 37EBF1FC51; Fri, 26 Feb 2021 21:06:28 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 25/41] arm64: dts: qcom: sdm660: Make the DTS an overlay on top of 630 Date: Fri, 26 Feb 2021 21:03:55 +0100 Message-Id: <20210226200414.167762-26-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There is SO MUCH common code between these two SoCs that it makes no sense to keep what is essentially a duplicate of 630.dtsi. Instead, it's better to just change the things that differ. Signed-off-by: Konrad Dybcio --- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 2 - arch/arm64/boot/dts/qcom/sdm660.dtsi | 448 +++++------------- 2 files changed, 117 insertions(+), 333 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 76533e8b2092..3e677fb7cfea 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -37,8 +37,6 @@ ramoops@a0000000 { &blsp1_uart2 { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&uart_console_active>; }; &tlmm { diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index 4abbdd03d1e7..13467e2c708a 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -2,371 +2,157 @@ /* * Copyright (c) 2018, Craig Tatlor. * Copyright (c) 2020, Alexey Minnekhanov + * Copyright (c) 2020, AngeloGioacchino Del Regno + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Martin Botka */ -#include -#include +#include "sdm630.dtsi" -/ { - interrupt-parent = <&intc>; +&adreno_gpu { + compatible = "qcom,adreno-512.0", "qcom,adreno"; + operating-points-v2 = <&gpu_sdm660_opp_table>; - #address-cells = <2>; - #size-cells = <2>; + gpu_sdm660_opp_table: opp-table { + compatible = "operating-points-v2"; - chosen { }; + /* + * 775MHz is only available on the highest speed bin + * Though it cannot be used for now due to interconnect + * framework not supporting multiple frequencies + * at the same opp-level - clocks { - xo_board: xo_board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <19200000>; - clock-output-names = "xo_board"; + opp-750000000 { + opp-hz = /bits/ 64 <750000000>; + opp-level = ; + opp-peak-kBps = <5412000>; + opp-supported-hw = <0xCHECKME>; }; - sleep_clk: sleep_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32764>; - clock-output-names = "sleep_clk"; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; + * These OPPs are correct, but we are lacking support for the + * GPU regulator. Hence, disable them for now to prevent the + * platform from hanging on high graphics loads. - CPU0: cpu@100 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x100>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - compatible = "cache"; - cache-level = <2>; - }; - L1_I_100: l1-icache { - compatible = "cache"; - }; - L1_D_100: l1-dcache { - compatible = "cache"; - }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-level = ; + opp-peak-kBps = <5184000>; + opp-supported-hw = <0xFF>; }; - CPU1: cpu@101 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x101>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - next-level-cache = <&L2_1>; - L1_I_101: l1-icache { - compatible = "cache"; - }; - L1_D_101: l1-dcache { - compatible = "cache"; - }; + opp-647000000 { + opp-hz = /bits/ 64 <647000000>; + opp-level = ; + opp-peak-kBps = <4068000>; + opp-supported-hw = <0xFF>; }; - CPU2: cpu@102 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x102>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - next-level-cache = <&L2_1>; - L1_I_102: l1-icache { - compatible = "cache"; - }; - L1_D_102: l1-dcache { - compatible = "cache"; - }; + opp-588000000 { + opp-hz = /bits/ 64 <588000000>; + opp-level = ; + opp-peak-kBps = <3072000>; + opp-supported-hw = <0xFF>; }; - CPU3: cpu@103 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x103>; - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - next-level-cache = <&L2_1>; - L1_I_103: l1-icache { - compatible = "cache"; - }; - L1_D_103: l1-dcache { - compatible = "cache"; - }; + opp-465000000 { + opp-hz = /bits/ 64 <465000000>; + opp-level = ; + opp-peak-kBps = <2724000>; + opp-supported-hw = <0xFF>; }; - CPU4: cpu@0 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x0>; - enable-method = "psci"; - capacity-dmips-mhz = <640>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - compatible = "cache"; - cache-level = <2>; - }; - L1_I_0: l1-icache { - compatible = "cache"; - }; - L1_D_0: l1-dcache { - compatible = "cache"; - }; + opp-370000000 { + opp-hz = /bits/ 64 <370000000>; + opp-level = ; + opp-peak-kBps = <2188000>; + opp-supported-hw = <0xFF>; }; + */ - CPU5: cpu@1 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x1>; - enable-method = "psci"; - capacity-dmips-mhz = <640>; - next-level-cache = <&L2_0>; - L1_I_1: l1-icache { - compatible = "cache"; - }; - L1_D_1: l1-dcache { - compatible = "cache"; - }; + opp-266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-level = ; + opp-peak-kBps = <1648000>; + opp-supported-hw = <0xFF>; }; - CPU6: cpu@2 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x2>; - enable-method = "psci"; - capacity-dmips-mhz = <640>; - next-level-cache = <&L2_0>; - L1_I_2: l1-icache { - compatible = "cache"; - }; - L1_D_2: l1-dcache { - compatible = "cache"; - }; + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-level = ; + opp-peak-kBps = <1200000>; + opp-supported-hw = <0xFF>; }; - - CPU7: cpu@3 { - device_type = "cpu"; - compatible = "qcom,kryo260"; - reg = <0x0 0x3>; - enable-method = "psci"; - capacity-dmips-mhz = <640>; - next-level-cache = <&L2_0>; - L1_I_3: l1-icache { - compatible = "cache"; - }; - L1_D_3: l1-dcache { - compatible = "cache"; - }; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU4>; - }; - - core1 { - cpu = <&CPU5>; - }; - - core2 { - cpu = <&CPU6>; - }; - - core3 { - cpu = <&CPU7>; - }; - }; - - cluster1 { - core0 { - cpu = <&CPU0>; - }; - - core1 { - cpu = <&CPU1>; - }; - - core2 { - cpu = <&CPU2>; - }; - - core3 { - cpu = <&CPU3>; - }; - }; - }; - }; - - firmware { - scm { - compatible = "qcom,scm"; - }; - }; - - memory { - device_type = "memory"; - /* We expect the bootloader to fill in the reg */ - reg = <0 0 0 0>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; }; +}; - soc: soc { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - gcc: clock-controller@100000 { - compatible = "qcom,gcc-sdm660"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - reg = <0x00100000 0x94000>; - }; - - tlmm: pinctrl@3100000 { - compatible = "qcom,sdm660-pinctrl"; - reg = <0x03100000 0x400000>, - <0x03500000 0x400000>, - <0x03900000 0x400000>; - reg-names = "south", "center", "north"; - interrupts = ; - gpio-controller; - gpio-ranges = <&tlmm 0 0 114>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - uart_console_active: uart_console_active { - pinmux { - pins = "gpio4", "gpio5"; - function = "blsp_uart2"; - }; +&CPU0 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <1024>; + /delete-property/ operating-points-v2; +}; - pinconf { - pins = "gpio4", "gpio5"; - drive-strength = <2>; - bias-disable; - }; - }; - }; +&CPU1 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <1024>; + /delete-property/ operating-points-v2; +}; - spmi_bus: spmi@800f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x0800f000 0x1000>, - <0x08400000 0x1000000>, - <0x09400000 0x1000000>, - <0x0a400000 0x220000>, - <0x0800a000 0x3000>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupt-names = "periph_irq"; - interrupts = ; - qcom,ee = <0>; - qcom,channel = <0>; - #address-cells = <2>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <4>; - cell-index = <0>; - }; +&CPU2 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <1024>; + /delete-property/ operating-points-v2; +}; - blsp1_uart2: serial@c170000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x0c170000 0x1000>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; +&CPU3 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <1024>; + /delete-property/ operating-points-v2; +}; - timer@17920000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0x17920000 0x1000>; +&CPU4 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <640>; + /delete-property/ operating-points-v2; +}; - frame@17921000 { - frame-number = <0>; - interrupts = , - ; - reg = <0x17921000 0x1000>, - <0x17922000 0x1000>; - }; +&CPU5 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <640>; + /delete-property/ operating-points-v2; +}; - frame@17923000 { - frame-number = <1>; - interrupts = ; - reg = <0x17923000 0x1000>; - status = "disabled"; - }; +&CPU6 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <640>; + /delete-property/ operating-points-v2; +}; - frame@17924000 { - frame-number = <2>; - interrupts = ; - reg = <0x17924000 0x1000>; - status = "disabled"; - }; +&CPU7 { + compatible = "qcom,kryo260"; + capacity-dmips-mhz = <640>; + /delete-property/ operating-points-v2; +}; - frame@17925000 { - frame-number = <3>; - interrupts = ; - reg = <0x17925000 0x1000>; - status = "disabled"; - }; +&gcc { + compatible = "qcom,gcc-sdm660"; +}; - frame@17926000 { - frame-number = <4>; - interrupts = ; - reg = <0x17926000 0x1000>; - status = "disabled"; - }; +&gpucc { + compatible = "qcom,gpucc-sdm660"; +}; - frame@17927000 { - frame-number = <5>; - interrupts = ; - reg = <0x17927000 0x1000>; - status = "disabled"; - }; +&mmcc { + compatible = "qcom,mmcc-sdm660"; + /* + * 660 has one more dsi host/phy, which - when implemented + * and tested - should be added to the clocks property. + */ +}; - frame@17928000 { - frame-number = <6>; - interrupts = ; - reg = <0x17928000 0x1000>; - status = "disabled"; - }; - }; +&tlmm { + compatible = "qcom,sdm660-pinctrl"; +}; - intc: interrupt-controller@17a00000 { - compatible = "arm,gic-v3"; - reg = <0x17a00000 0x10000>, - <0x17b00000 0x100000>; - #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - interrupt-controller; - #redistributor-regions = <1>; - redistributor-stride = <0x0 0x20000>; - interrupts = ; - }; - }; +&tsens { + #qcom,sensors = <14>; }; From patchwork Fri Feb 26 20:03:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC989C433DB for ; Fri, 26 Feb 2021 20:24:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF90364EFA for ; Fri, 26 Feb 2021 20:24:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230409AbhBZUXs (ORCPT ); Fri, 26 Feb 2021 15:23:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231267AbhBZUUo (ORCPT ); Fri, 26 Feb 2021 15:20:44 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B170C061356 for ; Fri, 26 Feb 2021 12:06:35 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 7E70D1F87C; Fri, 26 Feb 2021 21:06:32 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 26/41] arm64: dts: qcom: Add device tree for SDM636 Date: Fri, 26 Feb 2021 21:03:56 +0100 Message-Id: <20210226200414.167762-27-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This SoC is almost identical to its older brother, SDM660, with a few minor exceptions like the different GPU. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm636.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdm636.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdm636.dtsi b/arch/arm64/boot/dts/qcom/sdm636.dtsi new file mode 100644 index 000000000000..ae15d81fa3f9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2020, AngeloGioacchino Del Regno + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Martin Botka + */ + +#include "sdm660.dtsi" + +/* + * According to the downstream DTS, + * 636 is basically a 660 except for + * different CPU frequencies, Adreno + * 509 instead of 512 and lack of + * turing IP. These differences will + * be addressed when the aforementioned + * peripherals will be enabled upstream. + */ + +&adreno_gpu { + compatible = "qcom,adreno-509.0", "qcom,adreno"; + /* Adreno 509 shares the frequency table with 512 */ +}; From patchwork Fri Feb 26 20:03:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC077C433E0 for ; Fri, 26 Feb 2021 20:24:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9719D64F0E for ; Fri, 26 Feb 2021 20:24:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230471AbhBZUYH (ORCPT ); Fri, 26 Feb 2021 15:24:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230393AbhBZUUz (ORCPT ); Fri, 26 Feb 2021 15:20:55 -0500 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2B57C0610CE for ; Fri, 26 Feb 2021 12:06:39 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1C3631FA69; Fri, 26 Feb 2021 21:06:37 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 27/41] arm64: dts: qcom: sdm630: Add IMEM node Date: Fri, 26 Feb 2021 21:03:57 +0100 Message-Id: <20210226200414.167762-28-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add IMEM node and PIL reloc info as its child. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 1da9b8aa5c0f..c74423474884 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1926,6 +1926,21 @@ blsp_i2c8: i2c@c1b8000 { status = "disabled"; }; + imem@146bf000 { + compatible = "simple-mfd"; + reg = <0x146bf000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0 0x146bf000 0x1000>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + mmss_smmu: iommu@cd00000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x0cd00000 0x40000>; From patchwork Fri Feb 26 20:03:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4CF8C433E0 for ; Fri, 26 Feb 2021 20:09:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AB81864F1B for ; Fri, 26 Feb 2021 20:09:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230178AbhBZUJb (ORCPT ); Fri, 26 Feb 2021 15:09:31 -0500 Received: from relay04.th.seeweb.it ([5.144.164.165]:55669 "EHLO relay04.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230348AbhBZUJO (ORCPT ); Fri, 26 Feb 2021 15:09:14 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 035C61F87C; Fri, 26 Feb 2021 21:06:40 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 28/41] arm64: dts: qcom: sdm630: Configure the camera subsystem Date: Fri, 26 Feb 2021 21:03:58 +0100 Message-Id: <20210226200414.167762-29-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Add nodes for camss, cci and its pinctrl in order to bring up camera functionality. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 215 +++++++++++++++++++++++++++ 1 file changed, 215 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index c74423474884..a5a06afc2c94 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1035,6 +1035,32 @@ i2c8_sleep: i2c8-sleep { bias-pull-up; }; + cci0_default: cci0_default { + pinmux { + pins = "gpio36","gpio37"; + function = "cci_i2c"; + }; + + pinconf { + pins = "gpio36","gpio37"; + bias-pull-up; + drive-strength = <2>; + }; + }; + + cci1_default: cci1_default { + pinmux { + pins = "gpio38","gpio39"; + function = "cci_i2c"; + }; + + pinconf { + pins = "gpio38","gpio39"; + bias-pull-up; + drive-strength = <2>; + }; + }; + sdc1_state_on: sdc1-on { pinconf-clk { pins = "sdc1_clk"; @@ -1941,6 +1967,195 @@ pil-reloc@94c { }; }; + camss: camss@ca00000 { + compatible = "qcom,sdm660-camss"; + reg = <0x0c824000 0x1000>, + <0x0ca00120 0x4>, + <0x0c825000 0x1000>, + <0x0ca00124 0x4>, + <0x0c826000 0x1000>, + <0x0ca00128 0x4>, + <0x0ca30000 0x100>, + <0x0ca30400 0x100>, + <0x0ca30800 0x100>, + <0x0ca30c00 0x100>, + <0x0ca31000 0x500>, + <0x0ca00020 0x10>, + <0x0ca10000 0x1000>, + <0x0ca14000 0x1000>; + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csiphy2", + "csiphy2_clk_mux", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "csi_clk_mux", + "vfe0", + "vfe1"; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csiphy0", + "csiphy1", + "csiphy2", + "csid0", + "csid1", + "csid2", + "csid3", + "ispif", + "vfe0", + "vfe1"; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc THROTTLE_CAMSS_AXI_CLK>, + <&mmcc CAMSS_ISPIF_AHB_CLK>, + <&mmcc CAMSS_CSI0PHYTIMER_CLK>, + <&mmcc CAMSS_CSI1PHYTIMER_CLK>, + <&mmcc CAMSS_CSI2PHYTIMER_CLK>, + <&mmcc CAMSS_CSI0_AHB_CLK>, + <&mmcc CAMSS_CSI0_CLK>, + <&mmcc CAMSS_CPHY_CSID0_CLK>, + <&mmcc CAMSS_CSI0PIX_CLK>, + <&mmcc CAMSS_CSI0RDI_CLK>, + <&mmcc CAMSS_CSI1_AHB_CLK>, + <&mmcc CAMSS_CSI1_CLK>, + <&mmcc CAMSS_CPHY_CSID1_CLK>, + <&mmcc CAMSS_CSI1PIX_CLK>, + <&mmcc CAMSS_CSI1RDI_CLK>, + <&mmcc CAMSS_CSI2_AHB_CLK>, + <&mmcc CAMSS_CSI2_CLK>, + <&mmcc CAMSS_CPHY_CSID2_CLK>, + <&mmcc CAMSS_CSI2PIX_CLK>, + <&mmcc CAMSS_CSI2RDI_CLK>, + <&mmcc CAMSS_CSI3_AHB_CLK>, + <&mmcc CAMSS_CSI3_CLK>, + <&mmcc CAMSS_CPHY_CSID3_CLK>, + <&mmcc CAMSS_CSI3PIX_CLK>, + <&mmcc CAMSS_CSI3RDI_CLK>, + <&mmcc CAMSS_AHB_CLK>, + <&mmcc CAMSS_VFE0_CLK>, + <&mmcc CAMSS_CSI_VFE0_CLK>, + <&mmcc CAMSS_VFE0_AHB_CLK>, + <&mmcc CAMSS_VFE0_STREAM_CLK>, + <&mmcc CAMSS_VFE1_CLK>, + <&mmcc CAMSS_CSI_VFE1_CLK>, + <&mmcc CAMSS_VFE1_AHB_CLK>, + <&mmcc CAMSS_VFE1_STREAM_CLK>, + <&mmcc CAMSS_VFE_VBIF_AHB_CLK>, + <&mmcc CAMSS_VFE_VBIF_AXI_CLK>, + <&mmcc CSIPHY_AHB2CRIF_CLK>, + <&mmcc CAMSS_CPHY_CSID0_CLK>, + <&mmcc CAMSS_CPHY_CSID1_CLK>, + <&mmcc CAMSS_CPHY_CSID2_CLK>, + <&mmcc CAMSS_CPHY_CSID3_CLK>; + clock-names = "top_ahb", + "throttle_axi", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csiphy2_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csi3_ahb", + "csi3", + "csi3_phy", + "csi3_pix", + "csi3_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe0_ahb", + "vfe0_stream", + "vfe1", + "csi_vfe1", + "vfe1_ahb", + "vfe1_stream", + "vfe_ahb", + "vfe_axi", + "csiphy_ahb2crif", + "cphy_csid0", + "cphy_csid1", + "cphy_csid2", + "cphy_csid3"; + interconnects = <&mnoc 5 &bimc 5>; + interconnect-names = "vfe-mem"; + iommus = <&mmss_smmu 0xc00>, + <&mmss_smmu 0xc01>, + <&mmss_smmu 0xc02>, + <&mmss_smmu 0xc03>; + power-domains = <&mmcc CAMSS_VFE0_GDSC>, + <&mmcc CAMSS_VFE1_GDSC>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci: cci@ca0c000 { + compatible = "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0ca0c000 0x1000>; + interrupts = ; + + assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>; + assigned-clock-rates = <80800000>, <37500000>; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default &cci1_default>; + power-domains = <&mmcc CAMSS_TOP_GDSC>; + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + mmss_smmu: iommu@cd00000 { compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x0cd00000 0x40000>; From patchwork Fri Feb 26 20:03:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E60A0C433E0 for ; Fri, 26 Feb 2021 20:24:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 922A664E6B for ; Fri, 26 Feb 2021 20:24:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231133AbhBZUY0 (ORCPT ); Fri, 26 Feb 2021 15:24:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230509AbhBZUVe (ORCPT ); Fri, 26 Feb 2021 15:21:34 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3020DC061BC3 for ; Fri, 26 Feb 2021 12:06:48 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id BC36C1F995; Fri, 26 Feb 2021 21:06:45 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 29/41] arm64: dts: qcom: sdm660: Add required nodes for DSI1 Date: Fri, 26 Feb 2021 21:03:59 +0100 Message-Id: <20210226200414.167762-30-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Configure the second DSI host/phy and account for them in the mmcc node. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 101 +++++++++++++++++++++++++-- 1 file changed, 97 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index 13467e2c708a..eccf6fde16b4 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -141,12 +141,105 @@ &gpucc { compatible = "qcom,gpucc-sdm660"; }; +&mdp { + ports { + port@1 { + reg = <1>; + mdp5_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; +}; + +&mdss { + dsi1: dsi@c996000 { + compatible = "qcom,mdss-dsi-ctrl"; + reg = <0x0c996000 0x400>; + reg-names = "dsi_ctrl"; + + /* DSI1 shares the OPP table with DSI0 */ + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmpd SDM660_VDDCX>; + + interrupt-parent = <&mdss>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + + assigned-clocks = <&mmcc BYTE1_CLK_SRC>, + <&mmcc PCLK1_CLK_SRC>; + assigned-clock-parents = <&dsi1_phy 0>, + <&dsi1_phy 1>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_BYTE1_CLK>, + <&mmcc MDSS_BYTE1_INTF_CLK>, + <&mmcc MNOC_AHB_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MISC_AHB_CLK>, + <&mmcc MDSS_PCLK1_CLK>, + <&mmcc MDSS_ESC1_CLK>; + clock-names = "mdp_core", + "byte", + "byte_intf", + "mnoc", + "iface", + "bus", + "core_mmss", + "pixel", + "core"; + + phys = <&dsi1_phy>; + phy-names = "dsi"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&mdp5_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + dsi1_out: endpoint { + }; + }; + }; + }; + + dsi1_phy: dsi-phy@c996400 { + compatible = "qcom,dsi-phy-14nm-660"; + reg = <0x0c996400 0x100>, + <0x0c996500 0x300>, + <0x0c996800 0x188>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", "ref"; + }; +}; + &mmcc { compatible = "qcom,mmcc-sdm660"; - /* - * 660 has one more dsi host/phy, which - when implemented - * and tested - should be added to the clocks property. - */ + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>, + <&gcc GCC_MMSS_GPLL0_CLK>, + <&gcc GCC_MMSS_GPLL0_DIV_CLK>, + <&dsi0_phy 1>, + <&dsi0_phy 0>, + <&dsi1_phy 1>, + <&dsi1_phy 0>, + <0>, + <0>; }; &tlmm { From patchwork Fri Feb 26 20:04:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CBC4C433DB for ; Fri, 26 Feb 2021 20:11:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 12DE464F0E for ; Fri, 26 Feb 2021 20:11:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230440AbhBZUL1 (ORCPT ); Fri, 26 Feb 2021 15:11:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230227AbhBZUK7 (ORCPT ); Fri, 26 Feb 2021 15:10:59 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8A59C06121D; Fri, 26 Feb 2021 12:06:52 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id C04681FED3; Fri, 26 Feb 2021 21:06:49 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 30/41] arm64: dts: qcom: sdm630-xperia-nile: Add all RPM and fixed regulators Date: Fri, 26 Feb 2021 21:04:00 +0100 Message-Id: <20210226200414.167762-31-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Add all of the RPM PM660/PM660L regulators and the fixed ones, defining the common electrical part of this platform. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio --- .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 395 +++++++++++++++++- 1 file changed, 394 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 9ba359c848d0..b7f3da0d72e7 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -1,6 +1,8 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, Konrad Dybcio + * Copyright (c) 2020, AngeloGioacchino Del Regno + * */ /dts-v1/; @@ -39,6 +41,55 @@ framebuffer0: framebuffer@9d400000 { }; }; + board_vbat: vbat-regulator { + compatible = "regulator-fixed"; + regulator-name = "VBAT"; + + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-always-on; + regulator-boot-on; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + + regulator-always-on; + regulator-boot-on; + }; + + cam_vdig_imx300_219_vreg: cam_vdig_imx300_219_vreg { + compatible = "regulator-fixed"; + regulator-name = "cam_vdig_imx300_219_vreg"; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 52 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_vdig_default>; + }; + + cam_vana_front_vreg: cam_vana_front_vreg { + compatible = "regulator-fixed"; + regulator-name = "cam_vana_front_vreg"; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&imx219_vana_default>; + }; + + cam_vana_rear_vreg: cam_vana_rear_vreg { + compatible = "regulator-fixed"; + regulator-name = "cam_vana_rear_vreg"; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; + regulator-always-on; + pinctrl-names = "default"; + pinctrl-0 = <&imx300_vana_default>; + }; + gpio_keys { status = "okay"; compatible = "gpio-keys"; @@ -134,3 +185,345 @@ i2c@c1b6000 { }; }; }; + +&rpm_requests { + pm660l-regulators { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + /* + * At least on Nile's configuration, S3B/S4B (VDD_CX) and + * S5B (VDD_MX) are managed only through RPM Power Domains. + * Trying to set a voltage on the main supply will create + * havoc and freeze the SoC. + * In any case, reference voltages for these regulators are: + * S3B/S4B: 0.870V + * S5B: 0.915V + */ + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <928000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l2b_2p95: l2 { + /* + * This regulator supports 1.648 - 3.104V on this board + * but we set a max voltage of anything less than 2.7V + * to satisfy a condition in sdhci.c that will disable + * 3.3V SDHCI signaling, which happens to be not really + * supported on the Xperia Nile/Ganges platform. + */ + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l3b_3p0: l3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <100000>; + regulator-allow-set-load; + }; + + vreg_l4b_29p5: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_29p5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l6b_3p3: l6 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <3312000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <3128000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* L9B (870mV) is currently unused */ + /* L10B (915mV) is currently unused */ + + vreg_bob: bob { + regulator-min-microvolt = <3304000>; + regulator-max-microvolt = <3624000>; + regulator-enable-ramp-delay = <500>; + regulator-ramp-delay = <0>; + }; + }; + + pm660-regulators { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <2040000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + regulator-ramp-delay = <0>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1226000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1008000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1008000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1368000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1804000>; + regulator-max-microvolt = <1896000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1784000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1904000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* L16A (2.70V) is unused */ + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l18a_1v8: l18 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <10>; + regulator-min-microamp = <200>; + regulator-max-microamp = <50000>; + regulator-system-load = <10000>; + regulator-allow-set-load; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + imx300_vana_default: imx300-vana-default { + pins = "gpio50"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + + imx219_vana_default: imx219-vana-default { + pins = "gpio51"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + + cam_vdig_default: cam-vdig-default { + pins = "gpio52"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; +}; From patchwork Fri Feb 26 20:04:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9144C43603 for ; Fri, 26 Feb 2021 20:09:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 86D2564ECE for ; Fri, 26 Feb 2021 20:09:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230444AbhBZUJI (ORCPT ); Fri, 26 Feb 2021 15:09:08 -0500 Received: from relay01.th.seeweb.it ([5.144.164.162]:47757 "EHLO relay01.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230312AbhBZUIw (ORCPT ); Fri, 26 Feb 2021 15:08:52 -0500 Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 3BE141F981; Fri, 26 Feb 2021 21:06:54 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 31/41] arm64: dts: qcom: sdm630-nile: Use &labels Date: Fri, 26 Feb 2021 21:04:01 +0100 Message-Id: <20210226200414.167762-32-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Refer to nodes by their labels to match the current convention. Signed-off-by: Konrad Dybcio --- .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 61 +++++++++++-------- 1 file changed, 35 insertions(+), 26 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index b7f3da0d72e7..34a38bff09b8 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -5,8 +5,6 @@ * */ -/dts-v1/; - #include "sdm630.dtsi" #include "pm660.dtsi" #include "pm660l.dtsi" @@ -150,40 +148,38 @@ removed_region@85800000 { no-map; }; }; +}; - soc { - sdhci@c0c4000 { - status = "okay"; +&blsp_i2c1 { + status = "okay"; - mmc-ddr-1_8v; - /* SoMC Nile platform's eMMC doesn't support HS200 mode */ - mmc-hs400-1_8v; - }; + /* Synaptics touchscreen */ +}; - i2c@c175000 { - status = "okay"; +&blsp_i2c2 { + status = "okay"; - /* Synaptics touchscreen */ - }; + /* SMB1351 charger */ +}; - i2c@c176000 { - status = "okay"; +/* I2C3, 4, 5, 7 and 8 are disabled on this board. */ - /* SMB1351 charger */ - }; +&blsp_i2c6 { + status = "okay"; - serial@c1af000 { - status = "okay"; - }; + /* NXP NFC */ +}; - /* I2C3, 4, 5, 7 and 8 are disabled on this board. */ +&blsp1_uart2 { + status = "okay"; - i2c@c1b6000 { - status = "okay"; + /* MSM serial console */ +}; - /* NXP NFC */ - }; - }; +&blsp2_uart1 { + status = "okay"; + + /* HCI Bluetooth */ }; &rpm_requests { @@ -503,6 +499,19 @@ vreg_l19a_3p3: l19 { }; }; +&sdhc_1 { + status = "okay"; + supports-cqe; + + /* SoMC Nile platform's eMMC doesn't support HS200 mode */ + mmc-ddr-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_29p5>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + &tlmm { gpio-reserved-ranges = <8 4>; From patchwork Fri Feb 26 20:04:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4C87C4332E for ; Fri, 26 Feb 2021 20:11:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D73664F2A for ; Fri, 26 Feb 2021 20:11:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230429AbhBZULC (ORCPT ); Fri, 26 Feb 2021 15:11:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230396AbhBZUKy (ORCPT ); Fri, 26 Feb 2021 15:10:54 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E586CC061D7C for ; Fri, 26 Feb 2021 12:07:01 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 461A81FAB6; Fri, 26 Feb 2021 21:06:58 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 32/41] arm64: dts: qcom: sdm630-nile: Add USB Date: Fri, 26 Feb 2021 21:04:02 +0100 Message-Id: <20210226200414.167762-33-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable and configure DWC3 and QUSB2 PHY to enable USB functionality on Nile and Ganges boards. Signed-off-by: Konrad Dybcio --- .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 34a38bff09b8..e17a0f0b1e06 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -148,6 +148,15 @@ removed_region@85800000 { no-map; }; }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; }; &blsp_i2c1 { @@ -182,6 +191,14 @@ &blsp2_uart1 { /* HCI Bluetooth */ }; +&qusb2phy { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l10a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + &rpm_requests { pm660l-regulators { compatible = "qcom,rpm-pm660l-regulators"; @@ -536,3 +553,12 @@ cam_vdig_default: cam-vdig-default { drive-strength = <2>; }; }; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +}; From patchwork Fri Feb 26 20:04:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9559C43332 for ; Fri, 26 Feb 2021 20:11:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BCEC64F41 for ; Fri, 26 Feb 2021 20:11:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230396AbhBZULJ (ORCPT ); Fri, 26 Feb 2021 15:11:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230403AbhBZUKy (ORCPT ); Fri, 26 Feb 2021 15:10:54 -0500 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1812EC061D7E; Fri, 26 Feb 2021 12:07:06 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 5A8211FEE0; Fri, 26 Feb 2021 21:07:03 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 33/41] arm64: dts: qcom: sdm630-nile: Add Volume up key Date: Fri, 26 Feb 2021 21:04:03 +0100 Message-Id: <20210226200414.167762-34-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Let's get loud! Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index e17a0f0b1e06..1a8e179cba73 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -191,6 +191,16 @@ &blsp2_uart1 { /* HCI Bluetooth */ }; +&pon { + volup { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; +}; + &qusb2phy { status = "okay"; From patchwork Fri Feb 26 20:04:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C679C4332B for ; Fri, 26 Feb 2021 20:11:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5313064E38 for ; Fri, 26 Feb 2021 20:11:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230452AbhBZULb (ORCPT ); Fri, 26 Feb 2021 15:11:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230416AbhBZUK7 (ORCPT ); Fri, 26 Feb 2021 15:10:59 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E947DC0698C0; Fri, 26 Feb 2021 12:07:09 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 7B8A11FABA; Fri, 26 Feb 2021 21:07:07 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 34/41] arm64: dts: qcom: sdm630-nile: Configure WCN3990 Bluetooth Date: Fri, 26 Feb 2021 21:04:04 +0100 Message-Id: <20210226200414.167762-35-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: AngeloGioacchino Del Regno Add a node for WCN3990 HCIUART Bluetooth. Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Konrad Dybcio Signed-off-by: Martin Botka --- .../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 1a8e179cba73..0da6dddd5768 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -188,7 +188,18 @@ &blsp1_uart2 { &blsp2_uart1 { status = "okay"; - /* HCI Bluetooth */ + bluetooth: wcn3990-bt { + compatible = "qcom,wcn3998-bt"; + + vddio-supply = <&vreg_l13a_1p8>; + vddxo-suppky = <&vreg_l9a_1p8>; + vddrf-supply = <&vreg_l6a_1p3>; + vddch0-supply = <&vreg_l19a_3p3>; + + max-speed = <3200000>; + + clocks = <&rpmcc RPM_SMD_RF_CLK1_PIN>; + }; }; &pon { From patchwork Fri Feb 26 20:04:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53BDFC433DB for ; Fri, 26 Feb 2021 20:12:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F205764F17 for ; Fri, 26 Feb 2021 20:12:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230505AbhBZUMU (ORCPT ); Fri, 26 Feb 2021 15:12:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230488AbhBZUL4 (ORCPT ); Fri, 26 Feb 2021 15:11:56 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D63D0C0698CF; Fri, 26 Feb 2021 12:09:55 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 7D4651FEE6; Fri, 26 Feb 2021 21:07:11 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 35/41] arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi Date: Fri, 26 Feb 2021 21:04:05 +0100 Message-Id: <20210226200414.167762-36-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org After further consideration, it is not worth to keep another separate DTSI, as the differences between Nile and Ganges are very minimal. Instead, let's just address the minimal differences between Kirin and Mermaid. Signed-off-by: Konrad Dybcio --- .../qcom/sdm630-sony-xperia-ganges-kirin.dts | 12 +++++- .../dts/qcom/sdm630-sony-xperia-ganges.dtsi | 40 ------------------- .../sdm630-sony-xperia-nile-discovery.dts | 1 + .../qcom/sdm630-sony-xperia-nile-pioneer.dts | 1 + .../qcom/sdm630-sony-xperia-nile-voyager.dts | 1 + .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 1 - .../sdm636-sony-xperia-ganges-mermaid.dts | 14 ++++--- 7 files changed, 23 insertions(+), 47 deletions(-) delete mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts index 46a7f2b26e6b..aea949265a2d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts @@ -5,9 +5,19 @@ /dts-v1/; -#include "sdm630-sony-xperia-ganges.dtsi" +#include "sdm630.dtsi" +#include "sdm630-sony-xperia-nile.dtsi" / { model = "Sony Xperia 10"; compatible = "sony,kirin-row", "qcom,sdm630"; + + chosen { + framebuffer@9d400000 { + reg = <0 0x9d400000 0 (2520 * 1080 * 4)>; + height = <2520>; + }; + }; }; + +/delete-node/ &vreg_l18a_1v8; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi deleted file mode 100644 index cf2e8b5d60e8..000000000000 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 2020, Martin Botka - */ - -/dts-v1/; - -/* Ganges is very similar to Nile, but - * there are some differences that will need - * to be addresed when more peripherals are - * enabled upstream. Hence the separate DTSI. - */ -#include "sdm630-sony-xperia-nile.dtsi" - -/ { - chosen { - framebuffer@9d400000 { - reg = <0 0x9d400000 0 (2520 * 1080 * 4)>; - height = <2520>; - }; - }; - - /* Yes, this is intentional. - * Ganges devices only use gpio-keys for - * Volume Down, but currently there's an - * issue with it that has to be resolved. - * Until then, let's not make the kernel panic - */ - /delete-node/ gpio-keys; - - soc { - - i2c@c175000 { - status = "okay"; - - /* Novatek touchscreen */ - }; - }; - -}; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts index 8fca0b69fa01..c574e430ba67 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "sdm630.dtsi" #include "sdm630-sony-xperia-nile.dtsi" / { diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts index 90dcd4ebaaed..a93ff3ab1b6d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "sdm630.dtsi" #include "sdm630-sony-xperia-nile.dtsi" / { diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts index fae5f1bb6834..59a679c205e0 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include "sdm630.dtsi" #include "sdm630-sony-xperia-nile.dtsi" / { diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 0da6dddd5768..deadd8f6ff3a 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -5,7 +5,6 @@ * */ -#include "sdm630.dtsi" #include "pm660.dtsi" #include "pm660l.dtsi" #include diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts index 7c0830e6a48c..bba1c2bce213 100644 --- a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts +++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts @@ -5,16 +5,20 @@ /dts-v1/; -/* Mermaid uses sdm636, but it's different ever so slightly - * that we can ignore it for the time being. Sony also commonizes - * the Ganges platform as a whole in downstream kernels. - */ -#include "sdm630-sony-xperia-ganges.dtsi" +#include "sdm630-sony-xperia-ganges-kirin.dts" +#include "sdm636.dtsi" / { model = "Sony Xperia 10 Plus"; compatible = "sony,mermaid-row", "qcom,sdm636"; + /* SDM636 v1 */ qcom,msm-id = <345 0>; qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00 0x1001b 0x102001a 0x00 0x00>; }; + +&sdc2_state_on { + pinconf-clk { + drive-strength = <14>; + }; +}; From patchwork Fri Feb 26 20:04:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 477DEC433E9 for ; Fri, 26 Feb 2021 20:11:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED80C64F17 for ; Fri, 26 Feb 2021 20:11:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbhBZULT (ORCPT ); Fri, 26 Feb 2021 15:11:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230430AbhBZULG (ORCPT ); Fri, 26 Feb 2021 15:11:06 -0500 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 842D1C0698C2; Fri, 26 Feb 2021 12:07:18 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 1F0FB1F578; Fri, 26 Feb 2021 21:07:16 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 36/41] arm64: dts: qcom: sdm630-nile: Add Synaptics touchscreen. Date: Fri, 26 Feb 2021 21:04:06 +0100 Message-Id: <20210226200414.167762-37-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Delete the node on Ganges devices, as they use a different one. Signed-off-by: Konrad Dybcio --- .../qcom/sdm630-sony-xperia-ganges-kirin.dts | 2 ++ .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 36 ++++++++++++++++++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts index aea949265a2d..a4e1fb8ca52d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts @@ -20,4 +20,6 @@ framebuffer@9d400000 { }; }; +/* Ganges devices feature a Novatek touchscreen instead. */ +/delete-node/ &touchscreen; /delete-node/ &vreg_l18a_1v8; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index deadd8f6ff3a..5f1202ae954b 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -161,7 +161,29 @@ extcon_usb: extcon-usb { &blsp_i2c1 { status = "okay"; - /* Synaptics touchscreen */ + touchscreen: synaptics-rmi4-i2c@70 { + compatible = "syna,rmi4-i2c"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&tlmm 45 0x2008>; + + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_active &ts_lcd_id_active>; + + syna,reset-delay-ms = <200>; + syna,startup-delay-ms = <220>; + + rmi4-f01@1 { + reg = <0x01>; + syna,nosleep-mode = <1>; + }; + + rmi4-f11@11 { + reg = <0x11>; + syna,sensor-type = <1>; + }; + }; }; &blsp_i2c2 { @@ -552,6 +574,18 @@ &sdhc_1 { &tlmm { gpio-reserved-ranges = <8 4>; + ts_int_active: ts-int-active { + pins = "gpio45"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_lcd_id_active: ts-lcd-id-active { + pins = "gpio56"; + drive-strength = <8>; + bias-disable; + }; + imx300_vana_default: imx300-vana-default { pins = "gpio50"; function = "gpio"; From patchwork Fri Feb 26 20:04:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58C3EC433E6 for ; Fri, 26 Feb 2021 20:11:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 16CE264F1B for ; Fri, 26 Feb 2021 20:11:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230464AbhBZULj (ORCPT ); Fri, 26 Feb 2021 15:11:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230282AbhBZULV (ORCPT ); Fri, 26 Feb 2021 15:11:21 -0500 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 773A8C0698C3; Fri, 26 Feb 2021 12:07:22 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 0754C1F5EA; Fri, 26 Feb 2021 21:07:19 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 37/41] arm64: dts: qcom: sdm630-nile: Specify ADSP firmware name Date: Fri, 26 Feb 2021 21:04:07 +0100 Message-Id: <20210226200414.167762-38-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 5f1202ae954b..433cfed574f1 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -158,6 +158,10 @@ extcon_usb: extcon-usb { }; }; +&adsp_pil { + firmware-name = "adsp.mdt"; +}; + &blsp_i2c1 { status = "okay"; From patchwork Fri Feb 26 20:04:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB519C433DB for ; Fri, 26 Feb 2021 20:13:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 798FF64E38 for ; Fri, 26 Feb 2021 20:13:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230001AbhBZUNb (ORCPT ); Fri, 26 Feb 2021 15:13:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230306AbhBZUM2 (ORCPT ); Fri, 26 Feb 2021 15:12:28 -0500 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [IPv6:2001:4b7a:2000:18::162]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D91ADC0698D3; Fri, 26 Feb 2021 12:10:22 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id F2BBB1F63C; Fri, 26 Feb 2021 21:07:23 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 38/41] arm64: dts: qcom: sdm630-nile: Enable uSD card slot Date: Fri, 26 Feb 2021 21:04:08 +0100 Message-Id: <20210226200414.167762-39-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 433cfed574f1..ff74a8b24150 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -575,6 +575,13 @@ &sdhc_1 { vqmmc-supply = <&vreg_l8a_1p8>; }; +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_29p5>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + &tlmm { gpio-reserved-ranges = <8 4>; From patchwork Fri Feb 26 20:04:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27011C433DB for ; Fri, 26 Feb 2021 20:13:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D75FD64E38 for ; Fri, 26 Feb 2021 20:13:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230434AbhBZUMf (ORCPT ); Fri, 26 Feb 2021 15:12:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230491AbhBZUMI (ORCPT ); Fri, 26 Feb 2021 15:12:08 -0500 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E719C0698CB for ; Fri, 26 Feb 2021 12:09:27 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 0C9791F630; Fri, 26 Feb 2021 21:07:27 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 39/41] arm64: dts: qcom: sdm630-nile: Remove gpio-keys autorepeat Date: Fri, 26 Feb 2021 21:04:09 +0100 Message-Id: <20210226200414.167762-40-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The autorepeat feature is not needed on gpio-keys. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index ff74a8b24150..3589e806647f 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -93,7 +93,6 @@ gpio_keys { input-name = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - autorepeat; camera_focus { label = "Camera Focus"; From patchwork Fri Feb 26 20:04:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 388196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E492C4332B for ; Fri, 26 Feb 2021 20:11:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B940364E38 for ; Fri, 26 Feb 2021 20:11:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230432AbhBZULm (ORCPT ); Fri, 26 Feb 2021 15:11:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40098 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230458AbhBZULc (ORCPT ); Fri, 26 Feb 2021 15:11:32 -0500 Received: from relay04.th.seeweb.it (relay04.th.seeweb.it [IPv6:2001:4b7a:2000:18::165]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 150E2C0698C7; Fri, 26 Feb 2021 12:07:36 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id C8E1E1F695; Fri, 26 Feb 2021 21:07:32 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 40/41] arm64: dts: qcom: sdm630: Add I2C functions to I2C pins Date: Fri, 26 Feb 2021 21:04:10 +0100 Message-Id: <20210226200414.167762-41-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This was overlooked earlier, fix it to ensure the busses can work properly. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index a5a06afc2c94..fccfc4e9f69d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -941,96 +941,112 @@ pinconf-rx-cts-rts { i2c1_default: i2c1-default { pins = "gpio2", "gpio3"; + function = "blsp_i2c1"; drive-strength = <2>; bias-disable; }; i2c1_sleep: i2c1-sleep { pins = "gpio2", "gpio3"; + function = "blsp_i2c1"; drive-strength = <2>; bias-pull-up; }; i2c2_default: i2c2-default { pins = "gpio6", "gpio7"; + function = "blsp_i2c2"; drive-strength = <2>; bias-disable; }; i2c2_sleep: i2c2-sleep { pins = "gpio6", "gpio7"; + function = "blsp_i2c2"; drive-strength = <2>; bias-pull-up; }; i2c3_default: i2c3-default { pins = "gpio10", "gpio11"; + function = "blsp_i2c3"; drive-strength = <2>; bias-disable; }; i2c3_sleep: i2c3-sleep { pins = "gpio10", "gpio11"; + function = "blsp_i2c3"; drive-strength = <2>; bias-pull-up; }; i2c4_default: i2c4-default { pins = "gpio14", "gpio15"; + function = "blsp_i2c4"; drive-strength = <2>; bias-disable; }; i2c4_sleep: i2c4-sleep { pins = "gpio14", "gpio15"; + function = "blsp_i2c4"; drive-strength = <2>; bias-pull-up; }; i2c5_default: i2c5-default { pins = "gpio18", "gpio19"; + function = "blsp_i2c5"; drive-strength = <2>; bias-disable; }; i2c5_sleep: i2c5-sleep { pins = "gpio18", "gpio19"; + function = "blsp_i2c5"; drive-strength = <2>; bias-pull-up; }; i2c6_default: i2c6-default { pins = "gpio22", "gpio23"; + function = "blsp_i2c6"; drive-strength = <2>; bias-disable; }; i2c6_sleep: i2c6-sleep { pins = "gpio22", "gpio23"; + function = "blsp_i2c6"; drive-strength = <2>; bias-pull-up; }; i2c7_default: i2c7-default { pins = "gpio26", "gpio27"; + function = "blsp_i2c7"; drive-strength = <2>; bias-disable; }; i2c7_sleep: i2c7-sleep { pins = "gpio26", "gpio27"; + function = "blsp_i2c7"; drive-strength = <2>; bias-pull-up; }; i2c8_default: i2c8-default { pins = "gpio30", "gpio31"; + function = "blsp_i2c8"; drive-strength = <2>; bias-disable; }; i2c8_sleep: i2c8-sleep { pins = "gpio30", "gpio31"; + function = "blsp_i2c8"; drive-strength = <2>; bias-pull-up; }; From patchwork Fri Feb 26 20:04:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 387719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD649C43332 for ; Fri, 26 Feb 2021 20:11:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6056B64E38 for ; Fri, 26 Feb 2021 20:11:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230475AbhBZULo (ORCPT ); Fri, 26 Feb 2021 15:11:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230459AbhBZULc (ORCPT ); Fri, 26 Feb 2021 15:11:32 -0500 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 592D8C06178C for ; Fri, 26 Feb 2021 12:07:42 -0800 (PST) Received: from localhost.localdomain (abab236.neoplus.adsl.tpnet.pl [83.6.165.236]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 6C11F1F69E; Fri, 26 Feb 2021 21:07:37 +0100 (CET) From: Konrad Dybcio To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Amit Kucheria , Zhang Rui , Daniel Lezcano , Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 41/41] arm64: dts: qcom: sdm630: Add DMA to I2C hosts Date: Fri, 26 Feb 2021 21:04:11 +0100 Message-Id: <20210226200414.167762-42-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org> References: <20210226200414.167762-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add DMA properties to I2C hosts to allow for DMA transfers. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index fccfc4e9f69d..0ec070fea034 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1805,6 +1805,8 @@ blsp_i2c1: i2c@c175000 { <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp1_dma 4>, <&blsp1_dma 5>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_default>; @@ -1823,6 +1825,8 @@ blsp_i2c2: i2c@c176000 { <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp1_dma 6>, <&blsp1_dma 7>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_default>; @@ -1841,6 +1845,8 @@ blsp_i2c3: i2c@c177000 { <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp1_dma 8>, <&blsp1_dma 9>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c3_default>; @@ -1859,6 +1865,8 @@ blsp_i2c4: i2c@c178000 { <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp1_dma 10>, <&blsp1_dma 11>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c4_default>; @@ -1905,6 +1913,8 @@ blsp_i2c5: i2c@c1b5000 { <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp2_dma 4>, <&blsp2_dma 5>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c5_default>; @@ -1923,6 +1933,8 @@ blsp_i2c6: i2c@c1b6000 { <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp2_dma 6>, <&blsp2_dma 7>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c6_default>; @@ -1941,6 +1953,8 @@ blsp_i2c7: i2c@c1b7000 { <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp2_dma 8>, <&blsp2_dma 9>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c7_default>; @@ -1959,6 +1973,8 @@ blsp_i2c8: i2c@c1b8000 { <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; clock-frequency = <400000>; + dmas = <&blsp2_dma 10>, <&blsp2_dma 11>; + dma-names = "tx", "rx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c8_default>;