From patchwork Thu Feb 25 19:35:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 387241 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp598442jap; Thu, 25 Feb 2021 11:44:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJzZ3kt7sgeoKBf49SV+73cT7Vn4ljREineuYDQqAwCdcaxIzEy8X5KzysYHNyvutjmIXNpe X-Received: by 2002:a17:906:4707:: with SMTP id y7mr4488184ejq.79.1614282292353; Thu, 25 Feb 2021 11:44:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614282292; cv=none; d=google.com; s=arc-20160816; b=z1G+fMyxxzMMbZnCX8rsf21OtyR0Raq34r7Dt0HXfiVRXckV8MTsWhCOAY3Tf5jYwf mpOjS+bkVv6suaPD/mzRSgzjTPi+nzU2mN9oSf4PYC3XjNvTjGhagI/ALVM4pl6gIY1S UXtNT6yeMeiU5YA2rloI3L/eXVI2TZZ8nFPTizZsYH+92SNDyQpMvobpbQawLTSDfDSG 4VUL6e2mqXPEWSiy2Kzi3Y1SFJ1sdW7RdoZlz7qsCoLFC4XYJr35RoevExZV7Ro4KqK6 An+EPfMPWJFygONUzMove9kfANyNiSzQ6KIWmeB9vkhwNBd1LBPXQbERhkhJsihUGsXn vrNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=tF9QjKxo0MErEgdc9ZS9nit0SGPkn37bX3aaVIJOG9o=; b=DKLAZcA8p951GWO1L0iQxoZcXkBjvMYqPHjsTuodnx+cu0wSyFiAD7LCcLvXph+mhp jLn0hm5ejjGYVChQoU80ChKNwlDnGDkkdU2JyBOxssvr1d5H7slLaXSmgO6xDgYfAqRu U+7BR6uydUrZKJIy4Fp1ZrdeBX35pMkrZ/rRF7aP6+MKbmPseCwjkFeEBbgh7MNHF5pd KJwHMxlBzUa/SlEHqg1kOLc+BaaiVyYRt7heSb8w6/6xw5vmNeYIDZVXPv1NX1bjVMf+ zLovmB9gMkHJymFE2Tgj+Jyf/prjBwOkE9ardzqA7shjtD2b8TBydE0EAj0MxKdnvrWh mpwg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j12si2170756edt.426.2021.02.25.11.44.52; Thu, 25 Feb 2021 11:44:52 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234592AbhBYToN (ORCPT + 6 others); Thu, 25 Feb 2021 14:44:13 -0500 Received: from foss.arm.com ([217.140.110.172]:48652 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234344AbhBYTmU (ORCPT ); Thu, 25 Feb 2021 14:42:20 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 435871480; Thu, 25 Feb 2021 11:36:20 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0750C3F70D; Thu, 25 Feb 2021 11:36:18 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Suzuki K Poulose , devicetree@vger.kernel.org, Rob Herring Subject: [PATCH v4 15/19] dts: bindings: Document device tree bindings for ETE Date: Thu, 25 Feb 2021 19:35:39 +0000 Message-Id: <20210225193543.2920532-16-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com> References: <20210225193543.2920532-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the device tree bindings for Embedded Trace Extensions. ETE can be connected to legacy coresight components and thus could optionally contain a connection graph as described by the CoreSight bindings. Cc: devicetree@vger.kernel.org Cc: Mathieu Poirier Cc: Mike Leach Cc: Rob Herring Signed-off-by: Suzuki K Poulose --- Changes: - Fix out-ports defintion --- .../devicetree/bindings/arm/ete.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/ete.yaml -- 2.24.1 diff --git a/Documentation/devicetree/bindings/arm/ete.yaml b/Documentation/devicetree/bindings/arm/ete.yaml new file mode 100644 index 000000000000..35a42d92bf97 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ete.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright 2021, Arm Ltd +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/ete.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ARM Embedded Trace Extensions + +maintainers: + - Suzuki K Poulose + - Mathieu Poirier + +description: | + Arm Embedded Trace Extension(ETE) is a per CPU trace component that + allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 + architecture and has extended support for future architecture changes. + The trace generated by the ETE could be stored via legacy CoreSight + components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer + Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to + legacy CoreSight components, a node must be listed per instance, along + with any optional connection graph as per the coresight bindings. + See bindings/arm/coresight.txt. + +properties: + $nodename: + pattern: "^ete([0-9a-f]+)$" + compatible: + items: + - const: arm,embedded-trace-extension + + cpu: + description: | + Handle to the cpu this ETE is bound to. + $ref: /schemas/types.yaml#/definitions/phandle + + out-ports: + description: | + Output connections from the ETE to legacy CoreSight trace bus. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - cpu + +additionalProperties: false + +examples: + +# An ETE node without legacy CoreSight connections + - | + ete0 { + compatible = "arm,embedded-trace-extension"; + cpu = <&cpu_0>; + }; +# An ETE node with legacy CoreSight connections + - | + ete1 { + compatible = "arm,embedded-trace-extension"; + cpu = <&cpu_1>; + + out-ports { /* legacy coresight connection */ + port { + ete1_out_port: endpoint { + remote-endpoint = <&funnel_in_port0>; + }; + }; + }; + }; + +... From patchwork Thu Feb 25 19:35:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 387240 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp598398jap; Thu, 25 Feb 2021 11:44:47 -0800 (PST) X-Google-Smtp-Source: ABdhPJxYquCp/kqfmC/uevmMTMVd4rXhSRS/eGgSSYebcNFLepAGDMlXZN1Ph9aX8GKN0TfzN7Oi X-Received: by 2002:a17:906:71d4:: with SMTP id i20mr4174848ejk.222.1614282286910; Thu, 25 Feb 2021 11:44:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614282286; cv=none; d=google.com; s=arc-20160816; b=oqWjZJZp/vr2UIq39KypDqrfU9esQwIS9+hY30xtpvQKsFu2KRNTtyoAfRYAeamsBD BQuk4/RoRPbwRkRAFNHu93sk4rv/dVhEGROyFljApsEJDkMtnWmgBkgZHsjjuYvG8OSN 2oAvaH6tnm5mTn60EaMIwmdosEnkCgIgOJSQ1WdyCwCTlbJtDRi2pRy5fs3RBahKWbzU r4EKBBqb7WDVY5LPNWbUxB5l+fcjnpbtEWrNml+C7nxnPbS9HDnOEKJFA8IZEXleMq+X 43dDqCKJQkGzsoDXakS65AmQSbGRAwFvVaxXhEqdziEiZf/vA8E0WH7rhTSledq6c10T ceNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=SzQtBdvcdzagz3x7H3+e0zmBGMDzTjkOPJuPf+hE1Us=; b=yM9L9vJUeNbmp43fXc536oxTmoYCTqKng/esBXkkxk218TB7G6O3P2raqsQlWWonTY gRCF6wf8gwO7an5nr0Url+id6AH2kwjQMkrk+blJsHmOYujAROIbcff9OpAjy8IXfSbU 7X3tiRkUC4nDIAenBiHCvIP7l7XKxfhQh9k4rkEs2c4/ytWmEAWzyCmarTo02LUvJeNG 0CgyHRXxGMSDERJxjXEktk4GOhNezi/jynerefwMBjktnoYxnhuwVinqe9CTZZCIKZ4W Ts4QW+pUyeeBp9mnlfG+8c03072uJHIrn7txE7Ohsh1hGGmnUbReJs0cBiSHVb/u6OgI t2rQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j12si2170756edt.426.2021.02.25.11.44.46; Thu, 25 Feb 2021 11:44:46 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234478AbhBYTno (ORCPT + 6 others); Thu, 25 Feb 2021 14:43:44 -0500 Received: from foss.arm.com ([217.140.110.172]:48416 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234913AbhBYTlz (ORCPT ); Thu, 25 Feb 2021 14:41:55 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 926B11515; Thu, 25 Feb 2021 11:36:25 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5C3B73F70D; Thu, 25 Feb 2021 11:36:24 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, leo.yan@linaro.org, Suzuki K Poulose , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 19/19] dts: bindings: Document device tree bindings for Arm TRBE Date: Thu, 25 Feb 2021 19:35:43 +0000 Message-Id: <20210225193543.2920532-20-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210225193543.2920532-1-suzuki.poulose@arm.com> References: <20210225193543.2920532-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the device tree bindings for Trace Buffer Extension (TRBE). Cc: Anshuman Khandual Cc: Mathieu Poirier Cc: Rob Herring Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Suzuki K Poulose --- .../devicetree/bindings/arm/trbe.yaml | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/trbe.yaml -- 2.24.1 diff --git a/Documentation/devicetree/bindings/arm/trbe.yaml b/Documentation/devicetree/bindings/arm/trbe.yaml new file mode 100644 index 000000000000..4402d7bfd1fc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/trbe.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright 2021, Arm Ltd +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/trbe.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ARM Trace Buffer Extensions + +maintainers: + - Anshuman Khandual + +description: | + Arm Trace Buffer Extension (TRBE) is a per CPU component + for storing trace generated on the CPU to memory. It is + accessed via CPU system registers. The software can verify + if it is permitted to use the component by checking the + TRBIDR register. + +properties: + $nodename: + const: "trbe" + compatible: + items: + - const: arm,trace-buffer-extension + + interrupts: + description: | + Exactly 1 PPI must be listed. For heterogeneous systems where + TRBE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + maxItems: 1 + +required: + - compatible + - interrupts + +additionalProperties: false + +examples: + + - | + #include + + trbe { + compatible = "arm,trace-buffer-extension"; + interrupts = ; + }; +...