From patchwork Tue Feb 23 18:19:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Codrin Ciubotariu X-Patchwork-Id: 386366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02D22C433E9 for ; Tue, 23 Feb 2021 18:21:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C4DED64EDB for ; Tue, 23 Feb 2021 18:21:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233894AbhBWSVe (ORCPT ); Tue, 23 Feb 2021 13:21:34 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:35696 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233148AbhBWSVY (ORCPT ); Tue, 23 Feb 2021 13:21:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1614104484; x=1645640484; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MEjpyHn2CDjnPfxkT2wEky1s6pdVTEwsRbTZKg0ovic=; b=iaa1riWKR0hcSRKVFUmn+BUo+gv6WrEedGqzDOdbFi6KPgvc0NTFx7uW PdJIo+Ho59ZmNSoQZH/KwXI+xd39KH11Zw2bmV9n2ieTaHa2dd+Yi+aPa 0YWD6QpsvKDHNeKEUl/QpzBrBl2suRu0eQ7VAs80BOsuc9Jhz02toN2Wv 8eHSJB1KqFumx450bpHeZZ4uXKAh1ckc0gyFaH7fcYFy2dj2CP092ldEJ ftjwMf1h4qxB+XSmLO7XfeHDUl8ng0+GMiJL1tPeR2EGxV9bfdcSihesS Pfm2beb6O285HS8ccj+RPo55GE6TIkJ0K2jeH8JQrF/nsLVJKuWwgVh3X A==; IronPort-SDR: rI5ETHQBkcWabJ2Bw7Ta9hW/E3dXsL1sV3yEBAiOVxZI0gvmhAz5cB4y1tdYEfMvApi+F58fVg mioJ1+7V7MDv/obCGqJ+LKvWxExfygRdwhXZmTmaHdtlr1j+2x84dU8FLFtZvjcyC38Ao9CpTX dTMcVYbWdfDCYBG+YHGpr2L8zpAyP+DZWg5EAXy2ulM8RcZcZhS8hycIgQPM+94VRcF01Ehmw9 vhLASOJXO0L6HnwYdKuqYbKSowvuyaPTkkzZYkQ59Yv7qJbPXYHF+gZ86MWVqNRmX5fFEC0S7e rU4= X-IronPort-AV: E=Sophos;i="5.81,200,1610434800"; d="scan'208";a="104869134" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Feb 2021 11:20:08 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 23 Feb 2021 11:20:08 -0700 Received: from rob-ult-m19940.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Tue, 23 Feb 2021 11:20:05 -0700 From: Codrin Ciubotariu To: , , , CC: , , , , , , , , "Codrin Ciubotariu" Subject: [PATCH 3/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 Date: Tue, 23 Feb 2021 20:19:25 +0200 Message-ID: <20210223181929.444640-4-codrin.ciubotariu@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> References: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Microchip's new SAMA7G5 includes an updated I2S-MCC compatible with the previous version found on SAM9X60. The new controller includes 8 (4 * 2) input and output data pins for up to 8 channels for I2S and Left-Justified formats. Signed-off-by: Codrin Ciubotariu --- sound/soc/atmel/Kconfig | 3 +++ sound/soc/atmel/mchp-i2s-mcc.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig index 9fe9471f4514..ec04e3386bc0 100644 --- a/sound/soc/atmel/Kconfig +++ b/sound/soc/atmel/Kconfig @@ -127,10 +127,13 @@ config SND_MCHP_SOC_I2S_MCC Say Y or M if you want to add support for I2S Multi-Channel ASoC driver on the following Microchip platforms: - sam9x60 + - sama7g5 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and supports a Time Division Multiplexed (TDM) interface with external multi-channel audio codecs. + Starting with sama7g5, I2S and Left-Justified multi-channel is + supported by using multiple data pins, output and input, without TDM. config SND_MCHP_SOC_SPDIFTX tristate "Microchip ASoC driver for boards using S/PDIF TX" diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c index 6d5ae18f8b38..0ee01383e307 100644 --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c @@ -873,6 +873,9 @@ static const struct of_device_id mchp_i2s_mcc_dt_ids[] = { { .compatible = "microchip,sam9x60-i2smcc", }, + { + .compatible = "microchip,sama7g5-i2smcc", + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mchp_i2s_mcc_dt_ids); From patchwork Tue Feb 23 18:19:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Codrin Ciubotariu X-Patchwork-Id: 386364 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 583C6C433DB for ; Tue, 23 Feb 2021 18:22:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2D23264E61 for ; Tue, 23 Feb 2021 18:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233919AbhBWSWF (ORCPT ); Tue, 23 Feb 2021 13:22:05 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:18302 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232920AbhBWSVz (ORCPT ); Tue, 23 Feb 2021 13:21:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1614104514; x=1645640514; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=84j7/78rR9j49AoWteswWe25XyPzYeNSKwnQ095gk3g=; b=P/3d6m5aACZ/7TiPZX6oOE1ezUKvZ6H2r9TAzMveZrge8wQhOfWDiGQw Yxc66hqxfMIQiCszM3G7pvJmQJ5jf+YzmX0ByEtJ3Jbr2AXE1QGrE76zz GsQNtEB7fr5iaaiEccreamzYpUpMX0gfUax7BjhDNwJs45rgVanGWycp8 NMXgCzfT3dXOFh9pU4QaJOPueZJqg14tUVmyRSMaz63o1060W9eD3RXbn 1mQr+K5mI8LFnC7RTeMP2SkTJVdyYm+hK3uTeICfIJpbzCumMy7R43b5g qV4adYnKl6RdRO5q9XwpT4fqrNh7HS+AH8e9ZY5+D4zq/MoXFYPOWL6d0 w==; IronPort-SDR: OMtCRUgrXv/RNqU6mV4ks+b8ag4aX4ymCli0/qKPvIsf6bX4q/eUGZrL3EFQS79iKq7k09h3ru B0U6onQLonRsePINzpsqeyZYpAsyXGgwI9cQ9ObeWZTRBUJ8JwOMsm6naaq7FrkjMpqSr8Ygib HHfw1/LCXMpL1WpIW/9ww2RGpDcDO6oRthFfe1o0XV94YwMZPRuTKq6R9w6sxZK1TmAYsLVD81 h71Lf1iLwPDVQd72ZhXg5kh5SLLCaFQQHznvHCuGREIyBaFTZ/DwO2oh5PRh0WT8etLBApyPj1 7TM= X-IronPort-AV: E=Sophos;i="5.81,200,1610434800"; d="scan'208";a="110827460" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Feb 2021 11:20:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 23 Feb 2021 11:20:15 -0700 Received: from rob-ult-m19940.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Tue, 23 Feb 2021 11:20:12 -0700 From: Codrin Ciubotariu To: , , , CC: , , , , , , , , "Codrin Ciubotariu" Subject: [PATCH 5/7] dt-bindings: mchp, i2s-mcc: Add property to specify pin pair for TDM Date: Tue, 23 Feb 2021 20:19:27 +0200 Message-ID: <20210223181929.444640-6-codrin.ciubotariu@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> References: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SAMA7G5's I2S-MCC has 4 pairs of DIN/DOUT pins. Since TDM only uses a single pair of pins for synchronous capture and playback, the controller needs to be told which of the pair is connected. This can be mentioned using the new "microchip,tdm-data-pair" property. The property is optional, needed only if TDM is used, and if it's missing DIN/DOUT 0 pins will be used by default. Signed-off-by: Codrin Ciubotariu --- .../devicetree/bindings/sound/mchp,i2s-mcc.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml index a8a73f3ed473..0481315cb5f2 100644 --- a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml +++ b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml @@ -57,6 +57,23 @@ properties: - const: tx - const: rx + microchip,tdm-data-pair: + description: + Represents the DIN/DOUT pair pins that are used to receive/send + TDM data. It is optional and it is only needed if the controller + uses the TDM mode. + $ref: /schemas/types.yaml#/definitions/uint8 + enum: [0, 1, 2, 3] + default: 0 + +if: + properties: + compatible: + const: microchip,sam9x60-i2smcc +then: + properties: + microchip,tdm-data-pair: false + required: - "#sound-dai-cells" - compatible From patchwork Tue Feb 23 18:19:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Codrin Ciubotariu X-Patchwork-Id: 386365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5565BC433E0 for ; Tue, 23 Feb 2021 18:21:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2795864E61 for ; Tue, 23 Feb 2021 18:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233142AbhBWSVk (ORCPT ); Tue, 23 Feb 2021 13:21:40 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:42503 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233919AbhBWSVi (ORCPT ); Tue, 23 Feb 2021 13:21:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1614104498; x=1645640498; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BgVXZuyme4bdE/ErwL5mQe5p5qim7XkbnJU07pOF+RU=; b=V6/5epRw/7f0EKG2nF3q7AI7znI4fZz0TLe/mrJOMsS0qvTP927EJw82 F9xi1eq0avvrpe1Rk/b/IfKmlYduazf2hhy8AbbseKiuMJ/WnpNY0Bd1d DH40z0Vj2NQzM8AaUwd+ivXysOQKkuc7RjWWgFQq2NgSFXNesmwifYEHC aF9GSsJNGKHKtFkkIEF5SDxNvbHVeapJHrcyKli6ZvV9IBpMviR+hbinh 9Z8u9lAdWHDUJc/XgSryfi6aXtX3ioKVJa9lRph/7Ur+Azgum4c6yziPc a6oZ5SySIHXrP13sSCXHZ16T5kc342Z6CDRPAv+fWBjzR55qFB6S0Bz2a A==; IronPort-SDR: N189BDjrhaPK/tbPXWj5427t5qSJbA1DXzINjVZHjy6UbF6340AQG+kQNUyjbmhJN5M2HBSMtd 9ooAE13bx00fAmivYCpPU7YB+aHJORCIWPseAufU6ah9G+vyBaRj6b3lwDTAz4YpQoj7XKx1SF LijII990F901uEvsUgESdQDRziEcR+K0ScWDp7iBlud5QY9O4iOJjJgjKN1rnz6FYXMyJv4fDv xP7wp7KPpdB6ww3gor+XSUrDDiPRbf4yaTDhGXpbwhlYohj5yTIi4naI3BS5K0jqgCE8ZLVebQ 64o= X-IronPort-AV: E=Sophos;i="5.81,200,1610434800"; d="scan'208";a="116310894" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Feb 2021 11:20:22 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Tue, 23 Feb 2021 11:20:18 -0700 Received: from rob-ult-m19940.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Tue, 23 Feb 2021 11:20:15 -0700 From: Codrin Ciubotariu To: , , , CC: , , , , , , , , "Codrin Ciubotariu" Subject: [PATCH 6/7] ASoC: mchp-i2s-mcc: Add support to select TDM pins Date: Tue, 23 Feb 2021 20:19:28 +0200 Message-ID: <20210223181929.444640-7-codrin.ciubotariu@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> References: <20210223181929.444640-1-codrin.ciubotariu@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SAMA7G5's I2S-MCC has 4 pairs of DIN/DOUT pins. Since TDM only uses a single pair of pins for synchronous capture and playback, the controller needs to be told which of the pair is connected. This can be mentioned using the "microchip,tdm-data-pair" property from DT. The property is optional, useful only if TDM is used. If it's missing, DIN/DOUT 0 pins will be used by default. Signed-off-by: Codrin Ciubotariu --- sound/soc/atmel/mchp-i2s-mcc.c | 52 +++++++++++++++++++++++++++++++--- 1 file changed, 48 insertions(+), 4 deletions(-) diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c index 52d3f43148dc..3d13efb11444 100644 --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c @@ -100,6 +100,8 @@ #define MCHP_I2SMCC_MRA_DATALENGTH_8_BITS_COMPACT (7 << 1) #define MCHP_I2SMCC_MRA_WIRECFG_MASK GENMASK(5, 4) +#define MCHP_I2SMCC_MRA_WIRECFG_TDM(pin) (((pin) << 4) & \ + MCHP_I2SMCC_MRA_WIRECFG_MASK) #define MCHP_I2SMCC_MRA_WIRECFG_I2S_1_TDM_0 (0 << 4) #define MCHP_I2SMCC_MRA_WIRECFG_I2S_2_TDM_1 (1 << 4) #define MCHP_I2SMCC_MRA_WIRECFG_I2S_4_TDM_2 (2 << 4) @@ -245,6 +247,7 @@ struct mchp_i2s_mcc_dev { unsigned int frame_length; int tdm_slots; int channels; + u8 tdm_data_pair; unsigned int gclk_use:1; unsigned int gclk_running:1; unsigned int tx_rdy:1; @@ -589,6 +592,8 @@ static int mchp_i2s_mcc_hw_params(struct snd_pcm_substream *substream, if (!frame_length) frame_length = 2 * params_physical_width(params); } else if (dev->fmt & SND_SOC_DAIFMT_DSP_A) { + mra |= MCHP_I2SMCC_MRA_WIRECFG_TDM(dev->tdm_data_pair); + if (dev->tdm_slots) { if (channels % 2 && channels * 2 <= dev->tdm_slots) { /* @@ -914,6 +919,45 @@ static const struct of_device_id mchp_i2s_mcc_dt_ids[] = { MODULE_DEVICE_TABLE(of, mchp_i2s_mcc_dt_ids); #endif +static int mchp_i2s_mcc_soc_data_parse(struct platform_device *pdev, + struct mchp_i2s_mcc_dev *dev) +{ + int err; + + if (!dev->soc) { + dev_err(&pdev->dev, "failed to get soc data\n"); + return -ENODEV; + } + + if (dev->soc->data_pin_pair_num == 1) + return 0; + + err = of_property_read_u8(pdev->dev.of_node, "microchip,tdm-data-pair", + &dev->tdm_data_pair); + if (err < 0 && err != -EINVAL) { + dev_err(&pdev->dev, + "bad property data for 'microchip,tdm-data-pair': %d", + err); + return err; + } + if (err == -EINVAL) { + dev_info(&pdev->dev, + "'microchip,tdm-data-pair' not found; assuming DIN/DOUT 0 for TDM\n"); + dev->tdm_data_pair = 0; + } else { + if (dev->tdm_data_pair > dev->soc->data_pin_pair_num - 1) { + dev_err(&pdev->dev, + "invalid value for 'microchip,tdm-data-pair': %d\n", + dev->tdm_data_pair); + return -EINVAL; + } + dev_dbg(&pdev->dev, "TMD format on DIN/DOUT %d pins\n", + dev->tdm_data_pair); + } + + return 0; +} + static int mchp_i2s_mcc_probe(struct platform_device *pdev) { struct mchp_i2s_mcc_dev *dev; @@ -966,10 +1010,10 @@ static int mchp_i2s_mcc_probe(struct platform_device *pdev) } dev->soc = of_device_get_match_data(&pdev->dev); - if (!dev->soc) { - dev_err(&pdev->dev, "failed to get soc data\n"); - return -ENODEV; - } + err = mchp_i2s_mcc_soc_data_parse(pdev, dev); + if (err < 0) + return err; + dev->dev = &pdev->dev; dev->regmap = regmap; platform_set_drvdata(pdev, dev);