From patchwork Sat Jan 21 09:05:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92126 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395160qgi; Sat, 21 Jan 2017 01:07:36 -0800 (PST) X-Received: by 10.223.153.15 with SMTP id x15mr15377356wrb.179.1484989656189; Sat, 21 Jan 2017 01:07:36 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 32si10994878wrd.123.2017.01.21.01.07.34; Sat, 21 Jan 2017 01:07:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4B3164B4D1; Sat, 21 Jan 2017 10:07:02 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OuVJi0_rJTig; Sat, 21 Jan 2017 10:07:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D61254B656; Sat, 21 Jan 2017 10:06:50 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2D7D44A997 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EN3NMkUOL7B8 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id B60144A078 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cvw001124; Sat, 21 Jan 2017 18:05:42 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cvw001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989542; bh=zQFA5RhZeL75G/UbuUOUt8wjkwO05jVIMrVzV5E8vQA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UtFU7gNCBzdQv5BBQzTyeBS5Z3eFU+8Rsf+j90K0eWVOlGmtDW5HD/xPLxj76AZyn E6C9I6r5gP3EBnJvwtguJtzXZAK3n0vnGomBzVlWoYTO3I8YNqQ/SG5zvlwQyB6faR rzmwevTL/6aCyP3qYTegMB3MY0rLuDv3b5GAjwNrMojtxsWHp3bmNA9YUQPTjizA6g 8QxeyEFaet4H4jgsDDPs+qbByAdNQHgMHRf0kKqi8JBJzEPO+8/ue17te7pcZ8M8Yw /IyQl1gJybknuSw3BE4a7YnegM6JEEj/2YEaQLtO8d//6eJyOAef98QwH6OW20R0nL 1iim0XofmeVOg== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:21 +0900 Message-Id: <1484989531-11985-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 01/11] ARM: uniphier: add missing static and const qualifier X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" These are file-internal and constant. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 93330b0..8233a52 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -87,7 +87,7 @@ struct uniphier_initdata { void (*misc_init)(void); }; -struct uniphier_initdata uniphier_initdata[] = { +static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) { .soc_id = SOC_UNIPHIER_SLD3, @@ -169,7 +169,7 @@ struct uniphier_initdata uniphier_initdata[] = { #endif }; -static struct uniphier_initdata *uniphier_get_initdata( +static const struct uniphier_initdata *uniphier_get_initdata( enum uniphier_soc_id soc_id) { int i; @@ -184,7 +184,7 @@ static struct uniphier_initdata *uniphier_get_initdata( int board_init(void) { - struct uniphier_initdata *initdata; + const struct uniphier_initdata *initdata; enum uniphier_soc_id soc_id; int ret; From patchwork Sat Jan 21 09:05:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92123 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp394946qgi; Sat, 21 Jan 2017 01:06:58 -0800 (PST) X-Received: by 10.28.139.74 with SMTP id n71mr6983501wmd.139.1484989618191; Sat, 21 Jan 2017 01:06:58 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id r129si6478244wmr.58.2017.01.21.01.06.57; Sat, 21 Jan 2017 01:06:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2B2514B0AC; Sat, 21 Jan 2017 10:06:43 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id l1q89d44wAhw; Sat, 21 Jan 2017 10:06:43 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1C2C74B1D0; Sat, 21 Jan 2017 10:06:32 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 965304A05E for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 67QLL8jDT7Dq for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id BFB8D4A99B for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cvx001124; Sat, 21 Jan 2017 18:05:42 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cvx001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989543; bh=R2mEd8n/aTGKHR1OX1cbYCl8r+Gd5pMx1v49hQw8S5I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QPTEZIMxW7T8mv0jWn+QkZaNSnT2HhSxYsYDmXL/HGa8U2oWfFtzKAlIkwiC10flp PbvVOXO6IdlrPWv8JG7IR70HKNvFcp+T7VWLX0QHUUlHA7jfIs4lGQDkq2G4npuZko 1jmoDJY82GlKDhg+CfOKFQZ7iWU5k1P2dEL/z6DuwgIkTD0QPELyDxWLKlaSe2aeLd D2pD1duohMzm1+DG6s0vrdSv7f2KpQN5puQfPXV4NTuUb927ogonTVXi5nmFBdjYQ6 +x50k2Spuhn4Euz+qnsShWwgn/iehC1hDXwYfhgLfxR2LRvWsDEwNfDDfVLk1q7Ub9 dCk9XV4UWBnVg== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:22 +0900 Message-Id: <1484989531-11985-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 02/11] ARM: uniphier: make SPL optional for ARVv8 SoCs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" We may want to run different firmware before running U-Boot. For example, ARM Trusted Firmware runs before U-Boot, making U-Boot a non-secure world boot loader. In this case, the SoC might be initialized there, which enables us to skip SPL entirely. This commit removes "select SPL" to make it configurable. This also enables the Multi SoC support for the UniPhier ARMv8 SoCs. (CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and Device Tree, the U-Boot proper part is now written in a generic way. The board/SoC parameters reside in DT. The Multi SoC support increases the memory footprint a bit, but the U-Boot proper does not have strict memory constraint. This will mitigate the per-SoC (sometimes per-board) defconfig burden. Signed-off-by: Masahiro Yamada --- arch/arm/Kconfig | 11 ++++---- arch/arm/mach-uniphier/Kconfig | 49 +++++++++++++++++++++++------------ arch/arm/mach-uniphier/arm64/Makefile | 5 +++- arch/arm/mach-uniphier/board_init.c | 5 ++-- configs/uniphier_ld11_defconfig | 3 ++- configs/uniphier_ld20_defconfig | 3 ++- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_pro4_defconfig | 1 + configs/uniphier_pxs2_ld6b_defconfig | 1 + configs/uniphier_sld3_defconfig | 1 + include/configs/uniphier.h | 6 +++-- 11 files changed, 56 insertions(+), 30 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 855871c..2554a2c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -894,12 +894,11 @@ config ARCH_UNIPHIER select OF_CONTROL select OF_LIBFDT select PINCTRL - select SPL - select SPL_DM - select SPL_LIBCOMMON_SUPPORT - select SPL_LIBGENERIC_SUPPORT - select SPL_OF_CONTROL - select SPL_PINCTRL + select SPL_DM if SPL + select SPL_LIBCOMMON_SUPPORT if SPL + select SPL_LIBGENERIC_SUPPORT if SPL + select SPL_OF_CONTROL if SPL + select SPL_PINCTRL if SPL select SUPPORT_SPL help Support for UniPhier SoC family developed by Socionext Inc. diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index aa3909a..e732ac1 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -13,66 +13,81 @@ config ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_64BIT bool select ARM64 - select SPL_SEPARATE_BSS - select ARMV8_MULTIENTRY - select ARMV8_SPIN_TABLE + select SPL_SEPARATE_BSS if SPL + select ARMV8_MULTIENTRY if SPL + select ARMV8_SPIN_TABLE if SPL choice prompt "UniPhier SoC select" default ARCH_UNIPHIER_PRO4 config ARCH_UNIPHIER_SLD3 - bool "UniPhier PH1-sLD3 SoC" + bool "UniPhier sLD3 SoC" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_LD4_SLD8 - bool "UniPhier PH1-LD4/PH1-sLD8 SoC" + bool "UniPhier LD4/sLD8 SoCs" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_PRO4 - bool "UniPhier PH1-Pro4 SoC" + bool "UniPhier Pro4 SoC" select ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_PRO5_PXS2_LD6B - bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC" + bool "UniPhier Pro5/PXs2/LD6b SoCs" select ARCH_UNIPHIER_32BIT -config ARCH_UNIPHIER_LD11 - bool "UniPhier PH1-LD11 SoC" +config ARCH_UNIPHIER_LD11_SINGLE + bool "UniPhier LD11 SoC" select ARCH_UNIPHIER_64BIT -config ARCH_UNIPHIER_LD20 - bool "UniPhier PH1-LD20 SoC" +config ARCH_UNIPHIER_LD20_SINGLE + bool "UniPhier LD20 SoC" + select ARCH_UNIPHIER_64BIT + +config ARCH_UNIPHIER_V8_MULTI + bool "UniPhier V8 SoCs" + depends on !SPL select ARCH_UNIPHIER_64BIT - select OF_BOARD_SETUP endchoice config ARCH_UNIPHIER_LD4 - bool "Enable UniPhier PH1-LD4 SoC support" + bool "Enable UniPhier LD4 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y config ARCH_UNIPHIER_SLD8 - bool "Enable UniPhier PH1-sLD8 SoC support" + bool "Enable UniPhier sLD8 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y config ARCH_UNIPHIER_PRO5 - bool "Enable UniPhier PH1-Pro5 SoC support" + bool "Enable UniPhier Pro5 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y config ARCH_UNIPHIER_PXS2 - bool "Enable UniPhier ProXstream2 SoC support" + bool "Enable UniPhier Pxs2 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y config ARCH_UNIPHIER_LD6B - bool "Enable UniPhier PH1-LD6b SoC support" + bool "Enable UniPhier LD6b SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y +config ARCH_UNIPHIER_LD11 + bool "Enable UniPhier LD11 SoC support" if ARCH_UNIPHIER_V8_MULTI + depends on ARCH_UNIPHIER_LD11_SINGLE || ARCH_UNIPHIER_V8_MULTI + default y + +config ARCH_UNIPHIER_LD20 + bool "Enable UniPhier LD20 SoC support" if ARCH_UNIPHIER_V8_MULTI + depends on ARCH_UNIPHIER_LD20_SINGLE || ARCH_UNIPHIER_V8_MULTI + select OF_BOARD_SETUP + default y + config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" depends on ARCH_UNIPHIER_32BIT diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile index 5ed030a..eb34c20 100644 --- a/arch/arm/mach-uniphier/arm64/Makefile +++ b/arch/arm/mach-uniphier/arm64/Makefile @@ -5,6 +5,9 @@ ifdef CONFIG_SPL_BUILD obj-y += timer.o else -obj-y += mem_map.o smp.o smp_kick_cpus.o +obj-y += mem_map.o +ifdef CONFIG_ARMV8_MULTIENTRY +obj-y += smp.o smp_kick_cpus.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += arm-cci500.o endif +endif diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 8233a52..2269291 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -73,8 +73,9 @@ static void uniphier_ld20_misc_init(void) writel(0x0000b500, 0x6184e024); writel(0x00000001, 0x6184e000); } - +#ifdef CONFIG_ARMV8_MULTIENTRY cci500_init(2); +#endif } #endif @@ -235,7 +236,7 @@ int board_init(void) led_puts("U6"); -#ifdef CONFIG_ARM64 +#ifdef CONFIG_ARMV8_MULTIENTRY uniphier_smp_kick_all_cpus(); #endif diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig index 9c77b10..deddac4 100644 --- a/configs/uniphier_ld11_defconfig +++ b/configs/uniphier_ld11_defconfig @@ -2,11 +2,12 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_ARCH_UNIPHIER_LD11=y +CONFIG_ARCH_UNIPHIER_LD11_SINGLE=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld11-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_XIMG is not set diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig index 190ebd5..272304f 100644 --- a/configs/uniphier_ld20_defconfig +++ b/configs/uniphier_ld20_defconfig @@ -2,11 +2,12 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_ARCH_UNIPHIER_LD20=y +CONFIG_ARCH_UNIPHIER_LD20_SINGLE=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_XIMG is not set diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 8391a0a..dad0a34 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -9,6 +9,7 @@ CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig index c8a7573..36f9743 100644 --- a/configs/uniphier_pro4_defconfig +++ b/configs/uniphier_pro4_defconfig @@ -8,6 +8,7 @@ CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-pro4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig index 560b11b..5e3b044 100644 --- a/configs/uniphier_pxs2_ld6b_defconfig +++ b/configs/uniphier_pxs2_ld6b_defconfig @@ -9,6 +9,7 @@ CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig index 7e30acc..29f43cd 100644 --- a/configs/uniphier_sld3_defconfig +++ b/configs/uniphier_sld3_defconfig @@ -9,6 +9,7 @@ CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-sld3-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 74f1373..bf4cfea 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -85,7 +85,7 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -#ifdef CONFIG_ARM64 +#ifdef CONFIG_ARMV8_MULTIENTRY #define CPU_RELEASE_ADDR 0x80000000 #define COUNTER_FREQUENCY 50000000 #define CONFIG_GICV3 @@ -95,7 +95,7 @@ #elif defined(CONFIG_ARCH_UNIPHIER_LD20) #define GICR_BASE 0x5fe80000 #endif -#else +#elif !defined(CONFIG_ARM64) /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 #endif @@ -276,6 +276,7 @@ /* subtract sizeof(struct image_header) */ #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) +#ifdef CONFIG_SPL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 #define CONFIG_SPL_MAX_SIZE 0x10000 @@ -285,5 +286,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x30016000 #endif #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 +#endif #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ From patchwork Sat Jan 21 09:05:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92122 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp394893qgi; Sat, 21 Jan 2017 01:06:46 -0800 (PST) X-Received: by 10.28.173.140 with SMTP id w134mr6080618wme.56.1484989606287; Sat, 21 Jan 2017 01:06:46 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id f1si6468946wmf.72.2017.01.21.01.06.46; Sat, 21 Jan 2017 01:06:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6D2424B5B4; Sat, 21 Jan 2017 10:06:36 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IIM8oBuW8If1; Sat, 21 Jan 2017 10:06:36 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BE5424ADB1; Sat, 21 Jan 2017 10:06:29 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 96C7E4A068 for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LWUsnNi2JGeb for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id C21364A9D6 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw0001124; Sat, 21 Jan 2017 18:05:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw0001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989543; bh=ANmzGogsTHTmU0c3UTsYm1xhlWmAHE8+Sg5VBCdf1C8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UVx2GxV27rQOyBOY8SMnbCQ3c4D3p1YDxnFeNHBCuaKi091HunpjMBGGqnpTAQuKg PehyGxQVuOxXqU7fv9QXI07SaMBB5XsB2wsfcWAOUmYFkqE3qPpgFjn/zSPuVG34fp FKp1xozlWuG1VGjCBWqlClfBlvn86HNXkfJBeqB7WO/+dXO7MHz1qg50R0PG3vq3DD wLAA7ORM8dB/UjMm21HRRO7AK8ZtyJ5ypmUn6rclEM6tJKUEuOFwy/WEgZr50ZgO77 Ftcy2YvgSXYQex3Lf1l2RRxuQxXhTYuGjfwak9wLcdFfRu4TRseLc4G8jqoY1a1shL y7OyC9AF9MJ1A== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:23 +0900 Message-Id: <1484989531-11985-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 03/11] ARM: uniphier: add uniphier_v8_defconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This defconfig does not support SPL. If you use this, the basic SoC initialization must be done in firmware that runs before U-Boot. (Generally, ARM Trusted Firmware is expected to do this job). Signed-off-by: Masahiro Yamada --- configs/uniphier_v8_defconfig | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 configs/uniphier_v8_defconfig -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig new file mode 100644 index 0000000..d02b84e --- /dev/null +++ b/configs/uniphier_v8_defconfig @@ -0,0 +1,34 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_UNIPHIER_V8_MULTI=y +CONFIG_MICRO_SUPPORT_CARD=y +CONFIG_SYS_TEXT_BASE=0x84000000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set +CONFIG_CMD_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_GPIO_UNIPHIER=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_MMC_UNIPHIER=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3_UNIPHIER=y +CONFIG_USB_STORAGE=y From patchwork Sat Jan 21 09:05:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92120 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp394773qgi; Sat, 21 Jan 2017 01:06:22 -0800 (PST) X-Received: by 10.28.26.203 with SMTP id a194mr7251302wma.84.1484989582540; Sat, 21 Jan 2017 01:06:22 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id c17si5100579wrb.34.2017.01.21.01.06.22; Sat, 21 Jan 2017 01:06:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 449C44A997; Sat, 21 Jan 2017 10:06:21 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2PB2HBuW587y; Sat, 21 Jan 2017 10:06:21 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DB26E4A068; Sat, 21 Jan 2017 10:06:20 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4436C4AAD2 for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Q5LbYTCvCqJy for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 702E94A068 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw1001124; Sat, 21 Jan 2017 18:05:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw1001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989544; bh=dxYVivWt6Lv8i/OrKvfgE+J/HE/wCWTHsQ2tFpFdq7Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Uh24maO5HbmmrUVa3g2s9j5tIQwTYPJuda1bq2OURJpOwKfvtVl/w8Hr+RmuGSBSF 4tNY42j3qP1CfJUQmpIzPeLO9jCgrdiJ1Wecckvn9tfShrmF/YvmHFE32s2hO4Fkmy F72ErAvVjvhoscRmythESVFmdYwsH9pYGuOSSDc1zY/BETvRqp5LVPJAJ01WxosIrc 8XwWHRW9G7PUlrl3TOrE6/ooKrdKYYZIFj64Z1hqbPD34sEoqRJG1nqdIMa1QtU0JV h89eDx9Sc1R74TgzLc0VPkWk667ECqQujulRdBvHS1ELNvUZlCpqYgADguArE33mLS mtS7y8fQH4LGA== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:24 +0900 Message-Id: <1484989531-11985-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 04/11] ARM: uniphier: replace with X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" These files only need error number macros. Actually, IS_ERR(), PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid unnecessary header includes. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 2 +- arch/arm/mach-uniphier/clk/dpll-ld4.c | 2 +- arch/arm/mach-uniphier/clk/dpll-pro4.c | 2 +- arch/arm/mach-uniphier/dram/ddrphy-ld4.c | 2 +- arch/arm/mach-uniphier/dram/ddrphy-training.c | 2 +- arch/arm/mach-uniphier/dram/umc-ld20.c | 3 ++- arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +- arch/arm/mach-uniphier/dram/umc-pro4.c | 2 +- arch/arm/mach-uniphier/dram/umc-pxs2.c | 2 +- arch/arm/mach-uniphier/dram/umc-sld8.c | 2 +- arch/arm/mach-uniphier/dram_init.c | 2 +- arch/arm/mach-uniphier/memconf.c | 2 +- arch/arm/mach-uniphier/pinctrl-glue.c | 2 +- 13 files changed, 14 insertions(+), 13 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 1d53140..ebe0578 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "../sbc/sbc-regs.h" #include "../soc-info.h" diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c index a40b30d..56361ff 100644 --- a/arch/arm/mach-uniphier/clk/dpll-ld4.c +++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c index 3ac48d6..d6b6262 100644 --- a/arch/arm/mach-uniphier/clk/dpll-pro4.c +++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c index 620668e..c20730d 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "ddrphy-init.h" diff --git a/arch/arm/mach-uniphier/dram/ddrphy-training.c b/arch/arm/mach-uniphier/dram/ddrphy-training.c index 005ca18..fa29a43 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-training.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-training.c @@ -6,7 +6,7 @@ */ #include -#include +#include #include #include "ddrphy-init.h" diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c index df6cc01..61f62ae 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20.c +++ b/arch/arm/mach-uniphier/dram/umc-ld20.c @@ -8,7 +8,8 @@ #include #include -#include +#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 90e7f2d..06aa054 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c index 5447fa9..740247a 100644 --- a/arch/arm/mach-uniphier/dram/umc-pro4.c +++ b/arch/arm/mach-uniphier/dram/umc-pro4.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-pxs2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c index b4da3d2..90465dd 100644 --- a/arch/arm/mach-uniphier/dram/umc-pxs2.c +++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c index 61369f1..a0c2871 100644 --- a/arch/arm/mach-uniphier/dram/umc-sld8.c +++ b/arch/arm/mach-uniphier/dram/umc-sld8.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 489366c..87418f4 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "init.h" #include "soc-info.h" diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c index 205ccf1..dcfc645 100644 --- a/arch/arm/mach-uniphier/memconf.c +++ b/arch/arm/mach-uniphier/memconf.c @@ -7,7 +7,7 @@ */ #include -#include +#include #include #include diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c index 48549e3..c52c6a6 100644 --- a/arch/arm/mach-uniphier/pinctrl-glue.c +++ b/arch/arm/mach-uniphier/pinctrl-glue.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #include #include #include From patchwork Sat Jan 21 09:05:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92125 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395103qgi; Sat, 21 Jan 2017 01:07:24 -0800 (PST) X-Received: by 10.28.142.16 with SMTP id q16mr6290081wmd.78.1484989644216; Sat, 21 Jan 2017 01:07:24 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 13si11000129wrw.52.2017.01.21.01.07.24; Sat, 21 Jan 2017 01:07:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 220104B6D0; Sat, 21 Jan 2017 10:06:55 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dqZQG3Af3FGF; Sat, 21 Jan 2017 10:06:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA8DD4B643; Sat, 21 Jan 2017 10:06:46 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 23A8C4A08A for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YXs79ZtqmeFU for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id B88AC4A07B for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw2001124; Sat, 21 Jan 2017 18:05:44 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw2001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989544; bh=u4Fh/uyKDwAL5DR/GOOJK5mThEO/mZytrJbWvoB1CZ8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G6o6Nnp/g0UC28uoWYVmb1/dZHg59nvSJWWfbyaTP4cNqnRjd7XuoM7hr/uiN+FnL wphqyvYiq8Hge5d7dC4PirB6spZXm8qkP9cx42edWPa7nM7T7zPlT0WgoRjVnB/gi8 6DpIPNueivtkZZ7gqxCYY+ypqmI/YKIA78WEcoDE20mMuk0HVVmSpBNGFNCXkkdbNp bEHiNGAgS2GsKptdCTW7u3J4nopbpTkaLZ6uKJT3Mp3PO5iORkwbGvcV4j37fOwniz kutLH3sdWgt9dCh9ZhMqQacuLT3+aXEATpsfAZ1IV+TxAFhU3Z6GNGv8V8DuO6rQcB ij0DCFljXZxig== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:25 +0900 Message-Id: <1484989531-11985-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 05/11] ARM: uniphier: replace with where possible X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The includes too many headers. Actually, these files needed to include it for udelay() declaration. Now we can replace it with thanks to commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/clk/dpll-sld8.c | 2 +- arch/arm/mach-uniphier/clk/pll-base-ld20.c | 3 ++- arch/arm/mach-uniphier/clk/pll-ld4.c | 2 +- arch/arm/mach-uniphier/clk/pll-pro4.c | 2 +- 4 files changed, 5 insertions(+), 4 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/clk/dpll-sld8.c b/arch/arm/mach-uniphier/clk/dpll-sld8.c index 7faa5e8..4a0010b 100644 --- a/arch/arm/mach-uniphier/clk/dpll-sld8.c +++ b/arch/arm/mach-uniphier/clk/dpll-sld8.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index caa631d..c66f083 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -5,8 +5,9 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include #include +#include +#include #include #include diff --git a/arch/arm/mach-uniphier/clk/pll-ld4.c b/arch/arm/mach-uniphier/clk/pll-ld4.c index 13257e4..55ac0ae 100644 --- a/arch/arm/mach-uniphier/clk/pll-ld4.c +++ b/arch/arm/mach-uniphier/clk/pll-ld4.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #include #include "../init.h" diff --git a/arch/arm/mach-uniphier/clk/pll-pro4.c b/arch/arm/mach-uniphier/clk/pll-pro4.c index cdd1fd4..e4d1f72 100644 --- a/arch/arm/mach-uniphier/clk/pll-pro4.c +++ b/arch/arm/mach-uniphier/clk/pll-pro4.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #include #include "../init.h" From patchwork Sat Jan 21 09:05:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92121 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp394833qgi; Sat, 21 Jan 2017 01:06:34 -0800 (PST) X-Received: by 10.28.11.135 with SMTP id 129mr6252582wml.111.1484989594417; Sat, 21 Jan 2017 01:06:34 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id e142si6457189wme.123.2017.01.21.01.06.34; Sat, 21 Jan 2017 01:06:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A83C84AACE; Sat, 21 Jan 2017 10:06:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uCWCu8UeRw6w; Sat, 21 Jan 2017 10:06:27 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 06E134ACF9; Sat, 21 Jan 2017 10:06:27 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4A9D34AB34 for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AvE2iw2CX9Z5 for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 6DA1C4A05E for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw3001124; Sat, 21 Jan 2017 18:05:44 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw3001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989544; bh=DBhVaGk+fuW9pGg21uP1a3S217T/I+2gR3JSJJOsi8U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SFgfh6pLgJCyQR6FkGUQIBqE3Seh073A+P/Xkc/TFW2d1pTzzzLANZp7FNEpg8cgF /utbL8tS8gEmi/TNEp5YdJEiQrXOEHL6eEK/BHiBQxLFp8Ax8wxxr6Bc3HB2foCzZW c3b5ggu+9rh+zMA5Cecacurj5K22tIEFsvL6tI1nNsakG2t7zPLXwThJno9lsy5nzA /Ym4wJYbCDailhKN5ZF0dAKP30FDkkf8C6Iulp4eKmLIee9yomUDITtYuNxOYkwDVv grvqRSlshlP6fWo7m8AkCSeDvHTV4Skh0eRPOWxouovMzdCigAy2sQohbqcL4bplVL r/jKndsnjENHg== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:26 +0900 Message-Id: <1484989531-11985-7-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 06/11] ARM: uniphier: simplify SoC ID get function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Currently, uniphier_get_soc_type() converts the SoC ID (this is read from the revision register) to an enum symbol to use it for SoC identification. Come to think of it, there is no need for the conversion in the first place. Using the SoC ID from the register as-is a straightforward way. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 4 +- arch/arm/mach-uniphier/arm32/psci.c | 12 ++-- arch/arm/mach-uniphier/board_init.c | 26 +++---- arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c | 6 +- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 30 ++++---- arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c | 20 +++--- arch/arm/mach-uniphier/boot-mode/spl_board.c | 6 +- arch/arm/mach-uniphier/cpu-info.c | 73 +++++++++++++++++++ arch/arm/mach-uniphier/cpu_info.c | 73 ------------------- arch/arm/mach-uniphier/debug-uart/debug-uart.c | 20 +++--- arch/arm/mach-uniphier/dram/cmd_ddrphy.c | 10 +-- arch/arm/mach-uniphier/dram_init.c | 2 +- arch/arm/mach-uniphier/sg-regs.h | 6 -- arch/arm/mach-uniphier/soc-info.c | 34 +++++++++ arch/arm/mach-uniphier/soc-info.h | 88 +++++------------------ arch/arm/mach-uniphier/soc_info.c | 84 ---------------------- arch/arm/mach-uniphier/spl_board_init.c | 26 +++---- 17 files changed, 206 insertions(+), 314 deletions(-) create mode 100644 arch/arm/mach-uniphier/cpu-info.c delete mode 100644 arch/arm/mach-uniphier/cpu_info.c create mode 100644 arch/arm/mach-uniphier/soc-info.c delete mode 100644 arch/arm/mach-uniphier/soc_info.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index ab2c6dc..abfdccc 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -10,7 +10,7 @@ obj-y += bcu/ else -obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-y += dram_init.o obj-y += board_init.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o @@ -22,7 +22,7 @@ obj-y += pinctrl-glue.o endif obj-y += boards.o -obj-y += soc_info.o +obj-y += soc-info.o obj-y += boot-mode/ obj-y += clk/ obj-y += dram/ diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c index e668265..65a468d 100644 --- a/arch/arm/mach-uniphier/arm32/psci.c +++ b/arch/arm/mach-uniphier/arm32/psci.c @@ -28,13 +28,13 @@ u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS]; static int uniphier_get_nr_cpus(void) { - switch (uniphier_get_soc_type()) { - case SOC_UNIPHIER_SLD3: - case SOC_UNIPHIER_PRO4: - case SOC_UNIPHIER_PRO5: + switch (uniphier_get_soc_id()) { + case UNIPHIER_SLD3_ID: + case UNIPHIER_PRO4_ID: + case UNIPHIER_PRO5_ID: return 2; - case SOC_UNIPHIER_PXS2: - case SOC_UNIPHIER_LD6B: + case UNIPHIER_PXS2_ID: + case UNIPHIER_LD6B_ID: return 4; default: return 1; diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 2269291..413b338 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -80,7 +80,7 @@ static void uniphier_ld20_misc_init(void) #endif struct uniphier_initdata { - enum uniphier_soc_id soc_id; + unsigned int soc_id; bool nand_2cs; void (*sbc_init)(void); void (*pll_init)(void); @@ -91,7 +91,7 @@ struct uniphier_initdata { static const struct uniphier_initdata uniphier_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) { - .soc_id = SOC_UNIPHIER_SLD3, + .soc_id = UNIPHIER_SLD3_ID, .nand_2cs = true, .sbc_init = uniphier_sbc_init_admulti, .pll_init = uniphier_sld3_pll_init, @@ -100,7 +100,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { - .soc_id = SOC_UNIPHIER_LD4, + .soc_id = UNIPHIER_LD4_ID, .nand_2cs = true, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init, @@ -109,7 +109,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) { - .soc_id = SOC_UNIPHIER_PRO4, + .soc_id = UNIPHIER_PRO4_ID, .nand_2cs = false, .sbc_init = uniphier_sbc_init_savepin, .pll_init = uniphier_pro4_pll_init, @@ -118,7 +118,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) { - .soc_id = SOC_UNIPHIER_SLD8, + .soc_id = UNIPHIER_SLD8_ID, .nand_2cs = true, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init, @@ -127,7 +127,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) { - .soc_id = SOC_UNIPHIER_PRO5, + .soc_id = UNIPHIER_PRO5_ID, .nand_2cs = true, .sbc_init = uniphier_sbc_init_savepin, .clk_init = uniphier_pro5_clk_init, @@ -135,7 +135,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) { - .soc_id = SOC_UNIPHIER_PXS2, + .soc_id = UNIPHIER_PXS2_ID, .nand_2cs = true, .sbc_init = uniphier_pxs2_sbc_init, .clk_init = uniphier_pxs2_clk_init, @@ -143,7 +143,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) { - .soc_id = SOC_UNIPHIER_LD6B, + .soc_id = UNIPHIER_LD6B_ID, .nand_2cs = true, .sbc_init = uniphier_pxs2_sbc_init, .clk_init = uniphier_pxs2_clk_init, @@ -151,7 +151,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) { - .soc_id = SOC_UNIPHIER_LD11, + .soc_id = UNIPHIER_LD11_ID, .nand_2cs = false, .sbc_init = uniphier_ld11_sbc_init, .pll_init = uniphier_ld11_pll_init, @@ -161,7 +161,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) { - .soc_id = SOC_UNIPHIER_LD20, + .soc_id = UNIPHIER_LD20_ID, .nand_2cs = false, .sbc_init = uniphier_ld11_sbc_init, .pll_init = uniphier_ld20_pll_init, @@ -171,7 +171,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { }; static const struct uniphier_initdata *uniphier_get_initdata( - enum uniphier_soc_id soc_id) + unsigned int soc_id) { int i; @@ -186,12 +186,12 @@ static const struct uniphier_initdata *uniphier_get_initdata( int board_init(void) { const struct uniphier_initdata *initdata; - enum uniphier_soc_id soc_id; + unsigned int soc_id; int ret; led_puts("U0"); - soc_id = uniphier_get_soc_type(); + soc_id = uniphier_get_soc_id(); initdata = uniphier_get_initdata(soc_id); if (!initdata) { pr_err("unsupported board\n"); diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c index 24255a0..9de7ab4 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c @@ -57,14 +57,14 @@ u32 uniphier_ld20_boot_device(void) int boot_mode; u32 usb_boot_mask; - switch (uniphier_get_soc_type()) { + switch (uniphier_get_soc_id()) { #if defined(CONFIG_ARCH_UNIPHIER_LD11) - case SOC_UNIPHIER_LD11: + case UNIPHIER_LD11_ID: usb_boot_mask = 0x00000080; break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD20_ID: usb_boot_mask = 0x00000780; break; #endif diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index ebe0578..a552770 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -18,30 +18,30 @@ u32 spl_boot_device_raw(void) if (boot_is_swapped()) return BOOT_DEVICE_NOR; - switch (uniphier_get_soc_type()) { + switch (uniphier_get_soc_id()) { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case SOC_UNIPHIER_SLD3: + case UNIPHIER_SLD3_ID: return uniphier_sld3_boot_device(); #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ defined(CONFIG_ARCH_UNIPHIER_SLD8) - case SOC_UNIPHIER_LD4: - case SOC_UNIPHIER_PRO4: - case SOC_UNIPHIER_SLD8: + case UNIPHIER_LD4_ID: + case UNIPHIER_PRO4_ID: + case UNIPHIER_SLD8_ID: return uniphier_ld4_boot_device(); #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) - case SOC_UNIPHIER_PRO5: + case UNIPHIER_PRO5_ID: return uniphier_pro5_boot_device(); #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case SOC_UNIPHIER_PXS2: - case SOC_UNIPHIER_LD6B: + case UNIPHIER_PXS2_ID: + case UNIPHIER_LD6B_ID: return uniphier_pxs2_boot_device(); #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case SOC_UNIPHIER_LD11: - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD11_ID: + case UNIPHIER_LD20_ID: return uniphier_ld20_boot_device(); #endif default: @@ -55,17 +55,17 @@ u32 spl_boot_device(void) mode = spl_boot_device_raw(); - switch (uniphier_get_soc_type()) { + switch (uniphier_get_soc_id()) { #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case SOC_UNIPHIER_PXS2: - case SOC_UNIPHIER_LD6B: + case UNIPHIER_PXS2_ID: + case UNIPHIER_LD6B_ID: if (mode == BOOT_DEVICE_USB) mode = BOOT_DEVICE_NOR; break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case SOC_UNIPHIER_LD11: - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD11_ID: + case UNIPHIER_LD20_ID: if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB) mode = BOOT_DEVICE_BOARD; break; diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c index a8ee382..670d4f6 100644 --- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c @@ -14,34 +14,34 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); - switch (uniphier_get_soc_type()) { + switch (uniphier_get_soc_id()) { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case SOC_UNIPHIER_SLD3: + case UNIPHIER_SLD3_ID: uniphier_sld3_boot_mode_show(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ defined(CONFIG_ARCH_UNIPHIER_SLD8) - case SOC_UNIPHIER_LD4: - case SOC_UNIPHIER_PRO4: - case SOC_UNIPHIER_SLD8: + case UNIPHIER_LD4_ID: + case UNIPHIER_PRO4_ID: + case UNIPHIER_SLD8_ID: uniphier_ld4_boot_mode_show(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) - case SOC_UNIPHIER_PRO5: + case UNIPHIER_PRO5_ID: uniphier_pro5_boot_mode_show(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case SOC_UNIPHIER_PXS2: - case SOC_UNIPHIER_LD6B: + case UNIPHIER_PXS2_ID: + case UNIPHIER_LD6B_ID: uniphier_pxs2_boot_mode_show(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case SOC_UNIPHIER_LD11: - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD11_ID: + case UNIPHIER_LD20_ID: uniphier_ld20_boot_mode_show(); break; #endif diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c index a6b6686..0aac924 100644 --- a/arch/arm/mach-uniphier/boot-mode/spl_board.c +++ b/arch/arm/mach-uniphier/boot-mode/spl_board.c @@ -40,11 +40,11 @@ int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32), { const struct uniphier_romfunc_table *table; - switch (uniphier_get_soc_type()) { - case SOC_UNIPHIER_LD11: + switch (uniphier_get_soc_id()) { + case UNIPHIER_LD11_ID: table = &uniphier_ld11_romfunc_table; break; - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD20_ID: table = &uniphier_ld20_romfunc_table; break; default: diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c new file mode 100644 index 0000000..94bd98e --- /dev/null +++ b/arch/arm/mach-uniphier/cpu-info.c @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2013-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +#include "soc-info.h" + +int print_cpuinfo(void) +{ + unsigned int id, model, rev, required_model = 1, required_rev = 1; + + id = uniphier_get_soc_id(); + model = uniphier_get_soc_model(); + rev = uniphier_get_soc_revision(); + + puts("CPU: "); + + switch (id) { + case UNIPHIER_SLD3_ID: + puts("sLD3 (MN2WS0220)"); + required_model = 2; + break; + case UNIPHIER_LD4_ID: + puts("LD4 (MN2WS0250)"); + required_rev = 2; + break; + case UNIPHIER_PRO4_ID: + puts("Pro4 (MN2WS0230)"); + break; + case UNIPHIER_SLD8_ID: + puts("sLD8 (MN2WS0270)"); + break; + case UNIPHIER_PRO5_ID: + puts("Pro5 (MN2WS0300)"); + break; + case UNIPHIER_PXS2_ID: + puts("PXs2 (MN2WS0310)"); + break; + case UNIPHIER_LD6B_ID: + puts("LD6b (MN2WS0320)"); + break; + case UNIPHIER_LD11_ID: + puts("LD11 (SC1405AP1)"); + break; + case UNIPHIER_LD20_ID: + puts("LD20 (SC1401AJ1)"); + break; + default: + printf("Unknown Processor ID (0x%x)\n", id); + return -1; + } + + printf(" model %d", model); + + printf(" (rev. %d)\n", rev); + + if (model < required_model) { + printf("Sorry, this model is not supported.\n"); + printf("Required model is %d.", required_model); + return -1; + } else if (rev < required_rev) { + printf("Sorry, this revision is not supported.\n"); + printf("Required revision is %d.", required_rev); + return -1; + } + + return 0; +} diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c deleted file mode 100644 index 6ad4c76..0000000 --- a/arch/arm/mach-uniphier/cpu_info.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2013-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include "sg-regs.h" - -int print_cpuinfo(void) -{ - u32 revision, type, model, rev, required_model = 1, required_rev = 1; - - revision = readl(SG_REVISION); - type = (revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT; - model = (revision & SG_REVISION_MODEL_MASK) >> SG_REVISION_MODEL_SHIFT; - rev = (revision & SG_REVISION_REV_MASK) >> SG_REVISION_REV_SHIFT; - - puts("CPU: "); - - switch (type) { - case 0x25: - puts("PH1-sLD3 (MN2WS0220)"); - required_model = 2; - break; - case 0x26: - puts("PH1-LD4 (MN2WS0250)"); - required_rev = 2; - break; - case 0x28: - puts("PH1-Pro4 (MN2WS0230)"); - break; - case 0x29: - puts("PH1-sLD8 (MN2WS0270)"); - break; - case 0x2A: - puts("PH1-Pro5 (MN2WS0300)"); - break; - case 0x2E: - puts("ProXstream2 (MN2WS0310)"); - break; - case 0x2F: - puts("PH1-LD6b (MN2WS0320)"); - break; - case 0x31: - puts("PH1-LD11 (SC1405AP1)"); - break; - case 0x32: - puts("PH1-LD20 (SC1401AJ1)"); - break; - default: - printf("Unknown Processor ID (0x%x)\n", revision); - return -1; - } - - printf(" model %d", model); - - printf(" (rev. %d)\n", rev); - - if (model < required_model) { - printf("Sorry, this model is not supported.\n"); - printf("Required model is %d.", required_model); - return -1; - } else if (rev < required_rev) { - printf("Sorry, this revision is not supported.\n"); - printf("Required revision is %d.", required_rev); - return -1; - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c index d884785..72a514d 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -32,45 +32,45 @@ void _debug_uart_init(void) void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; unsigned int divisor; - switch (uniphier_get_soc_type()) { + switch (uniphier_get_soc_id()) { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case SOC_UNIPHIER_SLD3: + case UNIPHIER_SLD3_ID: divisor = uniphier_sld3_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) - case SOC_UNIPHIER_LD4: + case UNIPHIER_LD4_ID: divisor = uniphier_ld4_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) - case SOC_UNIPHIER_PRO4: + case UNIPHIER_PRO4_ID: divisor = uniphier_pro4_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) - case SOC_UNIPHIER_SLD8: + case UNIPHIER_SLD8_ID: divisor = uniphier_sld8_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) - case SOC_UNIPHIER_PRO5: + case UNIPHIER_PRO5_ID: divisor = uniphier_pro5_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) - case SOC_UNIPHIER_PXS2: + case UNIPHIER_PXS2_ID: divisor = uniphier_pxs2_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) - case SOC_UNIPHIER_LD6B: + case UNIPHIER_LD6B_ID: divisor = uniphier_ld6b_debug_uart_init(); break; #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case SOC_UNIPHIER_LD11: - case SOC_UNIPHIER_LD20: + case UNIPHIER_LD11_ID: + case UNIPHIER_LD20_ID: divisor = uniphier_ld20_debug_uart_init(); break; #endif diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c index 9730330..d6d9db3 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c @@ -245,17 +245,17 @@ static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) char *cmd = argv[1]; const struct phy_param *phy_param; - switch (uniphier_get_soc_type()) { - case SOC_UNIPHIER_LD4: + switch (uniphier_get_soc_id()) { + case UNIPHIER_LD4_ID: phy_param = uniphier_ld4_phy_param; break; - case SOC_UNIPHIER_PRO4: + case UNIPHIER_PRO4_ID: phy_param = uniphier_pro4_phy_param; break; - case SOC_UNIPHIER_SLD8: + case UNIPHIER_SLD8_ID: phy_param = uniphier_sld8_phy_param; break; - case SOC_UNIPHIER_LD11: + case UNIPHIER_LD11_ID: phy_param = uniphier_ld11_phy_param; break; default: diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 87418f4..2cf5f36 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -97,7 +97,7 @@ int ft_board_setup(void *fdt, bd_t *bd) const unsigned long rsv_size = 64; int ch, ret; - if (uniphier_get_soc_type() != SOC_UNIPHIER_LD20) + if (uniphier_get_soc_id() != UNIPHIER_LD20_ID) return 0; param = uniphier_get_board_param(); diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index a179d61..f25e4ed 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -15,12 +15,6 @@ /* Revision */ #define SG_REVISION (SG_CTRL_BASE | 0x0000) -#define SG_REVISION_TYPE_SHIFT 16 -#define SG_REVISION_TYPE_MASK (0xff << SG_REVISION_TYPE_SHIFT) -#define SG_REVISION_MODEL_SHIFT 8 -#define SG_REVISION_MODEL_MASK (0x3 << SG_REVISION_MODEL_SHIFT) -#define SG_REVISION_REV_SHIFT 0 -#define SG_REVISION_REV_MASK (0x1f << SG_REVISION_REV_SHIFT) /* Memory Configuration */ #define SG_MEMCONF (SG_CTRL_BASE | 0x0400) diff --git a/arch/arm/mach-uniphier/soc-info.c b/arch/arm/mach-uniphier/soc-info.c new file mode 100644 index 0000000..e0a63be --- /dev/null +++ b/arch/arm/mach-uniphier/soc-info.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "sg-regs.h" +#include "soc-info.h" + +static unsigned int __uniphier_get_revision_field(unsigned int mask, + unsigned int shift) +{ + u32 revision = readl(SG_REVISION); + + return (revision >> shift) & mask; +} + +unsigned int uniphier_get_soc_id(void) +{ + return __uniphier_get_revision_field(0xff, 16); +} + +unsigned int uniphier_get_soc_model(void) +{ + return __uniphier_get_revision_field(0x3, 8); +} + +unsigned int uniphier_get_soc_revision(void) +{ + return __uniphier_get_revision_field(0x1f, 0); +} diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index d9b38b3..aeaaf83 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -4,73 +4,21 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __MACH_SOC_INFO_H__ -#define __MACH_SOC_INFO_H__ - -enum uniphier_soc_id { - SOC_UNIPHIER_SLD3, - SOC_UNIPHIER_LD4, - SOC_UNIPHIER_PRO4, - SOC_UNIPHIER_SLD8, - SOC_UNIPHIER_PRO5, - SOC_UNIPHIER_PXS2, - SOC_UNIPHIER_LD6B, - SOC_UNIPHIER_LD11, - SOC_UNIPHIER_LD20, - SOC_UNIPHIER_UNKNOWN, -}; - -#define UNIPHIER_NR_ENABLED_SOCS \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD3) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD8) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO5) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PXS2) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD6B) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD11) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) - -#define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1) - -#if UNIPHIER_MULTI_SOC -enum uniphier_soc_id uniphier_get_soc_type(void); -#else -static inline enum uniphier_soc_id uniphier_get_soc_type(void) -{ -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - return SOC_UNIPHIER_SLD3; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD4) - return SOC_UNIPHIER_LD4; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PRO4) - return SOC_UNIPHIER_PRO4; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_SLD8) - return SOC_UNIPHIER_SLD8; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PRO5) - return SOC_UNIPHIER_PRO5; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PXS2) - return SOC_UNIPHIER_PXS2; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD6B) - return SOC_UNIPHIER_LD6B; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD11) - return SOC_UNIPHIER_LD11; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD20) - return SOC_UNIPHIER_LD20; -#endif - - return SOC_UNIPHIER_UNKNOWN; -} -#endif - -int uniphier_get_soc_model(void); -int uniphier_get_soc_revision(void); - -#endif /* __MACH_SOC_INFO_H__ */ +#ifndef __UNIPHIER_SOC_INFO_H__ +#define __UNIPHIER_SOC_INFO_H__ + +#define UNIPHIER_SLD3_ID 0x25 +#define UNIPHIER_LD4_ID 0x26 +#define UNIPHIER_PRO4_ID 0x28 +#define UNIPHIER_SLD8_ID 0x29 +#define UNIPHIER_PRO5_ID 0x2a +#define UNIPHIER_PXS2_ID 0x2e +#define UNIPHIER_LD6B_ID 0x2f +#define UNIPHIER_LD11_ID 0x31 +#define UNIPHIER_LD20_ID 0x32 + +unsigned int uniphier_get_soc_id(void); +unsigned int uniphier_get_soc_model(void); +unsigned int uniphier_get_soc_revision(void); + +#endif /* __UNIPHIER_SOC_INFO_H__ */ diff --git a/arch/arm/mach-uniphier/soc_info.c b/arch/arm/mach-uniphier/soc_info.c deleted file mode 100644 index 046104b..0000000 --- a/arch/arm/mach-uniphier/soc_info.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include "sg-regs.h" -#include "soc-info.h" - -#if UNIPHIER_MULTI_SOC -enum uniphier_soc_id uniphier_get_soc_type(void) -{ - u32 revision = readl(SG_REVISION); - enum uniphier_soc_id ret; - - switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) { -#ifdef CONFIG_ARCH_UNIPHIER_SLD3 - case 0x25: - ret = SOC_UNIPHIER_SLD3; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_LD4 - case 0x26: - ret = SOC_UNIPHIER_LD4; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_PRO4 - case 0x28: - ret = SOC_UNIPHIER_PRO4; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_SLD8 - case 0x29: - ret = SOC_UNIPHIER_SLD8; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_PRO5 - case 0x2A: - ret = SOC_UNIPHIER_PRO5; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_PXS2 - case 0x2E: - ret = SOC_UNIPHIER_PXS2; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_LD6B - case 0x2F: - ret = SOC_UNIPHIER_LD6B; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_LD11 - case 0x31: - ret = SOC_UNIPHIER_LD11; - break; -#endif -#ifdef CONFIG_ARCH_UNIPHIER_LD20 - case 0x32: - ret = SOC_UNIPHIER_LD20; - break; -#endif - default: - ret = SOC_UNIPHIER_UNKNOWN; - break; - } - - return ret; -} -#endif - -int uniphier_get_soc_model(void) -{ - return (readl(SG_REVISION) & SG_REVISION_MODEL_MASK) >> - SG_REVISION_MODEL_SHIFT; -} - -int uniphier_get_soc_revision(void) -{ - return (readl(SG_REVISION) & SG_REVISION_REV_MASK) >> - SG_REVISION_REV_SHIFT; -} diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c index f4e1cb9..83851ef 100644 --- a/arch/arm/mach-uniphier/spl_board_init.c +++ b/arch/arm/mach-uniphier/spl_board_init.c @@ -14,7 +14,7 @@ #include "soc-info.h" struct uniphier_spl_initdata { - enum uniphier_soc_id soc_id; + unsigned int soc_id; void (*bcu_init)(const struct uniphier_board_data *bd); void (*early_clk_init)(void); int (*dpll_init)(const struct uniphier_board_data *bd); @@ -26,7 +26,7 @@ struct uniphier_spl_initdata { static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #if defined(CONFIG_ARCH_UNIPHIER_SLD3) { - .soc_id = SOC_UNIPHIER_SLD3, + .soc_id = UNIPHIER_SLD3_ID, .bcu_init = uniphier_sld3_bcu_init, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_sld3_dpll_init, @@ -37,7 +37,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) { - .soc_id = SOC_UNIPHIER_LD4, + .soc_id = UNIPHIER_LD4_ID, .bcu_init = uniphier_ld4_bcu_init, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_ld4_dpll_init, @@ -48,7 +48,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) { - .soc_id = SOC_UNIPHIER_PRO4, + .soc_id = UNIPHIER_PRO4_ID, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_pro4_dpll_init, .memconf_init = uniphier_memconf_2ch_init, @@ -58,7 +58,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) { - .soc_id = SOC_UNIPHIER_SLD8, + .soc_id = UNIPHIER_SLD8_ID, .bcu_init = uniphier_ld4_bcu_init, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_sld8_dpll_init, @@ -69,7 +69,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) { - .soc_id = SOC_UNIPHIER_PRO5, + .soc_id = UNIPHIER_PRO5_ID, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_pro5_dpll_init, .memconf_init = uniphier_memconf_2ch_init, @@ -79,7 +79,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) { - .soc_id = SOC_UNIPHIER_PXS2, + .soc_id = UNIPHIER_PXS2_ID, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_pxs2_dpll_init, .memconf_init = uniphier_memconf_3ch_init, @@ -89,7 +89,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) { - .soc_id = SOC_UNIPHIER_LD6B, + .soc_id = UNIPHIER_LD6B_ID, .early_clk_init = uniphier_sld3_early_clk_init, .dpll_init = uniphier_pxs2_dpll_init, .memconf_init = uniphier_memconf_3ch_init, @@ -99,7 +99,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) { - .soc_id = SOC_UNIPHIER_LD11, + .soc_id = UNIPHIER_LD11_ID, .early_clk_init = uniphier_ld11_early_clk_init, .dpll_init = uniphier_ld11_dpll_init, .memconf_init = uniphier_memconf_2ch_init, @@ -109,7 +109,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) { - .soc_id = SOC_UNIPHIER_LD20, + .soc_id = UNIPHIER_LD20_ID, .early_clk_init = uniphier_ld11_early_clk_init, .dpll_init = uniphier_ld20_dpll_init, .memconf_init = uniphier_memconf_3ch_init, @@ -120,7 +120,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { }; static const struct uniphier_spl_initdata *uniphier_get_spl_initdata( - enum uniphier_soc_id soc_id) + unsigned int soc_id) { int i; @@ -136,7 +136,7 @@ void spl_board_init(void) { const struct uniphier_board_data *bd; const struct uniphier_spl_initdata *initdata; - enum uniphier_soc_id soc_id; + unsigned int soc_id; int ret; #ifdef CONFIG_DEBUG_UART @@ -147,7 +147,7 @@ void spl_board_init(void) if (!bd) hang(); - soc_id = uniphier_get_soc_type(); + soc_id = uniphier_get_soc_id(); initdata = uniphier_get_spl_initdata(soc_id); if (!initdata) hang(); From patchwork Sat Jan 21 09:05:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92131 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395458qgi; Sat, 21 Jan 2017 01:08:33 -0800 (PST) X-Received: by 10.223.148.230 with SMTP id 93mr13703043wrr.13.1484989713198; Sat, 21 Jan 2017 01:08:33 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id e63si6467532wmi.104.2017.01.21.01.08.32; Sat, 21 Jan 2017 01:08:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5244D4B5CF; Sat, 21 Jan 2017 10:07:29 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JyUVHbQVxIRu; Sat, 21 Jan 2017 10:07:29 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A4908A75C9; Sat, 21 Jan 2017 10:07:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D90674A99B for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id t-qs9a4QFxdA for ; Sat, 21 Jan 2017 10:06:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id BAF9D4A08A for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw4001124; Sat, 21 Jan 2017 18:05:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw4001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989545; bh=9fRd0qlxHp+kpdTyDAWky7UWK69vXn15rcieRxWvsJ8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Dm91rvE3Fc1wcCxp7SG4lQzfslCxaGz91UWeVcKcOyiH5NcR1F0KPb0TiSmA19xh8 u0OmPMn5zkOWvmLjS5SdEAMziDy2VNoi56g97M98meze05UICsuWsDcFHEOhzV6lLk pyHGkku0KOb6r0cEtm/9py7lLS9Ctwlp5XGHijdI245QXFmLiMnOHb56aiYaQDxjgM BLtvgGgVdYXY5BrNjywB55pUOiNiB+n6YVRS6cjGuojvI7fE/tbSjKa3eYPCxIWRCM 3ufSsFNYj2+U44RZuw9reTI5JYM4UpmXisv89ZI/OoWNQrj+2ABlYGExRItgSmoxH7 1CrwWs6b0E6Gg== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:27 +0900 Message-Id: <1484989531-11985-8-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 07/11] ARM: uniphier: add macro to generate SoC data look-up function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" There are similar functions that look up SoC data by the SoC ID. The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to avoid the code duplication. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 20 +++----------------- arch/arm/mach-uniphier/soc-info.h | 18 ++++++++++++++++++ arch/arm/mach-uniphier/spl_board_init.c | 18 ++---------------- 3 files changed, 23 insertions(+), 33 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 413b338..ac7e3a6 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -169,32 +169,18 @@ static const struct uniphier_initdata uniphier_initdata[] = { }, #endif }; - -static const struct uniphier_initdata *uniphier_get_initdata( - unsigned int soc_id) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) { - if (uniphier_initdata[i].soc_id == soc_id) - return &uniphier_initdata[i]; - } - - return NULL; -} +UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata) int board_init(void) { const struct uniphier_initdata *initdata; - unsigned int soc_id; int ret; led_puts("U0"); - soc_id = uniphier_get_soc_id(); - initdata = uniphier_get_initdata(soc_id); + initdata = uniphier_get_initdata(); if (!initdata) { - pr_err("unsupported board\n"); + pr_err("unsupported SoC\n"); return -EINVAL; } diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index aeaaf83..a85df23 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -7,6 +7,9 @@ #ifndef __UNIPHIER_SOC_INFO_H__ #define __UNIPHIER_SOC_INFO_H__ +#include +#include + #define UNIPHIER_SLD3_ID 0x25 #define UNIPHIER_LD4_ID 0x26 #define UNIPHIER_PRO4_ID 0x28 @@ -21,4 +24,19 @@ unsigned int uniphier_get_soc_id(void); unsigned int uniphier_get_soc_model(void); unsigned int uniphier_get_soc_revision(void); +#define UNIPHIER_DEFINE_SOCDATA_FUNC(__func_name, __table) \ +static typeof(&__table[0]) __func_name(void) \ +{ \ + unsigned int soc_id; \ + int i; \ + \ + soc_id = uniphier_get_soc_id(); \ + for (i = 0; i < ARRAY_SIZE(__table); i++) { \ + if (__table[i].soc_id == soc_id) \ + return &__table[i]; \ + } \ + \ + return NULL; \ +} + #endif /* __UNIPHIER_SOC_INFO_H__ */ diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c index 83851ef..da749a3 100644 --- a/arch/arm/mach-uniphier/spl_board_init.c +++ b/arch/arm/mach-uniphier/spl_board_init.c @@ -118,25 +118,12 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = { }, #endif }; - -static const struct uniphier_spl_initdata *uniphier_get_spl_initdata( - unsigned int soc_id) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(uniphier_spl_initdata); i++) { - if (uniphier_spl_initdata[i].soc_id == soc_id) - return &uniphier_spl_initdata[i]; - } - - return NULL; -} +UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata) void spl_board_init(void) { const struct uniphier_board_data *bd; const struct uniphier_spl_initdata *initdata; - unsigned int soc_id; int ret; #ifdef CONFIG_DEBUG_UART @@ -147,8 +134,7 @@ void spl_board_init(void) if (!bd) hang(); - soc_id = uniphier_get_soc_id(); - initdata = uniphier_get_spl_initdata(soc_id); + initdata = uniphier_get_spl_initdata(); if (!initdata) hang(); From patchwork Sat Jan 21 09:05:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92129 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395347qgi; Sat, 21 Jan 2017 01:08:11 -0800 (PST) X-Received: by 10.28.87.19 with SMTP id l19mr6729563wmb.95.1484989691182; Sat, 21 Jan 2017 01:08:11 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id b21si11002080wrd.60.2017.01.21.01.08.10; Sat, 21 Jan 2017 01:08:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9DD804B7D2; Sat, 21 Jan 2017 10:07:20 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id smmTRDJkqxwj; Sat, 21 Jan 2017 10:07:20 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0827C4AFAA; Sat, 21 Jan 2017 10:06:57 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 69FA54A078 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eBm__C4BlKvu for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 181284AAA7 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw5001124; Sat, 21 Jan 2017 18:05:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw5001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989545; bh=QJxPaJFu2BAuY4rbHhtbeonMYmpnPeDDnVF39AdYeaM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=teYVS8rMeaXgcz2HZcTIruYfoMVPGmAle982rFJTRS7Rs6NgOqt30twP9yxjOOkP2 PHnzy3i5WfCnrYjnpH82K3YsPE49V19xHCGtvzD4BioLchFzb5s/5ND4H4q1fydBQl B08I5p6zZjLxoAsqf8FGtUS4X/Vrd20vHhh4qHQjHc2Ua50kM7PDna3AsGRUTIlGsk HrDdJle33A1/w5u6C8pCLiu3GOrYzOiPvyo6nSlleoW3zUHwsdRNWW8uAHQUX+2jgw iaxtuvPRMHI7KkePS7eeF8xzWpaMihHPFF/RPCOOu7Pnj0JLYfm/D4v+bmmAe6TucY vXRkQzS6owZ7w== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:28 +0900 Message-Id: <1484989531-11985-9-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 08/11] ARM: dts: uniphier: compile only DT files that make sense X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER is enabled, but not all of them actually work. For example, when U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built, and vice versa. Compile only the combination that makes sense. Signed-off-by: Masahiro Yamada --- arch/arm/dts/Makefile | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 66ea0b3..3dbbaa7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -81,19 +81,28 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-synology-ds414.dtb \ armada-xp-theadorable.dtb -dtb-$(CONFIG_ARCH_UNIPHIER) += \ - uniphier-ld11-ref.dtb \ - uniphier-ld20-ref.dtb \ - uniphier-ld4-ref.dtb \ - uniphier-ld6b-ref.dtb \ +dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ + uniphier-ld11-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \ + uniphier-ld20-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \ + uniphier-ld4-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \ + uniphier-ld6b-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \ uniphier-pro4-ace.dtb \ uniphier-pro4-ref.dtb \ - uniphier-pro4-sanji.dtb \ - uniphier-pro5-4kbox.dtb \ + uniphier-pro4-sanji.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \ + uniphier-pro5-4kbox.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \ uniphier-pxs2-gentil.dtb \ - uniphier-pxs2-vodka.dtb \ - uniphier-sld3-ref.dtb \ + uniphier-pxs2-vodka.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \ + uniphier-sld3-ref.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ uniphier-sld8-ref.dtb + dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ From patchwork Sat Jan 21 09:05:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92130 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395398qgi; Sat, 21 Jan 2017 01:08:21 -0800 (PST) X-Received: by 10.223.160.206 with SMTP id n14mr15464572wrn.31.1484989701190; Sat, 21 Jan 2017 01:08:21 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id t19si10976047wrb.187.2017.01.21.01.08.20; Sat, 21 Jan 2017 01:08:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EA9304B751; Sat, 21 Jan 2017 10:07:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IsU1S9dPWL96; Sat, 21 Jan 2017 10:07:24 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 36FEC4AD1F; Sat, 21 Jan 2017 10:06:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AB6564AA22 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Erp8Vkwyheq4 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 0AA164AA12 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw6001124; Sat, 21 Jan 2017 18:05:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw6001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989546; bh=WzLTCPkofL4FVNAbh8AGFadD7VcQWgImMlwirEdyZd8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m/+uojE7KGjIrUvHTclupqmLxwZ5azEcYOTlqAfG973LYlrfq3G4F5CiOtAeRzu0f IfnuKZABtdW8oNabQhw9G0Vjs3/0evL0+jixWZN+MLwsjvzTpzvgyFOGRiqxm61u6W WKw7UVVCesvCCmNWhEJ2tl6G0Zgh4Yi5TcHeG8NLZOCxrytWvNJKLRCzHlJ8+9M/Ac Vb6I0nbZMEyaCwGC/dxRJZFweQjoBdVrGtoH9D9Md2dChQ07JKgZXDCi45LnrFOczq J5kzSeGXEUmRf8ZYf7szVQ2swOirmrJUvQC4M/dsyUn/pD1TmmKC874tZ0RiLZCPkr snIrOsGzLhj1A== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:29 +0900 Message-Id: <1484989531-11985-10-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 09/11] pinctrl: uniphier: support UniPhier PXs3 pinctrl driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add pin configuration and pinmux support for UniPhier PXs3 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 24 ++-- drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 140 +++++++++++++++++++++++ 3 files changed, 156 insertions(+), 9 deletions(-) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 689e576..a6e51ca 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -4,57 +4,63 @@ config PINCTRL_UNIPHIER bool config PINCTRL_UNIPHIER_SLD3 - bool "UniPhier PH1-sLD3 SoC pinctrl driver" + bool "UniPhier sLD3 SoC pinctrl driver" depends on ARCH_UNIPHIER_SLD3 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_LD4 - bool "UniPhier PH1-LD4 SoC pinctrl driver" + bool "UniPhier LD4 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD4 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_PRO4 - bool "UniPhier PH1-Pro4 SoC pinctrl driver" + bool "UniPhier Pro4 SoC pinctrl driver" depends on ARCH_UNIPHIER_PRO4 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_SLD8 - bool "UniPhier PH1-sLD8 SoC pinctrl driver" + bool "UniPhier sLD8 SoC pinctrl driver" depends on ARCH_UNIPHIER_SLD8 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_PRO5 - bool "UniPhier PH1-Pro5 SoC pinctrl driver" + bool "UniPhier Pro5 SoC pinctrl driver" depends on ARCH_UNIPHIER_PRO5 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_PXS2 - bool "UniPhier ProXstream2 SoC pinctrl driver" + bool "UniPhier PXs2 SoC pinctrl driver" depends on ARCH_UNIPHIER_PXS2 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_LD6B - bool "UniPhier PH1-LD6b SoC pinctrl driver" + bool "UniPhier LD6b SoC pinctrl driver" depends on ARCH_UNIPHIER_LD6B default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_LD11 - bool "UniPhier PH1-LD11 SoC pinctrl driver" + bool "UniPhier LD11 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD11 default y select PINCTRL_UNIPHIER config PINCTRL_UNIPHIER_LD20 - bool "UniPhier PH1-LD20 SoC pinctrl driver" + bool "UniPhier LD20 SoC pinctrl driver" depends on ARCH_UNIPHIER_LD20 default y select PINCTRL_UNIPHIER +config PINCTRL_UNIPHIER_PXS3 + bool "UniPhier PXs3 SoC pinctrl driver" + depends on ARCH_UNIPHIER_PXS3 + default y + select PINCTRL_UNIPHIER + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index fd003ad..b805765 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -13,3 +13,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD11) += pinctrl-uniphier-ld11.o obj-$(CONFIG_PINCTRL_UNIPHIER_LD20) += pinctrl-uniphier-ld20.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PXS3) += pinctrl-uniphier-pxs3.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c new file mode 100644 index 0000000..65b56da --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38}; +static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42}; +static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60, + 61, 62, 63, 64, 65, 66, 67}; +static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0}; +static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61, + 63, 64, 67}; +static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; +static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83}; +static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0}; +static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77, + 79, 80, 83}; +static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; +static const unsigned i2c0_pins[] = {104, 105}; +static const int i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {106, 107}; +static const int i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {108, 109}; +static const int i2c2_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {110, 111}; +static const int i2c3_muxvals[] = {0, 0}; +static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, + 27, 28, 29, 30}; +static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; +static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, 14}; +static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0}; +static const unsigned system_bus_cs1_pins[] = {15}; +static const int system_bus_cs1_muxvals[] = {0}; +static const unsigned uart0_pins[] = {92, 93}; +static const int uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {94, 95}; +static const int uart1_muxvals[] = {0, 0}; +static const unsigned uart2_pins[] = {96, 97}; +static const int uart2_muxvals[] = {0, 0}; +static const unsigned uart3_pins[] = {98, 99}; +static const int uart3_muxvals[] = {0, 0}; +static const unsigned usb0_pins[] = {84, 85}; +static const int usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {86, 87}; +static const int usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {88, 89}; +static const int usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {90, 91}; +static const int usb3_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(ether_rgmii), + UNIPHIER_PINCTRL_GROUP(ether_rmii), + UNIPHIER_PINCTRL_GROUP(ether1_rgmii), + UNIPHIER_PINCTRL_GROUP(ether1_rmii), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus), + UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), + UNIPHIER_PINCTRL_GROUP_SPL(uart0), + UNIPHIER_PINCTRL_GROUP_SPL(uart1), + UNIPHIER_PINCTRL_GROUP_SPL(uart2), + UNIPHIER_PINCTRL_GROUP_SPL(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const uniphier_pxs3_functions[] = { + UNIPHIER_PINMUX_FUNCTION(emmc), + UNIPHIER_PINMUX_FUNCTION(ether_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether_rmii), + UNIPHIER_PINMUX_FUNCTION(ether1_rgmii), + UNIPHIER_PINMUX_FUNCTION(ether1_rmii), + UNIPHIER_PINMUX_FUNCTION(i2c0), + UNIPHIER_PINMUX_FUNCTION(i2c1), + UNIPHIER_PINMUX_FUNCTION(i2c2), + UNIPHIER_PINMUX_FUNCTION(i2c3), + UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(sd), + UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), + UNIPHIER_PINMUX_FUNCTION_SPL(uart0), + UNIPHIER_PINMUX_FUNCTION_SPL(uart1), + UNIPHIER_PINMUX_FUNCTION_SPL(uart2), + UNIPHIER_PINMUX_FUNCTION_SPL(uart3), + UNIPHIER_PINMUX_FUNCTION(usb0), + UNIPHIER_PINMUX_FUNCTION(usb1), + UNIPHIER_PINMUX_FUNCTION(usb2), + UNIPHIER_PINMUX_FUNCTION(usb3), +}; + +static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { + .groups = uniphier_pxs3_groups, + .groups_count = ARRAY_SIZE(uniphier_pxs3_groups), + .functions = uniphier_pxs3_functions, + .functions_count = ARRAY_SIZE(uniphier_pxs3_functions), + .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, +}; + +static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata); +} + +static const struct udevice_id uniphier_pxs3_pinctrl_match[] = { + { .compatible = "socionext,uniphier-pxs3-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = { + .name = "uniphier-pxs3-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(uniphier_pxs3_pinctrl_match), + .probe = uniphier_pxs3_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; From patchwork Sat Jan 21 09:05:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92128 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395274qgi; Sat, 21 Jan 2017 01:07:58 -0800 (PST) X-Received: by 10.28.198.65 with SMTP id w62mr6685998wmf.123.1484989678821; Sat, 21 Jan 2017 01:07:58 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 53si10955262wrb.335.2017.01.21.01.07.58; Sat, 21 Jan 2017 01:07:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09F364ACA6; Sat, 21 Jan 2017 10:07:14 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hrYvK7uC2n3K; Sat, 21 Jan 2017 10:07:13 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E00EF4B5BF; Sat, 21 Jan 2017 10:06:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B62F44AAA7 for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eUKebdcItLlp for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 3BB224AACE for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw7001124; Sat, 21 Jan 2017 18:05:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw7001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989546; bh=U3WXtNwdDscf1w+iAzSCBzUTwhCBTNQBWNEZZ/NAakM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=18qxDjC16613CrB8mh/Lgr8KE1WP23YbVfs/BGqMZiUoDBuIAd2rx4mULroaBx0l9 szjVTgBeCoMtO/unfAnyP0MYCCUQnXhLzoEBCIaEB76KcTDlD5vFTrRIK9xxDWs4jn qXXuHjbSUmmhQVNlT1WyOyV+s0Q1qQOU72yTRhZ0urbyyfKvnT0f3BIV2uOBae7VAK XqH63HH1jJnGFqLgg2Niipc8wMUogzpVKwxpz99N4gN0SqcPXhL9x4323BSMSoacLI tBIToT8gMArzrSLYCJyJ58PKnpJq12e5+QfoXMI9NCMTI6PSfNdNi/rJbFcQLY9ej8 jCGxwZePrbiAg== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:30 +0900 Message-Id: <1484989531-11985-11-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 10/11] ARM: dts: uniphier: add PXs3 SoC/board support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Initial commit for the PXs3 SoC DT. Signed-off-by: Masahiro Yamada --- arch/arm/dts/Makefile | 2 + arch/arm/dts/uniphier-pxs3-ref.dts | 51 ++++++ arch/arm/dts/uniphier-pxs3.dtsi | 328 +++++++++++++++++++++++++++++++++++++ 3 files changed, 381 insertions(+) create mode 100644 arch/arm/dts/uniphier-pxs3-ref.dts create mode 100644 arch/arm/dts/uniphier-pxs3.dtsi -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3dbbaa7..6a7924e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -98,6 +98,8 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \ dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \ uniphier-pxs2-gentil.dtb \ uniphier-pxs2-vodka.dtb +dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \ + uniphier-pxs3-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \ uniphier-sld3-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \ diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts new file mode 100644 index 0000000..27f0cb0 --- /dev/null +++ b/arch/arm/dts/uniphier-pxs3-ref.dts @@ -0,0 +1,51 @@ +/* + * Device Tree Source for UniPhier PXs3 Reference Board + * + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +/include/ "uniphier-pxs3.dtsi" +/include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" + +/ { + model = "UniPhier PXs3 Reference Board"; + compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c6 = &i2c6; + }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0xa0000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +ðsc { + interrupts = <0 48 4>; +}; + +&serial0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi new file mode 100644 index 0000000..3b30eef --- /dev/null +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -0,0 +1,328 @@ +/* + * Device Tree Source for UniPhier PXs3 SoC + * + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/memreserve/ 0x80000000 0x00080000; + +/ { + compatible = "socionext,uniphier-pxs3"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x000>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x001>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x002>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x003>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + clocks { + refclk: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 4>, + <1 14 4>, + <1 11 4>, + <1 10 4>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&peri_clk 0>; + clock-frequency = <58820000>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&peri_clk 1>; + clock-frequency = <58820000>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + clocks = <&peri_clk 2>; + clock-frequency = <58820000>; + }; + + serial3: serial@54006b00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006b00 0x40>; + interrupts = <0 177 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + clocks = <&peri_clk 3>; + clock-frequency = <58820000>; + }; + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&peri_clk 4>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&peri_clk 5>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + clocks = <&peri_clk 6>; + clock-frequency = <100000>; + }; + + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&peri_clk 7>; + clock-frequency = <100000>; + }; + + /* chip-internal connection for HDMI */ + i2c6: i2c@58786000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58786000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 26 4>; + clocks = <&peri_clk 10>; + clock-frequency = <400000>; + }; + + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_system_bus>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; + }; + + sdctrl@59810000 { + compatible = "socionext,uniphier-pxs3-sdctrl", + "simple-mfd", "syscon"; + reg = <0x59810000 0x800>; + + sd_clk: clock { + compatible = "socionext,uniphier-pxs3-sd-clock"; + #clock-cells = <1>; + }; + + sd_rst: reset { + compatible = "socionext,uniphier-pxs3-sd-reset"; + #reset-cells = <1>; + }; + }; + + perictrl@59820000 { + compatible = "socionext,uniphier-pxs3-perictrl", + "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + peri_clk: clock { + compatible = "socionext,uniphier-pxs3-peri-clock"; + #clock-cells = <1>; + }; + + peri_rst: reset { + compatible = "socionext,uniphier-pxs3-peri-reset"; + #reset-cells = <1>; + }; + }; + + emmc: sdhc@5a000000 { + compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; + status = "disabled"; + reg = <0x5a000000 0x400>; + interrupts = <0 78 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc_1v8>; + clocks = <&sys_clk 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + }; + + sd: sdhc@5a400000 { + compatible = "socionext,uniphier-sdhc"; + status = "disabled"; + reg = <0x5a400000 0x800>; + interrupts = <0 76 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd>; + clocks = <&sd_clk 0>; + reset-names = "host"; + resets = <&sd_rst 0>; + bus-width = <4>; + cap-sd-highspeed; + }; + + soc-glue@5f800000 { + compatible = "socionext,uniphier-pxs3-soc-glue", + "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + + pinctrl: pinctrl { + compatible = "socionext,uniphier-pxs3-pinctrl"; + }; + }; + + aidet@5fc20000 { + compatible = "simple-mfd", "syscon"; + reg = <0x5fc20000 0x200>; + }; + + gic: interrupt-controller@5fe00000 { + compatible = "arm,gic-v3"; + reg = <0x5fe00000 0x10000>, /* GICD */ + <0x5fe80000 0x80000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <1 9 4>; + }; + + sysctrl@61840000 { + compatible = "socionext,uniphier-pxs3-sysctrl", + "simple-mfd", "syscon"; + reg = <0x61840000 0x10000>; + + sys_clk: clock { + compatible = "socionext,uniphier-pxs3-clock"; + #clock-cells = <1>; + }; + + sys_rst: reset { + compatible = "socionext,uniphier-pxs3-reset"; + #reset-cells = <1>; + }; + }; + + nand: nand@68000000 { + compatible = "socionext,denali-nand-v5b"; + status = "disabled"; + reg-names = "nand_data", "denali_reg"; + reg = <0x68000000 0x20>, <0x68100000 0x1000>; + interrupts = <0 65 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + clocks = <&sys_clk 2>; + nand-ecc-strength = <8>; + }; + }; +}; + +/include/ "uniphier-pinctrl.dtsi" From patchwork Sat Jan 21 09:05:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 92127 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp395208qgi; Sat, 21 Jan 2017 01:07:46 -0800 (PST) X-Received: by 10.223.170.195 with SMTP id i3mr17747627wrc.123.1484989666620; Sat, 21 Jan 2017 01:07:46 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 70si3629661wrl.180.2017.01.21.01.07.46; Sat, 21 Jan 2017 01:07:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A284C4B6B3; Sat, 21 Jan 2017 10:07:07 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id H9ccA9TiWO8s; Sat, 21 Jan 2017 10:07:07 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C10834B027; Sat, 21 Jan 2017 10:06:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6DD5D4A07B for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GvuWMAy_rhcj for ; Sat, 21 Jan 2017 10:06:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 13E734AA22 for ; Sat, 21 Jan 2017 10:06:11 +0100 (CET) Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-11.nifty.com with ESMTP id v0L95cw8001124; Sat, 21 Jan 2017 18:05:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com v0L95cw8001124 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1484989547; bh=hfVkgvSVydRHR23UDVMB4VYWG0+fzFq/f5V2020djwU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=irQQGGPkLTce3OJHVKQXIIvdC5xjEGz9RoDdMfz7MXcPkbMK4vJM8jTvy7ngnBe67 3u6SXaicaCmZuPUOAeQNbq6wAqTGrr8Pb+R4QNCdAKTRXf91b6+odIq9IWRLai4SNQ JYPk4cWxnGDnYzLWYK2wcjExcx0Wmp+pGe4MFJk5Ay6q69xXrEmu5VKn+tFEGfEUE+ 5yb4KmlRbA9/UMZvWbkMMzbzK44p2OC1vFDvJahSNSO3Lkilg4QnyHgicoUnEptLIr Y00Vspx1Yf4c/Alybpy235/HwyGUp6Prkzg2FY1CQRU2EtfrESz0hkNgcA34fmoMgO Gtm4Xv8EVz4qA== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 21 Jan 2017 18:05:31 +0900 Message-Id: <1484989531-11985-12-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> References: <1484989531-11985-1-git-send-email-yamada.masahiro@socionext.com> Cc: Albert Aribaud Subject: [U-Boot] [PATCH 11/11] ARM: uniphier: add PXs3 SoC support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Kconfig | 5 +++++ arch/arm/mach-uniphier/board_init.c | 8 ++++++++ arch/arm/mach-uniphier/clk/Makefile | 1 + arch/arm/mach-uniphier/clk/pll-pxs3.c | 7 +++++++ arch/arm/mach-uniphier/cpu-info.c | 3 +++ arch/arm/mach-uniphier/init.h | 1 + arch/arm/mach-uniphier/sbc/Makefile | 1 + arch/arm/mach-uniphier/soc-info.h | 1 + doc/README.uniphier | 4 ++++ 9 files changed, 31 insertions(+) create mode 100644 arch/arm/mach-uniphier/clk/pll-pxs3.c -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index e732ac1..cd9ba6b 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -88,6 +88,11 @@ config ARCH_UNIPHIER_LD20 select OF_BOARD_SETUP default y +config ARCH_UNIPHIER_PXS3 + bool "Enable UniPhier PXs3 SoC support" + depends on ARCH_UNIPHIER_V8_MULTI + default y + config CACHE_UNIPHIER bool "Enable the UniPhier L2 cache controller" depends on ARCH_UNIPHIER_32BIT diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index ac7e3a6..e89a4c5 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -168,6 +168,14 @@ static const struct uniphier_initdata uniphier_initdata[] = { .misc_init = uniphier_ld20_misc_init, }, #endif +#if defined(CONFIG_ARCH_UNIPHIER_PXS3) + { + .soc_id = UNIPHIER_PXS3_ID, + .nand_2cs = false, + .sbc_init = uniphier_pxs2_sbc_init, + .pll_init = uniphier_pxs3_pll_init, + }, +#endif }; UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata) diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 37df04b..43df670 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-pxs3.o endif diff --git a/arch/arm/mach-uniphier/clk/pll-pxs3.c b/arch/arm/mach-uniphier/clk/pll-pxs3.c new file mode 100644 index 0000000..e29d9d0 --- /dev/null +++ b/arch/arm/mach-uniphier/clk/pll-pxs3.c @@ -0,0 +1,7 @@ +/* + * SPDX-License-Identifier: GPL-2.0+ + */ + +void uniphier_pxs3_pll_init(void) +{ +} diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c index 94bd98e..75586a3 100644 --- a/arch/arm/mach-uniphier/cpu-info.c +++ b/arch/arm/mach-uniphier/cpu-info.c @@ -50,6 +50,9 @@ int print_cpuinfo(void) case UNIPHIER_LD20_ID: puts("LD20 (SC1401AJ1)"); break; + case UNIPHIER_PXS3_ID: + puts("PXs3"); + break; default: printf("Unknown Processor ID (0x%x)\n", id); return -1; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index d207806..3aeb5b1 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -112,6 +112,7 @@ void uniphier_ld4_pll_init(void); void uniphier_pro4_pll_init(void); void uniphier_ld11_pll_init(void); void uniphier_ld20_pll_init(void); +void uniphier_pxs3_pll_init(void); void uniphier_ld4_clk_init(void); void uniphier_pro4_clk_init(void); diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index b85b1fe..fe9d85a 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index a85df23..e87ff9c 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -19,6 +19,7 @@ #define UNIPHIER_LD6B_ID 0x2f #define UNIPHIER_LD11_ID 0x31 #define UNIPHIER_LD20_ID 0x32 +#define UNIPHIER_PXS3_ID 0x35 unsigned int uniphier_get_soc_id(void); unsigned int uniphier_get_soc_model(void); diff --git a/doc/README.uniphier b/doc/README.uniphier index a42eaa9..539b1f2 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -62,6 +62,10 @@ LD20 reference board: $ make uniphier_ld20_defconfig $ make CROSS_COMPILE=aarch64-linux-gnu- +PXs3 reference board: + $ make uniphier_v8_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref + You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler.