From patchwork Wed Feb 10 05:02:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 573D7C433E0 for ; Wed, 10 Feb 2021 05:04:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B5E264E53 for ; Wed, 10 Feb 2021 05:04:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229451AbhBJFDs (ORCPT ); Wed, 10 Feb 2021 00:03:48 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:20609 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229592AbhBJFDr (ORCPT ); Wed, 10 Feb 2021 00:03:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612933427; x=1644469427; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aoKNRmpsieVqZQfH9jmT4jDXbR2ecaAZxAOVYPky1SM=; b=mwUWAb0upBqc4HQks2UKlkm6ur7rWNqbZiXGN+wzp3ySt63unWnUOPPT G3BmJ+cXUA1qBedT1/cfNiK3tVcptWMREgI2OJz5yqc1TvwErJjOQwYGd R0lCMhY/t5ZxX5SHAE+P8bYPzn5Ff0n3YzxTb7PoN2VYtwHnk2xjrmBqL /ogadmpwUc1qs6wEI4Dz5xksCEd3MtU7QcP3D3HrOa+KvRmg3ywG8Gnif zl47S02liVOOhFB4nmC6WDe4/WEHkqXkQ6/w3xR4v8LrLQqH8drtBHwrQ 4OV67wpXEfoTVIGezfjkS0XDkDst7MUH3mDi0oXCdLbUe7xbd9GL4V46e Q==; IronPort-SDR: yFEY3it/PiTLFLQAouCRJvl2XvGze/CwtlgAAl4m2TWg3nqE2YBLeSIKXJjdfJ/MOPmVWGJlGE dg/RTnC4FvU/AYmZT9DQ0jt+mkGao4eh+XfKWT39H9Q5qv1NQH1zOnC8E1Py4wE3tYO/AvjJvT OyNm3LkxXhWhEn3pNg2LCGfj/hOBUA3bebbXgqFLmGjh+cP/Da0SNbtHB1UJSl4aB7vMQu358V JkPSdtFFGHxmGfifnwjZQ9uga8XEIPL0Vr8WDuYjV4I6nJgwD6JQNfAsmzikTuIUgTVqcbZonh Fzo= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775804" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:42 +0800 IronPort-SDR: ptTc+JLfIYpF9N/+GY+XOZrZ5T8NP8i4GFwI6a135oDWGJBeiy+veX8gF7KuxVJZMImR0I2uZl vC4Oc5QDSZDgDd/aPgMyOK4JoNo4D6eOMkTCTRhRzwN4v6t9ik6E7Zwa9axAuKGShWHlCMuIBy AJqAeh7AvVhdHXtrnzTJIhbQTau9KmPz9vWxxqlbtfzBl3ip2of6w3DsKFy35aRQaCjfFjysr3 qLw6EKZaP+0Kcck6P1XgQbPBPC6yio9+dIRGCmDWzAvawy/67rhO3MnKTR9ageQtVZzlpylPjY zhLd4AahUP57fpVyZu8l2XDv Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:34 -0800 IronPort-SDR: 12P0yy/TUPAgk9Qz7V5KTAB/XeAzocyey5MnZTMdaxyFPUVN0ame8hMraDdaoL6DWng8QLomxx 49hRR1DI64mQUAK3W7D2Q27s/5wguQoNpJ2WNOcS9lbTDakeI7HY5e5/+nkBDn2jogMkF4f4Y1 baq+Cu8P8KAHqMvlW1+tU+SX/mrnbwjcpcC2h+H4peLgew7XJma/66HNzLChMPE9pdEZ80Jnxp 8T8OYB/i/WSmDttmJPXx9nyBqg1PTKGDC3V91mMZGzNz5hcM8oIR3msxDq5QuP6khqG88zm9XO syc= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:41 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 02/17] dt-bindings: update MAINTAINERS file Date: Wed, 10 Feb 2021 14:02:15 +0900 Message-Id: <20210210050230.131281-3-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a reference to the Canaan K210 system controller driver bindings file Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml in the MAINTAINERS file entry for this driver. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3031c2012865..dbb293fef3e4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3878,6 +3878,7 @@ CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER M: Damien Le Moal L: linux-riscv@lists.infradead.org S: Maintained +F: Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml F: drivers/soc/canaan/ F: include/soc/canaan/ From patchwork Wed Feb 10 05:02:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F64DC433E0 for ; Wed, 10 Feb 2021 05:04:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2019E64E53 for ; Wed, 10 Feb 2021 05:04:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229457AbhBJFEa (ORCPT ); Wed, 10 Feb 2021 00:04:30 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:20609 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229452AbhBJFE2 (ORCPT ); Wed, 10 Feb 2021 00:04:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612933469; x=1644469469; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6K57gJ4d4JJEae1PJW0yBIWM0fdObKVyG7NMETneATc=; b=gUhcyyij+ds5p0vK0dW/I/Kb8JLc7J2u3DdVeSG8rA3ECLj+ljodVgeR Md0Oqz/78fq7mL+Api2OdiUVt5bC8BL4rdT1UaPV78hpoGKrWN8QpjPls WBEmSpgGJELWJ77FXy+wkPWfiowhvlBrrXGNbREoHBbSOEnehXm5W5OAB qisPCdwT/bxyl6WFj7/KwjopwRh1VYmM9u0fzJag6dYT+7R+AkZyQOHkD FbYjAdqVb55cFnDY335iTCm2t/EXTVoZGkQDJy7RdjOB+hjUZ6aOJRiPM dUzNe35M8vD+4pV1wrGm9BUQbD/Z9SZMdrRJJgOCZYPWmqn/RiQo65luM g==; IronPort-SDR: 2NsxU1Tj4r7/METBc7wfCuUiR2AjgTcwDYhHAeGoQdB2cn1DCx9yhUBTRQSRHPVxu7cRi1fBH2 uH5nZZrLuAklkWHORSfueBiBsPBrwoNvvO/CqdphjQpL6SJgbA/w4b+O9EVSgcwtUnhU33Kohw r2Qsg9pmYUfKZ4Om803YZUO2EkxyRK2PVOdcWTip6xUalKOkRhJo7jLJ0TQSo64QHwrWdPhZzR PdKu3WPAZLnZinNnlSKJ+2EqFOVCdYmLisLaUIjl+5L4obbDFI3Db+rLsb7/eFc7VGDcDed6U9 eRA= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775808" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:45 +0800 IronPort-SDR: cMs5HJNwW0CwHTKI0fgL29wLGdFC0x9hhCiKGQfQnCqJim0Unjs92E2Z91/a/e08rOl/PrwZ7G DcI5ZRJ/EK67VgxeuU1SPEVOw4c1gTUrocR+xHU2xcVmgwCligBw1s+oj102VsTTunkRFjsMvt jctFjBQuFY/AJLJTqOMx+esPkOd8T5c+0nxbrv0M1fvphL5TOYw5Ic6e/6NCpYU3MhCP4R3Cyv MxEeK6ulG7xL/H7vmyR2RRVdsB7RYkg5sy9V6rzAn+1susdSH/WvAV7Mb+TSfV23rh3o5KlgYL jhz9uU9GRjDwg9PA5RehRocm Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:37 -0800 IronPort-SDR: TITWKvSN19c3WNW5f5rorrmo5m5zbFm2KO5kAgK0rfPO8BtfjNhipHZAazDySqj8mR78HptrFK MNzogvfUqAnhOkyMoPEXgG2WzWU6Ul0fjbU5H+3pUJWp6iZjYtEgRD5y480M5KupPAXEnnbegF mgCxsBRr/ufGnQcF56gZFCHxDh1VvmpFypo6eA4SO+qJgJ6vu9rn1icv3NwdaoDY8hbsudRu1J jXClDkxCL7fKFIS8FaMJelcm/qUEkf9hIIo1VTxqquUfOsjBhIeKKSLUvUWwCAZ99v4P7ByXuK ETU= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:44 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Paul Walmsley , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 04/17] dt-bindings: update risc-v cpu properties Date: Wed, 10 Feb 2021 14:02:17 +0900 Message-Id: <20210210050230.131281-5-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Canaan Kendryte K210 SoC CPU cores are based on a rocket chip version using a draft verion of the RISC-V ISA specifications. To avoid any confusion with CPU cores using stable specifications, add the compatible string "canaan,k210" for this SoC CPU cores. Also add the "riscv,none" value to the mmu-type property to allow a DT to indicate that the CPU being described does not have an MMU or that it has an MMU that is not usable (which is the case for the K210 SoC). Cc: Paul Walmsley Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal Reviewed-by: Atish Patra Reviewed-by: Anup Patel Acked-by: Rob Herring --- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index eb6843f69f7c..e534f6a7cfa1 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -39,6 +39,7 @@ properties: - sifive,u74 - sifive,u5 - sifive,u7 + - canaan,k210 - const: riscv - const: riscv # Simulator only description: @@ -56,6 +57,7 @@ properties: - riscv,sv32 - riscv,sv39 - riscv,sv48 + - riscv,none riscv,isa: description: From patchwork Wed Feb 10 05:02:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 057BBC433E6 for ; Wed, 10 Feb 2021 05:04:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D3FC064DA5 for ; Wed, 10 Feb 2021 05:04:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229454AbhBJFEb (ORCPT ); Wed, 10 Feb 2021 00:04:31 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:20614 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229456AbhBJFE3 (ORCPT ); Wed, 10 Feb 2021 00:04:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612933470; x=1644469470; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vo/OPIAjkDR1OdjdExr2oFWyf1l5b2KQ57/Uzl/0wR8=; b=bqjI8W06fjBZ5N/pWJl+2lNkZ40XaxG8k5ouExuKqJxy31MrmGhatlCj AmskVNPYCkYldgq2V87RojiQJpoCwbdU6c4aCs+wZScKrsNLRYmOc7SGs V/fq5Cd1EDYSg/iM+SnyW/t0LhU0YyzTxVNyFqnfvuekLXvZB1rlGjfl/ +EYSZTrs9QURK2qKE9gu0TuhEbBRH0jLBxYEAIn1WOfdfIPZWIOVWLN35 4kibqCcgZvBtDhQyK7bO+P1CRw20dskhSJorD6yb3u/2v8MfQJX/VVGuT yuYTFqOKF/6TtXnW95mKM98XkB0F0HOWajrLMlXyY8Y/zeeGT+jwPdBgO g==; IronPort-SDR: OvowWagDCmUCHKz2P9m/AOgehLOLNIiZ5QflJf3oyRrzF23hW3n7fiT8KQWvQBFP95i7LkLcvG EiPxEB7km0SMw5K/h6e74jf8kfPU6QOSYjKA2uac1OfI9Rm3syK4VdvY9Rbz1WQbA7zcEU4+EY uwMbfaoPF7HFlp2qZ+4PqHE2d58uXXAA6fWueOcb6epvOYG/sXAEu5hQOd09+4bQr/vIUlv2eS YYsic8uI/aPVho/7HOcIla7l/c0UCM14q7VWnYi/V/SXmw+gRCd4iMBRy6fuYMLkG3f9Kbwk6Q 62c= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775816" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:49 +0800 IronPort-SDR: FpO1WZfAuLV65wf1TXpX4S0kRF7w9lM+UNI0rpTbeO+MyYnKK9vxvxEIjCq9b1dD5fhwMylrf5 VjldujLFuwfYSk0IP9tKtUti1J1N9WN/bV5jKjU74kUgInikuFrRybHij6LCvCaggaLwsaZSjq 3pc8KLn8zk4FdguE947L6/DZkttrnMGhRtMAab38PAw/m31SqTrW2q2oUvUQLGhF9pu6Ho65jZ gTU7leFP77qVLY2BfqENFMNm3spYMJ6GohpofLd1yZ2I9Q9JM/uW7K70CJITv8sxzJ1iBXzitw 7XwYaxlMEP9lOkq4RNSD5u8M Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:40 -0800 IronPort-SDR: XTr2rBgc3vDiNsMTdefPpsf6sdqWbU6cqlmF9R5Ij7W1fF39bGJKt+L9hlLCsFIuezoj7w477D C04IkPMfp/sUR99xBBGObNwhk/3tnFIMdwad+GEUledZ2r/deMJ/hAnbWzZI2reuYN3epQV2x5 UQhozPuUve7GGLtsXVccRoSk/snMjYxvNxEsUU1TFaafZzwfnv3Pqt6jShPTh/xx8TDoQYQc+s /lE2qIIOVXmIDLxM0X5Z7fyr+y+WLfgbBgoAEyHomfCWRPUkRFnER+htJ2xMdvDJSh7hVLMs15 K0E= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:47 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 06/17] dt-bindings: update sifive clint compatible string Date: Wed, 10 Feb 2021 14:02:19 +0900 Message-Id: <20210210050230.131281-7-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the "canaan,k210-clint" compatible string to the Sifive clint bindings to indicate the use of the "sifive,clint0" IP block in the Canaan Kendryte K210 SoC. The description of the compatible string property is also updated to reflect this addition. Cc: Anup Patel Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal Acked-by: Rob Herring --- .../devicetree/bindings/timer/sifive,clint.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index 2a0e9cd9fbcf..a35952f48742 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -23,15 +23,19 @@ description: properties: compatible: items: - - const: sifive,fu540-c000-clint + - enum: + - sifive,fu540-c000-clint + - canaan,k210-clint - const: sifive,clint0 description: - Should be "sifive,-clint" and "sifive,clint". + Should be ",-clint" and "sifive,clint". Supported compatible strings are - "sifive,fu540-c000-clint" for the SiFive CLINT v0 as integrated - onto the SiFive FU540 chip, and "sifive,clint0" for the SiFive - CLINT v0 IP block with no chip integration tweaks. + onto the SiFive FU540 chip, "canaan,k210-clint" for the SiFive + CLINT v0 as integrated onto the Canaan Kendryte K210 chip, and + "sifive,clint0" for the SiFive CLINT v0 IP block with no chip + integration tweaks. Please refer to sifive-blocks-ip-versioning.txt for details reg: From patchwork Wed Feb 10 05:02:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C92EC433E6 for ; Wed, 10 Feb 2021 05:05:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 776F964E53 for ; Wed, 10 Feb 2021 05:05:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229475AbhBJFFM (ORCPT ); Wed, 10 Feb 2021 00:05:12 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:20609 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229456AbhBJFFL (ORCPT ); Wed, 10 Feb 2021 00:05:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612933511; x=1644469511; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AIY+mENCG0OfDogqN2TK/zkNool8y2CBwzDhCDvMBTc=; b=h19XYuStqtXSf0y4EpVkDmoQrlDWqdwxn/4V7Vd9q0nMgXKhwUNIGaBy ZeRgvdTcGNYfApE2DPbArBArK+15adTgR3y4v9Hp+sBluqlIXXiNx3SM5 sDmy0k7+Vub0ZVaa/0/pBNF53nAhwn91zziXAvKTWWRXeyehETjE2pkHW OOFTyAikU+3F0mGk+WnujHqwUdqsO1QNqNNVs0L9uXhsoARNffsSJt18b yMWZEW+9nbE/59onYtXrVgfjvhz5hHkfJwLiPYtdsoRLKWHkZFxto2YSm eiVibcx3unMIP/Q1aE0MUhFRKJsTs/xwQGykmoByLX7kHjgA0x60Nmuia g==; IronPort-SDR: PGPBmTBr1glaYJLoHcpOkpZcGGvv/dQ1CcK/Zn1LSd1lekVQbRBu3WefQdBe3UHzF6ii0Gpkk5 Fk3qSVzcJDywiI+iPbSYrlpfVl+4Vh84ZG1COmp1ewQBK9Yq3UpDIizu4CbaoKRh3K8XEc7o/w EC11nfN56A9t/y3V1wQ01bNdDnzJt8zrbR32/w4DFxy8wy27baUrPxoeRY1Ti992rj2J9YZiH4 4dh0bQtLjiAUQMFQbzBA7F4mPI2uTPRXy5qoJBDs92rrhVDGFNpFwxN1BHFdK3tC0R7etlbyli ryM= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775819" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:50 +0800 IronPort-SDR: LtqsyJ7BXoZ4pPWfzUw+UlAlS9cetLSx67tS4a6W4Lf0DKqHV7MAv3QqJEsTsFZmd14VrM3wAt 3r+YfMFUSIJUpqHlU68dKF8qDeFXoJqp3LucjcooRMJ7H6fEFSf72TOUWux5Io+gekPvAWYB2R 4lvRHPTaBUffxqzPE5+Ke0IRbBrpeiXJU0c+v7INlqf6sZpTjojfTQfbQhvkjuyLXcHX6Lkxac 9L21k1u1cDFYHMLjV3DX8LazEV45cHo5GKKebZzjq+fINZhdWzE4N3LA/YuFEdghuow9Nl0AUw JywqR3YjBn0nKfsHRnTZ7bpg Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:42 -0800 IronPort-SDR: eZwUjlfnXPNdbdespLK5RaDb3UvE5ofxqGzBxus1CBffsYCb3EUh9At4XdN+Su6QotJhybAeB3 BCJofYp/eAE/zNg+oKVaI6NSOriPEzGkx8j08bo5vn2gutdWdIS5Rrsfbr3xtE0O0SqOqf3G2c O+7C1VdLkxIEXWV8naL9FzFMunNT9Spe3fbDaE7Fn1HyQCv4JPHS4Utsp8D1FLnYJ16DRs3mMR k1Wqy8laRCYV5b/bpuJfw7JpFilOOWJi1SLDMfSr89Rdtqg8lD8+/GD4RUDWtVNlkoy9XFtexL T1Y= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:49 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Paul Walmsley , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 07/17] dt-bindings: update sifive uart compatible string Date: Wed, 10 Feb 2021 14:02:20 +0900 Message-Id: <20210210050230.131281-8-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the compatible string "canaan,k210-uarths" to the sifive uart bindings to indicate the use of this IP block in the Canaan Kendryte K210 SoC. Cc: Paul Walmsley Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal Reviewed-by: Atish Patra Acked-by: Rob Herring --- Documentation/devicetree/bindings/serial/sifive-serial.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.yaml b/Documentation/devicetree/bindings/serial/sifive-serial.yaml index 3ac5c7ff2758..5fa94dacbba9 100644 --- a/Documentation/devicetree/bindings/serial/sifive-serial.yaml +++ b/Documentation/devicetree/bindings/serial/sifive-serial.yaml @@ -20,6 +20,7 @@ properties: - enum: - sifive,fu540-c000-uart - sifive,fu740-c000-uart + - canaan,k210-uarths - const: sifive,uart0 description: From patchwork Wed Feb 10 05:02:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E59FFC433DB for ; Wed, 10 Feb 2021 05:06:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A866C64E2A for ; Wed, 10 Feb 2021 05:06:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229670AbhBJFGC (ORCPT ); Wed, 10 Feb 2021 00:06:02 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:20609 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229653AbhBJFFx (ORCPT ); Wed, 10 Feb 2021 00:05:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612933553; x=1644469553; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dssAasnlmfor/Cbkf8o5BdfkI5FZbW8aYzSRkDzZcpE=; b=ivCXAcImfr2nwRlB1FSVmT2+E9kAO2KKKj2s2IOtq2PRGnCoaVA8pNq5 C8KkPHQoCrTl8QJXdDUNinLad728uG96rSCA66BdUxPSXcINtWsKW14aD +G5VEYomPA94klPmJslUqTqXWEb3yAQflis8ClIOLSYO1BoZR2KazheTn C4u3r1oZmqwZ+8M+QLcsTYqqNoAVV0BwKJTMUmCKWtrQuoasHY5hF9YEY WRLW9GeIv4LA+lcQ3UzZ7nzAqnvFTUrZ/zmKeuaBWmbGsltGis2v9fCFP EzHQpZWbhQSLHYmrh1RShIBlQYQ1fufNJnd3y/jEjpB/NBI1Cqs6QaZUM Q==; IronPort-SDR: XdhhGC/uOsVdaHMaJtvP67TtShYwUsNbXoTz8IHzGqIQuETgTcaAQh5PnAIK27+q5CK/EEHhGT eE2LCzmAFApmqQUM49BpfxE6K4b23Az/JHEc/jziJLsFdsLoZtAcPh+LSNJYZoX98+dqEckoeQ e+m+yOPh4qlHF3Qe4XchACBSKjER899DFEh70/ReRQ9kPbfn3w+bkkOXbL4uSxem7fAUgSolD7 PyA/3KpAh9Wr5RtHPOHsFq4SlzFDOoj1FYiFkaEI9xYxdnbdyW+kuf1lSbmkFXBmMootfDVXfW L3s= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775824" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:57 +0800 IronPort-SDR: blWqis7ER2H00CHChHTaOgPOztaAZbRaH8u2vL+fVOCKRE6DC0wlwH6HhWFDU/0wDbyVseE5dC LYBNkkmH5GmFR/8dO4Fi1hMFZJYSvK3iYK8KVz4MiA+5WKpISNWRpQ2eg1TGxV1Uw/cbagjr83 s+cOZhx9/76ZYxwlXXYstP9hvugZNth2LsKwRVbwRmi21X8mCjxPc1GqpcM3aUCwKvpVJFKEbN Gr9DMYXHNdWL8PVoNq+S1T4p0aYJlIT9/+ZG+mcdU92zr5KH7iQ2Q7JIPjwJu5Whj21D9SLmgT 0MwfpEkEte0NIWH2tBDQcptV Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:49 -0800 IronPort-SDR: MkbpdfnZML3rXee7PNTFj32y3PtK6oKtdirBmwVmlW91xjgtitvhHCjv4fba9wecEhC9XrwCL5 DVOp1NLQNw1vnGI7yZcUJTMrB3djFb8To/6kilZ9stLGhlGSCmws/aYpdtRZSaAqefLVZ0Kb7B r/3P80L4Y5cJ668jxbKqkRSIZYCDPYd7NsQZhGe4kWCO54soOlzh4R6Hw4ESZ0U8NNIrGYN3De bFxD22hhbJgbGeNRd13/DpIgVBPCdjCFJ2xhoo3FQjK4S1Q/I5NqAzBuzvrf+rBDCcRNl2uaNg Xrc= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:56 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 11/17] riscv: Add SiPeed MAIX BiT board device tree Date: Wed, 10 Feb 2021 14:02:24 +0900 Message-Id: <20210210050230.131281-12-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_bit.dts for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 229 ++++++++++++++++++ 1 file changed, 229 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts new file mode 100644 index 000000000000..9335fb24168f --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bit", "sipeed,maix-bitm", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led0 { + color = ; + label = "green"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "red"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "blue"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-names = "default"; + pinctrl-0 = <&jtag_pinctrl>; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + spi-cs-high; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; From patchwork Wed Feb 10 05:02:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF12BC433E6 for ; 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IronPort-SDR: fGqyfyj9axCobpcqEQOcj0PBLS2FGc97Ua2BwTd4bGZnJqQior5/mN3LFX/8fJ2nYTvk5zo4DY /veWGhB1fd2yLGjUIBV0w9ClkCmpt6uS/opvL03MF/q8FUl9TBjSLaeSthXnHJcm1sF0+50842 zac+cY6jMLNdcAvCf/d+k4xhHm3jlw7+TfeBvAhCZrGitR3CeznzQYJOLQsrcIzIdJ+EvRrV43 mT40Y1w+GyFNW5nNxkEaZz276W2V0Ec4q07WSukIffkfXhPPRJFfexnl5Ghy811MVrdf/CFxRS GzU= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775827" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:02:59 +0800 IronPort-SDR: g3iv004ow8axFi9kp4upugjU9+8iO+IzFBPdKtiT1OdgVB3shWmj7UT1j3HKTkuPH2d431ENRz vOoT5K5l/JZPjN9oEkpUSWxB6xf1BmvYos3oZyD1OYVpij7NFWW+IxYZyABdOmlQr3mzPL/xhV htpaQ9WBVYx0w792jOGCVC58kGO7UfcY/oOezxzwX3b/WHObDgCGr+y+xW+fknhAtUA/Yr2yXB MYkXxLS5fc7vOUOyv/3w27Y+Ot8Dtf0WfNvgptJxtrQfFfVKFNg+v6Sw03NSPmKHnWqO32FJQP iRs/mo2vpHpj8qBHPkhBTSwj Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:50 -0800 IronPort-SDR: P/f0jSucZsa4YLE9HkRrz1z/xlH4nqjSyvnU47XnKkZ6bWHbFOZo4AvCLpkb0PLLHmsfpHKWKS Bwv3wxLuw4QmCzrCgFza0m2cMJmo5MMgvb0XjEGLVRWGHh0pzZNh72py0yg5BD0CuQ8sIVyfPw xESq5wdA1oPEFDObG9BFT1cpYybL+CToWlMaC0cScffHT1xZyOhTj4FQi2FLmfG/mAkwHgvaMm fJxoe1Mogpf9Df9riaj4WTTwDDRJbzRTtnRrlDflcGiZejp1z/sNCqg0uYo2OHntL/GNxPqM9l Jss= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:02:57 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 12/17] riscv: Add SiPeed MAIX DOCK board device tree Date: Wed, 10 Feb 2021 14:02:25 +0900 Message-Id: <20210210050230.131281-13-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_dock.dts for the SiPeed MAIX DOCK m1 and m1w boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../boot/dts/canaan/sipeed_maix_dock.dts | 231 ++++++++++++++++++ 1 file changed, 231 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts new file mode 100644 index 000000000000..72c995a321ee --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts @@ -0,0 +1,231 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX Dock"; + compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* + * Note: the board wiring drawing documents green on + * gpio #4, red on gpio #5 and blue on gpio #6. However, + * the board is actually wired differently as defined here. + */ + led0 { + color = ; + label = "blue"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "green"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "red"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&jtag_pinctrl>; + pinctrl-names = "default"; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; From patchwork Wed Feb 10 05:02:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 380412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C42ACC433E6 for ; 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IronPort-SDR: FVAsXb5MPntK2+EW0YhK+MTy7Cy5e/zZ3NT/X+7e+gDhNEOaJL7Iak/x+OHcz8GIcUPpj/lByd uOjndHtvgOJJTmiXy4n3JSbjM1a2sHRJTCa3idL2LXxETzAc9fvA46oeoSdm/fUPklTJVfhpKo AxhDRlZKSEVF9OYMTsD8cTGZmGzx4sgiSHSdclMBj4YRYV4rOSFHOdb3yv0RRcN97B7ppjkW/j +ia9eTfs3Zb97JNPiBAs6NpKoWxoMtDZTZTToJYaxHS+zbC7crmblF/WyVQRccVOu/HPqWvJE3 5Lw= X-IronPort-AV: E=Sophos;i="5.81,167,1610380800"; d="scan'208";a="160775833" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Feb 2021 13:03:02 +0800 IronPort-SDR: WlW6WE3Eu6mPM/9kng3DFmptGGq4IIellsqsCxo33n9adnJOhZEmqX/bNyDtg6dvgw3Ln7KDP6 AnUeYpxFPyfIJbAlfJgeJrxYD5WGAI4PIbtWScAHDgCthCKvO7x4qtLqN8gwbQ0nbzTfQLOjwj mwQA4+Z8JAeb/YRSa9W5t8zlcR5PwPXWAphMsDxZKAdn1byDsYYA7H3SbC//oe+ozJeCb9SQjN fFAoG5qJKhO7giagvySQET2CDHCz3wvpae0/1d0A9KpV4IiwQA9+6QGnddfeVgRIHWP3MAmATr PfQzh24cnwK2RbrktHI/h2ti Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2021 20:44:54 -0800 IronPort-SDR: 28zED599ziOzWy+8GnRkGRwFvuCyLNt9aAtMMz1jUdNvP/uXvHktB1GJYp96GrxID4eaxnrZm2 ADl2CLISQ59y6+k56N4rCBAAA3JakAjJjy7LFCyavAgaXJQdlLTqoLJIeaxzkG8J4Z/gWuKyBK /uqDaGRimUQrERLHLrUAj49G4GY9BnZ/bYyGakLINYsungu04XWXq4SeMQBzoPE0JgJtnm/1yC Vc4nEPbKzpuyC1IUfU9Jq8UT/XEOqlTthUAIdu0Zxzx1Hqa1S03mMETVL4+oZyXlBuHTkGs46e NEs= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.72]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Feb 2021 21:03:00 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v19 14/17] riscv: Add SiPeed MAIXDUINO board device tree Date: Wed, 10 Feb 2021 14:02:27 +0900 Message-Id: <20210210050230.131281-15-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210210050230.131281-1-damien.lemoal@wdc.com> References: <20210210050230.131281-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maixduino.dts for the SiPeed MAIXDUINO board. This device tree enables LEDs and spi/mmc SD card device. Additionally, gpios and i2c are also enabled and mapped to the board header pins as indicated on the board itself. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../boot/dts/canaan/sipeed_maixduino.dts | 204 ++++++++++++++++++ 1 file changed, 204 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maixduino.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts new file mode 100644 index 000000000000..c73baa8289b8 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts @@ -0,0 +1,204 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIXDUINO"; + compatible = "sipeed,maixduino", "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; + + vcc_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&fpioa { + status = "okay"; + + uarths_pinctrl: uarths-pinmux { + pinmux = , /* Header "0" */ + ; /* Header "1" */ + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , /* BOOT */ + , /* Header "2" */ + , /* Header "3" */ + , /* Header "4" */ + , /* Header "5" */ + , /* Header "6" */ + , /* Header "7" */ + , /* Header "8" */ + , /* Header "9" */ + , /* Header "10" */ + , /* Header "11" */ + , /* Header "12" */ + ; /* Header "13" */ + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , /* Header "scl" */ + ; /* Header "sda" */ + }; + + i2s1_pinctrl: i2s1-pinmux { + pinmux = , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + power-supply = <&vcc_3v3>; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};