From patchwork Thu Mar 15 16:07:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 131809 Delivered-To: patch@linaro.org Received: by 10.80.210.197 with SMTP id q5csp1663461edg; Thu, 15 Mar 2018 09:08:12 -0700 (PDT) X-Google-Smtp-Source: AG47ELvSSYoMJsGY3eGDGYu3RCfNIHcw1NPoiX4EMJsFknSmtUA5/I4pxMHP6CZXVQ+BxY+hR4nm X-Received: by 10.101.67.73 with SMTP id k9mr7083714pgq.244.1521130092194; Thu, 15 Mar 2018 09:08:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521130092; cv=none; d=google.com; s=arc-20160816; b=zwLkbDK7c6iafzK0yjt290IRRdgbFQWsWX8osmtlqhNfD9L3EyW5/9sG1XeYT40abY OQz18IFS25XaURL5MJXbMbN3ZllH54cc3+oBd64JFqP9Z14mPg05K1Xtgan5etxz9cvB EaeBijUZP/BkfkaB5gysnocFEnJqZgSw2CtPewTrwGZk1CaFBlsKnjtKtHrBLP1cWkTU fKnE42qSuw/hrPhSfgzGYXTPJXGGerg6KHohP2r45AiqiuWWKDqEh8onRz/KqHjqPQYG VyJuhsTLsPaYqhw+fSVwae1709blGWzgyGsXFLYHCwBDKZediuS0/ghsieJdBPnCg/3c 6RVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=j+e8zjGL/a6pJXiUE2ARCYfYacO85JK3k9DrZe8f2Ks=; b=WkNfbxpgmrZSNg/8PXmAn9uZBfH7DynlrfKMsFa2wkqrkiRvVwCfqoV+RJz5wvfce/ H6ZN/GgLnoWNOSWTqfKxRuaMcrcWXpY43GN5D83ENj7B7TTRxiWVekG+8MtqSH999hCL nZ49sep/xGlIOmtK9nJNxFBYcbsaUXPZdqPy8Val6+X3Q0iQMqSGyfhttRe7l+Yt0/le ZEbxoc0qkMmMOigFx2qd6FPtCwKO3mMCOAJVEWSAienrwiFG3QgLreh3bs3erpMgOvls LisbeafE0AAdH0NaDM3WDG11gvybgG5C4/1AXFoCwZIWMfW25hskwZ3lM9ijmZauRzej p15g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aU+s50/K; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[212.71.249.172]) by smtp.gmail.com with ESMTPSA id z7sm5389707wrg.1.2018.03.15.09.07.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Mar 2018 09:07:58 -0700 (PDT) From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Jassi Brar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kaihua Zhong , Guodong Xu , Haojian Zhuang , Ruyi Wang Cc: Leo Yan Subject: [PATCH v7 1/3] dt-bindings: mailbox: Introduce Hi3660 controller binding Date: Fri, 16 Mar 2018 00:07:36 +0800 Message-Id: <1521130058-24796-2-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521130058-24796-1-git-send-email-leo.yan@linaro.org> References: <1521130058-24796-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce a binding for the Hi3660 mailbox controller, the mailbox is used within application processor (AP), communication processor (CP), HIFI and MCU, etc. Acked-by: Rob Herring Signed-off-by: Leo Yan --- .../bindings/mailbox/hisilicon,hi3660-mailbox.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt -- 1.9.1 diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt new file mode 100644 index 0000000..3e5b453 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi3660-mailbox.txt @@ -0,0 +1,51 @@ +Hisilicon Hi3660 Mailbox Controller + +Hisilicon Hi3660 mailbox controller supports up to 32 channels. Messages +are passed between processors, including application & communication +processors, MCU, HIFI, etc. Each channel is unidirectional and accessed +by using MMIO registers; it supports maximum to 8 words message. + +Controller +---------- + +Required properties: +- compatible: : Shall be "hisilicon,hi3660-mbox" +- reg: : Offset and length of the device's register set +- #mbox-cells: : Must be 3 + <&phandle channel dst_irq ack_irq> + phandle : Label name of controller + channel : Channel number + dst_irq : Remote interrupt vector + ack_irq : Local interrupt vector + +- interrupts: : Contains the two IRQ lines for mailbox. + +Example: + +mailbox: mailbox@e896b000 { + compatible = "hisilicon,hi3660-mbox"; + reg = <0x0 0xe896b000 0x0 0x1000>; + interrupts = <0x0 0xc0 0x4>, + <0x0 0xc1 0x4>; + #mbox-cells = <3>; +}; + +Client +------ + +Required properties: +- compatible : See the client docs +- mboxes : Standard property to specify a Mailbox (See ./mailbox.txt) + Cells must match 'mbox-cells' (See Controller docs above) + +Optional properties +- mbox-names : Name given to channels seen in the 'mboxes' property. + +Example: + +stub_clock: stub_clock@e896b500 { + compatible = "hisilicon,hi3660-stub-clk"; + reg = <0x0 0xe896b500 0x0 0x0100>; + #clock-cells = <1>; + mboxes = <&mailbox 13 3 0>; +}; From patchwork Thu Mar 15 16:07:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 131811 Delivered-To: patch@linaro.org Received: by 10.80.210.197 with SMTP id q5csp1663814edg; Thu, 15 Mar 2018 09:08:31 -0700 (PDT) X-Google-Smtp-Source: AG47ELvwkw2Q+IZV+kqZB0BBS1qmszliLsBdUR+r+yEolIeuwjY9JQODmGPZO3S/LklfMTCBqRU8 X-Received: by 10.99.110.137 with SMTP id j131mr7140596pgc.85.1521130111163; Thu, 15 Mar 2018 09:08:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521130111; cv=none; d=google.com; s=arc-20160816; b=qRK0Vw/6b1mpAKDWCDVE3nzWKIBLhJTXPfQaABhXGVz71e3362O+F1ZnMuA5T7KKDD GI9p6iozyII1RyYPixi3THMjH7q9d5DzHKWiHzsmhd4c2nKwDBtEAIpuRlsoiDPwVUG6 NLSStwMB2YB+beYQzx3sqvoATOSWY+E3d7usq0LJOTNlXEekVfHQ7apLT3q0K3CW7cYm 8mxICgXJHOWb2tl2lgRgaZu79QyrNFl1yzaI4WZ3WNNwWfzWApcs904ImlRlgHe/vEPP 0d3RYqedGGmD97dIyYaW1XMhv9TLzOwqMN1p3xddyrY6fI7CnK4tx+7JzjCxXx2qOgGB ++eA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:arc-authentication-results; bh=g690CuAnd03lsdjkr1/fFvd+T2SIOijbiyZdy4RKXQ0=; b=T85lZlI/Q1rYvomM5vKya5dM4wv8+vgmQISMJFJXO6PySZakx/6X/oN3/CfMtzjtMR 8UGji1LR3QhSn/XMC+cGag1D0ijDKXoW41OBinNoIzILGwPMq7/PSs6Obg4Ge0FJp63l Y2nkTSw67Nt87vDbRKSSJ3/IVI0SzJADNmkfx9dN9CfuJ2NVq6CdqBkecKFBI89EtTZu rZlfVdvaqx0ezfXInNeKFDv+smczLgfGZqKcI+j2V+SfQ1CEoQas6fmjly23UyWkGy1j aMHLD9N0HC1Vh0RpoKRXytBjitmq4X/5Ww80/7pY8o1cFE5n+5yMSjl/2u7zz83VhPLZ ZT1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VQTQ+XeP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[212.71.249.172]) by smtp.gmail.com with ESMTPSA id z7sm5389707wrg.1.2018.03.15.09.08.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Mar 2018 09:08:09 -0700 (PDT) From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Jassi Brar , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kaihua Zhong , Guodong Xu , Haojian Zhuang , Ruyi Wang Subject: [PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660 Date: Fri, 16 Mar 2018 00:07:38 +0800 Message-Id: <1521130058-24796-4-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521130058-24796-1-git-send-email-leo.yan@linaro.org> References: <1521130058-24796-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kaihua Zhong Add DT binding for mailbox driver. Signed-off-by: Ruyi Wang Signed-off-by: Kaihua Zhong --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 63d4f9d..3788448 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -298,6 +298,14 @@ #reset-cells = <2>; }; + mailbox: mailbox@e896b000 { + compatible = "hisilicon,hi3660-mbox"; + reg = <0x0 0xe896b000 0x0 0x1000>; + interrupts = , + ; + #mbox-cells = <3>; + }; + dual_timer0: timer@fff14000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xfff14000 0x0 0x1000>;