From patchwork Mon Nov 5 01:33:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Fu, Siyuan" X-Patchwork-Id: 150130 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2038912ljp; Sun, 4 Nov 2018 17:33:16 -0800 (PST) X-Google-Smtp-Source: AJdET5cMIJjhMW4c46n9qtQhnPqgCqBR2nBU0wEyumsQP6nWhS64N4CuKxsKHCiK1QBBXxJE8Xz0 X-Received: by 2002:a17:902:108a:: with SMTP id c10-v6mr20777689pla.49.1541381596829; Sun, 04 Nov 2018 17:33:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541381596; cv=none; d=google.com; s=arc-20160816; b=rKocCKmLooGy2ZGNHq2ss33J/8tD88RsaozngUqB6c4hzYrexTacHFzCxfDjDHqDMD gH855UHyHdbX1f/PBWjNhtHP8k2UZfvnWVsYIQzFOzdwib8NKLeEJDV3XmHssEl15muH klf/peFODythumLfHFWibrYy5bVOrBZXYZUgD+tXfRjL3W9VqiNDwXmF6Z4P4ppPT0zN zNebgVL5MifMWeh2jh8Yvwsl2JFlxQdmnd6nQh7EgU38w78ArbggtHkDj170KrzkSUY+ DgAttE6DcLS7cP0Xhyb8odqXUIhqTpt6+V9jlOwk2HCcTbKdLijujRnFDaaIuTuaBS2A tTxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:delivered-to; bh=dxS6bs66GlS4jy00rGT3vu+gPyTklk4f8Y6yMUkxTis=; b=U15g4DRCNSQf+iJuyN/u5NlYRhoh4skosKNq8tOCYXHoJO54KfvFEwj4sZ6EhsZi6T COZcue9A+Yor6Vnjc52TAyZT0fZzTcENB71yWFSEq8KdORUwGjWA5QWgelUmMIweOBH8 A6VQdceINXDmYqpTUNqv/uYQV03ygpEZFeJl9ZSyokz+TD3B3kPci5lGITSb7m8vZ/RM QTwVTLZGhTqRvrDwE7q7Z2MIBi9xLAj4YT9WiYjCIGRlxh566FGLoeT3hNczdIQFRAXF M2vwPe6B2AKZxw5zJkrSDBXh+Ra0tzuqlrP3IQijqWpXj24v6W2GGzb5Kc8UOuCApq0m XG+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id j14-v6si11396192pfd.204.2018.11.04.17.33.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 04 Nov 2018 17:33:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B39DF21184E85; Sun, 4 Nov 2018 17:33:15 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=siyuan.fu@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5C24121A02937 for ; Sun, 4 Nov 2018 17:33:14 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Nov 2018 17:33:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,466,1534834800"; d="scan'208";a="93655149" Received: from shwdeopenpsi787.ccr.corp.intel.com ([10.239.158.24]) by FMSMGA003.fm.intel.com with ESMTP; 04 Nov 2018 17:33:13 -0800 From: Fu Siyuan To: edk2-devel@lists.01.org Date: Mon, 5 Nov 2018 09:33:09 +0800 Message-Id: <20181105013310.79948-2-siyuan.fu@intel.com> X-Mailer: git-send-email 2.19.1.windows.1 In-Reply-To: <20181105013310.79948-1-siyuan.fu@intel.com> References: <20181105013310.79948-1-siyuan.fu@intel.com> MIME-Version: 1.0 Subject: [edk2] [PATCH v2 1/2] Platform/Hisilicon: CRLF fixups for D05.dsc X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Leif Lindholm Commit 1a13dfd37fe7 ("Hisilicon/D0x: Switch to generic PciHostBridge driver") introduced some incorrect line endings, fix those here. Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm --- Platform/Hisilicon/D05/D05.dsc | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) -- 2.19.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 1040466633..e5fb5411d7 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -97,10 +97,10 @@ LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf - PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + PlatformPciLib|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf - PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf + PciPlatformLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf [LibraryClasses.common.SEC] ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf @@ -138,7 +138,7 @@ [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 - gArmTokenSpaceGuid.PcdPciIoTranslation|0 + gArmTokenSpaceGuid.PcdPciIoTranslation|0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 @@ -477,7 +477,7 @@ ArmPkg/Drivers/CpuDxe/CpuDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf @@ -618,10 +618,10 @@ NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } - Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { + Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf { - NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf - } + NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf + } MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf