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[198.145.21.10]) by mx.google.com with ESMTPS id f5-v6si4653238plf.411.2018.08.23.09.10.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Aug 2018 09:10:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=IlAtgM9H; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8E9EC21106C6A; Thu, 23 Aug 2018 09:10:31 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::541; helo=mail-pg1-x541.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 70D4121959CB2 for ; Thu, 23 Aug 2018 09:10:30 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id z25-v6so2823529pgu.7 for ; Thu, 23 Aug 2018 09:10:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YmAmCuQr/5uaKGcUoEhY66ModEiXTk+Ryg2+NE1MERw=; b=IlAtgM9HHylml9SdqgCWG/ltHCEm3naio6W+azISdZ+kG/SDOnY6mUmRrzotLtoJYo EbneU7OTXI364COsL0axR8Wqmo+zTi8AUbdnubSQSXp769gPdkw1CWt76+DZ/XOblHDI IUIzAhZx/Jwm2cHTgE3wMaWnSRItKC/duOkLU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YmAmCuQr/5uaKGcUoEhY66ModEiXTk+Ryg2+NE1MERw=; b=pWN1p6CO/tsDygr7OYtFdA3C5ZHwTkzjay8gnVBY/agifa3BVJeOrjk7OhUrICV313 Zh62hLmMsyALJaAm5Bq+h1E8Q9HW+sOZM66QRhVvq17KjQBnfB/j16IpZQLWzpG36D6x XB5Iw9sBt0P1RCO4iOg5veItE3GV/gbTYoivP8Is7jwFqipJFyNKyUb6kDZ+aElvPJ8s FPQb9BUn1Y+rsoZc1z0JGWY2ktDzKr1Iw/OteflmGOAhuNPhbluaKG0ZGzDVXj6ZCRhR JchyEe9tRok2fxqOm3wLZh1ZRhpjf0L4QZUf6uBgGe3Uj1h3yEhNaRWYcpTi18Diz11c fgBQ== X-Gm-Message-State: AOUpUlH/moywr2/hIMjHXwYUc7HXvEgZJpkkT+Cru64PVmojnlPiZorG mnhNBJ1FxcO4qpu/Os7S5yn4+A== X-Received: by 2002:a63:291:: with SMTP id 139-v6mr55433642pgc.365.1535040630174; Thu, 23 Aug 2018 09:10:30 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id d19-v6sm5788083pgv.61.2018.08.23.09.10.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 Aug 2018 09:10:29 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 24 Aug 2018 00:07:41 +0800 Message-Id: <20180823160743.45638-30-ming.huang@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180823160743.45638-1-ming.huang@linaro.org> References: <20180823160743.45638-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v4 29/31] Silicon/Hisilicon/setup: Enable/disable SMMU X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Select without SMMU iort while SMMU item is disable, Select with SMMU iort while SMMU item is enable. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 1 + Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 89 ++++++++++++++++++++ 2 files changed, 90 insertions(+) -- 2.18.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf index 281a4f2ebd..3d133aff85 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf @@ -51,6 +51,7 @@ [Guids] gHisiEfiMemoryMapGuid + gOemConfigGuid [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile ## CONSUMES diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index 54f49977c3..c2c8f687b0 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -16,12 +16,98 @@ #include #include #include +#include #include #include +#include #include #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET) +#define FIELD_IORT_NODE_OFFSET 40 + +typedef enum { + NodeTypeIts = 0, + NodeTypeNameComponent, + NodeTypePciRC, + NodeTypeSmmuV1, + NodeTypeSmmuV3, + NodeTypePMCG +} IORT_NODE_TYPE; + +#pragma pack(1) +typedef struct { + UINT8 Type; + UINT16 Length; + UINT8 Revision; + UINT32 Reserved; + UINT32 IdMapNumber; + UINT32 IdArrayOffset; +} IORT_NODE_HEAD; +#pragma pack() + +BOOLEAN +IsIortWithSmmu ( + IN EFI_ACPI_DESCRIPTION_HEADER *TableHeader + ) +{ + UINT32 *NodeOffset; + UINT32 NextOffset; + IORT_NODE_HEAD *Node; + + NodeOffset = (UINT32 *)((UINT8 *)TableHeader + FIELD_IORT_NODE_OFFSET); + NextOffset = *NodeOffset; + + while (NextOffset < TableHeader->Length) { + Node = (IORT_NODE_HEAD *)((UINT8 *)TableHeader + NextOffset); + NextOffset += Node->Length; + + if ((Node->Type == NodeTypeSmmuV1) || (Node->Type == NodeTypeSmmuV3)) { + return TRUE; + } + } + + return FALSE; +} + +EFI_STATUS +SelectIort ( + IN EFI_ACPI_DESCRIPTION_HEADER *TableHeader + ) +{ + EFI_STATUS Status; + UINTN Size; + OEM_CONFIG_DATA Configuration; + + Configuration.EnableSmmu = 0; + Size = sizeof (OEM_CONFIG_DATA); + Status = gRT->GetVariable ( + OEM_CONFIG_NAME, + &gOemConfigGuid, + NULL, + &Size, + &Configuration + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Get OemConfig variable (%r).\n", Status)); + } + + Status = EFI_SUCCESS; + if (IsIortWithSmmu (TableHeader)) { + if (!Configuration.EnableSmmu) { + Status = EFI_ABORTED; + } + } else { + if (Configuration.EnableSmmu) { + Status = EFI_ABORTED; + } + } + DEBUG ((DEBUG_INFO, "SmmuEnable=%x, return %r for Iort table.\n", + Configuration.EnableSmmu, Status)); + + return Status; +} + STATIC VOID RemoveUnusedMemoryNode ( @@ -130,6 +216,9 @@ UpdateAcpiTable ( case EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE: Status = UpdateSlit (TableHeader); break; + case EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE: + Status = SelectIort (TableHeader); + break; } return Status; }