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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 62-v6si21442040ply.520.2018.08.16.05.13.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Aug 2018 05:13:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FbaqbtzO; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 07004210F3755; Thu, 16 Aug 2018 05:13:32 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A7C5210F374D for ; Thu, 16 Aug 2018 05:13:30 -0700 (PDT) Received: by mail-pl0-x242.google.com with SMTP id j8-v6so2004578pll.12 for ; Thu, 16 Aug 2018 05:13:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AxFXUEiNzg/SsU+++cS+C9fzVZayu+zRoOWJ8Tmk3fM=; b=FbaqbtzOCT60PZDI7+RhImCz/B9muUHJ7IqjNiSKq1ajIMIRQWty82Z8yatugldDRo 65cKTSXBC0hk/PKBYZsRfKKIT7YCnxd72FWml+Sf4un5y7m9ckUhw4gBQKYHxIFeJWh/ apMA11ZumfKlptHhtMLKLVah53otGoqKosI/4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AxFXUEiNzg/SsU+++cS+C9fzVZayu+zRoOWJ8Tmk3fM=; b=Z7DcIXemTWtRnj7e8NxZ5UHJdtARzOWsws5w5piYhw/CiZyPlvxIlp02F5D4TNgUtF ihiuKIzr0ZLM+2Kb43W2KHGe+HuK3z6qF21d/5EybKVVnHAl9oBIhhKeh+lpi7xMCBst UcZ2qjIhKsLm+8E9kEGpLBt6kaT9mTv+pb29Gu0qJOzG8hEnK2Fkezpvipcdsz8tjJsB p0ws6oPvGE3rSA6T0RwdUHBEekb6OrxFWmALx3HcuUZbaBoHQwH8pAY3iP70DVm8fyht L2pF8GJJg0/Ggrs457so+Isu3CKSX2KcqHQh+OECRqabzTFg/km6MALAx6ZsxR1ogKjw Lb3g== X-Gm-Message-State: AOUpUlEAlwhGhvUdEE9pijYI34W1pvMSLFtS2y643O/WvBqvRVTsHk3D Jb+aBT2h5jeowem0ItiVG9ZMkQ== X-Received: by 2002:a17:902:7e06:: with SMTP id b6-v6mr28686883plm.230.1534421610163; Thu, 16 Aug 2018 05:13:30 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j27-v6sm46736311pfj.91.2018.08.16.05.13.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 16 Aug 2018 05:13:29 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 16 Aug 2018 20:12:11 +0800 Message-Id: <20180816121239.44129-9-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180816121239.44129-1-ming.huang@linaro.org> References: <20180816121239.44129-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v3 08/36] Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE struct is used by UpdateAcpiTable.c and Srat aslc. The struct may be different according to chips, so move some macro to PlatformArch.h. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 6 ++++ Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 31 ++++++++++++++------ Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 2 -- 4 files changed, 34 insertions(+), 11 deletions(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h index f39ae0748c..1ebddca4e5 100644 --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h @@ -30,6 +30,12 @@ // Max NUMA node number for each node type #define MAX_NUM_PER_TYPE 8 +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 32 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 + #define S1_BASE 0x40000000000 #define RASC_BASE (0x5000) diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h index 9539cfdada..f3ad45f6c6 100644 --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h @@ -57,5 +57,11 @@ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ } +// for acpi +#define NODE_IN_SOCKET 2 +#define CORE_NUM_PER_SOCKET 48 +#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 16 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 1 + #endif diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h index fd05a3b960..2abffb65fc 100644 --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h @@ -19,6 +19,21 @@ #ifndef __ACPI_NEXT_LIB_H__ #define __ACPI_NEXT_LIB_H__ +#include + +/// +/// ITS Affinity Structure Definition +/// +#pragma pack(1) +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT16 Reserved; + UINT32 ItsHwId; +} EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE; +#pragma pack() + #define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) \ { \ EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), EFI_ACPI_RESERVED_WORD, \ @@ -42,8 +57,8 @@ #define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \ ProximityDomain, ItsId) \ { \ - 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ - {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \ + 4, sizeof (EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ + EFI_ACPI_RESERVED_WORD, ItsId \ } #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \ @@ -75,15 +90,13 @@ // Define the number of each table type. // This is where the table layout is modified. // -#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 -#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 +#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT (MAX_SOCKET*CORE_NUM_PER_SOCKET) typedef struct { - EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; - EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; - EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; + EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; #pragma pack() diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index f5869841dc..54f49977c3 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -20,8 +20,6 @@ #include #include -#define CORE_NUM_PER_SOCKET 32 -#define NODE_IN_SOCKET 2 #define CORECOUNT(X) ((X) * CORE_NUM_PER_SOCKET) STATIC