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[198.145.21.10]) by mx.google.com with ESMTPS id a75-v6si22233013pfc.106.2018.08.14.01.10.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Aug 2018 01:10:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NGQpEGe8; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id DB4AD210F16A3; Tue, 14 Aug 2018 01:10:13 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::42e; helo=mail-pf1-x42e.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0140521959CB2 for ; Tue, 14 Aug 2018 01:10:12 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id y10-v6so8923809pfn.8 for ; Tue, 14 Aug 2018 01:10:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MdHy58md5GSsJ5Bt6GPOn0sssywOCk8dOLDqQrJcyi4=; b=NGQpEGe869MdaTHzdEVUAoxF8twO5zUlMKJbutWKnfhNk4lECC9KJLjM0eZgZ+kn+v SnpnF+Mlh8QAEz2tf3C8Qs9YBAj1QP7+e1+Rdf7xoF5RCgMfeoNktQ399oDx6NyA6xhI lW8N7GKHOs8pX42X7HYJUQ6OAIq5inY1PHCNs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MdHy58md5GSsJ5Bt6GPOn0sssywOCk8dOLDqQrJcyi4=; b=Azn1kPw8I4+RVcUqm0f0TCJws8frTnRQQ8HtcNyYIjCDCDg1k/5kYpbkoL7cery8O5 RJaSKr/5nDOyG8EMs3Rtk5Mz29rQWqSX9YDXeTqmlTsffToKhaTHIXLsFInZwaBNTndl buq961XNNxQGMD6f+lCpOyqPwyPVGbZEfI3n7VHrR0/nu7RRfcHnvUBFb1GS61FAbvl9 ZstSQFSjm7uVnc40PGFUXeY1LxXhE52ErAasEMw2N0LH0JAw8aGAd2lhZDsn8wJhOQQT k+Y/3p3OszSnYumBmOUzGtQsDqDM3yUlIpGnICD3uw0zKzPWCvpYIPgY9Wh5p2A5VZxm eHQw== X-Gm-Message-State: AOUpUlEiTwSqi6kMKj/YNfVQdnOBuewC4GaCD7n6UhIvy6yGg3A10IPy RebpzLtgbwXe9HfSW5NOiZAMCA== X-Received: by 2002:a63:e56:: with SMTP id 22-v6mr20487995pgo.438.1534234212519; Tue, 14 Aug 2018 01:10:12 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id h130-v6sm72905670pgc.88.2018.08.14.01.10.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Aug 2018 01:10:11 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Tue, 14 Aug 2018 16:08:34 +0800 Message-Id: <20180814080903.50466-15-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180814080903.50466-1-ming.huang@linaro.org> References: <20180814080903.50466-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 14/43] Silicon/Hisilicon/D06: Wait for all disk ready X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This patch is relative to D06 SasDxe driver. The SasDxe set a variable to notice this libray. Here Wait for all disk ready for 15S at most. D06: For using straight-through hard disk backboard, some disk need 15 seconds to ready. Actually, wait less 15 seconds here(minus the time from end of SAS driver to here). For using expander backboard, wait less 6 seconds here(minus the time from end of SAS driver to here). D03/D05: As Sas driver don't write the SASDiskInfo variable, D03/D05 will break the loop, so it no waiting here. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/HisiPkg.dec | 1 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 2 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 43 ++++++++++++++++++++ 3 files changed, 46 insertions(+) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 35bea970ec..b56a6a6af7 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -45,6 +45,7 @@ gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 0x56, 0xda, 0x91, 0xc0, 0x7f}} gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0xbf}} + gHisiOemVariableGuid = {0xac62b9a5, 0x9939, 0x41d3, {0xff, 0x5c, 0xc5, 0x80, 0x32, 0x7d, 0x9b, 0x29}} gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8}} gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}} diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf index 7a53befc44..a093f13fb0 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -49,6 +49,7 @@ MemoryAllocationLib PcdLib PrintLib + TimerLib UefiBootManagerLib UefiBootServicesTableLib UefiLib @@ -67,6 +68,7 @@ [Guids] gEfiEndOfDxeEventGroupGuid gEfiTtyTermGuid + gHisiOemVariableGuid [Protocols] gEfiGenericMemTestProtocolGuid diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c index 7dd5ba615c..d5f6d78fa4 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -554,6 +555,47 @@ PlatformBootManagerBeforeConsole ( PlatformRegisterOptionsAndKeys (); } +STATIC +VOID +WaitForDiskReady ( + ) +{ + EFI_STATUS Status; + UINT32 Index; + UINTN DataSize; + UINT32 DiskInfo; + UINT8 IsFinished; + + Status = EFI_NOT_FOUND; + DataSize = sizeof (UINT32); + // Wait for 15 seconds at most. + for (Index = 0; Index < 15; Index++) { + Status = gRT->GetVariable ( + L"SASDiskInfo", + &gHisiOemVariableGuid, + NULL, + &DataSize, + &DiskInfo + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Get DiskInfo:%r\n", Status)); + break; + } + + IsFinished = (UINT8)(DiskInfo >> 24); + if (IsFinished) { + break; + } + DEBUG ((DEBUG_ERROR, "%a", Index == 0 ? "Wait for disk." : ".")); + MicroSecondDelay(1000 * 1000); + } + + if (!EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DiskInfo:%x\n", DiskInfo)); + EfiBootManagerConnectAll (); + } +} + /** Do the platform specific action after the console is ready Possible things that can be done in PlatformBootManagerAfterConsole: @@ -583,6 +625,7 @@ PlatformBootManagerAfterConsole ( // Connect the rest of the devices. // EfiBootManagerConnectAll (); + WaitForDiskReady (); // // Enumerate all possible boot options.