From patchwork Tue Jul 24 07:08:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 142707 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp6930299ljj; Tue, 24 Jul 2018 00:11:33 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdVAe95NHAUUfM/ik8tAmVOMZnWAPuja9px6At6yfG/6X1J8CboAvx8FtB3yC3K7Xc1V+DJ X-Received: by 2002:a63:67c3:: with SMTP id b186-v6mr15280176pgc.5.1532416293392; Tue, 24 Jul 2018 00:11:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532416293; cv=none; d=google.com; s=arc-20160816; b=eIcSWSpEvZSLtyOYZSBgjgUbrM50iotZCvmzK0UcBtBNxKR0+zWMw3t++ksJXmwnaL IA4oxaHp1ivmO+R/BRm1R+tD9QS2+TXc4cJZaEi0I5fTHSkxSZtFe/eMHUPV2B3oiF1V WxTTxXHZ6XtJ7CbjI7mqbcChodIyjf5TRe68jsy53VsQWc6fa0E8iV5FK4NZTNQnc8q5 4LRTmxNaGoOqT1+e7oJkfCVFL4f6MO2EjP3jeJ0ZMJYplEk6hNZGu6ZyHEC7YrSvm7gA LthE0e5LMR9e1D1urkuleZOMoBp7t39yEBuQP7lEjSJpS2Tnkd1oUN3i5XZG431ku6Kl fc/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=GZnyiczlvybgPQ4icuQdDbvqYIu/cK9u3lbnWmQpCTc=; b=WcQ2a2KE2hN3eovbIC9L7RETxpNWEDR14hVaLwEAqAeZAfoxFsP9dhrmYL+rtXNCed P/XgLR0/9MUFmBWTNqOoxtDoZd/KYdqWbytmEcXLmKFmmVIrpyp1gPcK04v+Flnj6mmo QJZZqziGqzdDzef9XvPzoM8Tcd59nDBWuz+VpVsJeqHIRsmU+UPJUCQqxaidWIVnUsRI PR6nJHXaydH6rXPpEDUtP8omoj83vWCoksI2ggE9jh5K9ugYm90VpAfOStwusU/sInYO L5P4Dtlte98Zg2+ofnrUiOFbFWnNCrCSSDvi01PU7y8bbbVT0F22H3lgo9vp79nrRk5d 2uGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=kyBq1AFc; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id g65-v6si10582151pfc.36.2018.07.24.00.11.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 00:11:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=kyBq1AFc; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0C36D210C1231; Tue, 24 Jul 2018 00:11:33 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 29057210C1225 for ; Tue, 24 Jul 2018 00:11:32 -0700 (PDT) Received: by mail-pg1-x542.google.com with SMTP id y4-v6so2207646pgp.9 for ; Tue, 24 Jul 2018 00:11:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QEQODlji37PCC6orTH+2ri93fDeRMfhJrYK0547onS0=; b=kyBq1AFcSTiCsuX5CZV3nGNFIWYWk7fxEUN335rmgf3L93sJOdMOkef1Tgff5XfY6u Cv5WRCRhBiV18vskT/8WKn+QFZkUH1uStaXTQhdXBKlaTSVv9on276l2dRjJCdR8FzV2 kw6ouyuSF0l/fvAaM6+Wv8MxOudvpLSR3G4T0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QEQODlji37PCC6orTH+2ri93fDeRMfhJrYK0547onS0=; b=bHKzehiwCmYe+3EKLjJ/PRHx7nOq7N6w+y7kU65aeBRbHzsZ70dZ7WSrND2LvFqmXo +Pdg1xFmDwf1lLK/sN56KZU5kDjp+bdSD53LjNXcjHIQ9hoQKitvTNEHd9PURRcLssdq SxCbdKAb37YawN+7uvoW6BMPeX3AWr7nVP9EKJvjEda+QNp1UHJT76H/VQDR4SlpkhKi ZUdMcrANF66X8wnjiZD87nAz/jrwN7NoTLyPWSSxPdRThIuuZXPGPjKFbKyS1JlucBca PDrWxALi3eTvGr1Yf0HzM7ylD069l4q7uNByQ3KRxgc3ZJraa/W7WMtvFKDm771TF0tF 3DlQ== X-Gm-Message-State: AOUpUlGmXcBP+jiGND4oNFWv1UeSWL8ytSB15jQNB9wkmAzCF+JbY9wh qJe432uj+el7UMkmJinmiZReR1AkRyg= X-Received: by 2002:a62:5a01:: with SMTP id o1-v6mr16673258pfb.0.1532416291333; Tue, 24 Jul 2018 00:11:31 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id t14-v6sm11449788pgu.0.2018.07.24.00.11.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Jul 2018 00:11:30 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Tue, 24 Jul 2018 15:08:48 +0800 Message-Id: <20180724070922.63362-5-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180724070922.63362-1-ming.huang@linaro.org> References: <20180724070922.63362-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v1 04/38] Platform/Hisilicon/D06: Add M41T83RealTimeClockLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, guoheyi@huawei.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add M41T83RealTimeClockLib for RTC. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D06/D06.dsc | 1 + Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 168 ++++++ Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 603 ++++++++++++++++++++ Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 45 ++ 4 files changed, 817 insertions(+) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 91470118b2..e05c97e1c6 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -66,6 +66,7 @@ CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf + RealTimeClockLib|Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h new file mode 100644 index 0000000000..12a67948c3 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h @@ -0,0 +1,168 @@ +/** @file + + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Limited. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __M41T83_REAL_TIME_CLOCK_H__ +#define __M41T83_REAL_TIME_CLOCK_H__ + +#define M41T83_REGADDR_DOTSECONDS 0x00 +#define M41T83_REGADDR_SECONDS 0x01 +#define M41T83_REGADDR_MINUTES 0x02 +#define M41T83_REGADDR_HOURS 0x03 +#define M41T83_REGADDR_WEEK_DAY 0x04 +#define M41T83_REGADDR_DAY 0x05 +#define M41T83_REGADDR_MONTH 0x06 +#define M41T83_REGADDR_YEAR 0x07 +#define M41T83_REGADDR_ALARM1SEC 0x0E +#define M41T83_REGADDR_ALARM1MIN 0x0D +#define M41T83_REGADDR_ALARM1HOUR 0x0C +#define M41T83_REGADDR_ALARM1DATE 0x0B +#define M41T83_REGADDR_ALARM1MONTH 0x0A + +#define M41T83_REGADDR_TIMERCONTROL 0x11 + +#define M41T83_REGADDR_ALARM2SEC 0x18 +#define M41T83_REGADDR_ALARM2MIN 0x17 +#define M41T83_REGADDR_ALARM2HOUR 0x16 +#define M41T83_REGADDR_ALARM2DATE 0x15 +#define M41T83_REGADDR_ALARM2MONTH 0x14 + +#pragma pack(1) + +typedef union { + struct { + UINT8 TD0:1; + UINT8 TD1:1; + UINT8 RSV:3; + UINT8 TIE:1; + UINT8 TITP:1; + UINT8 TE:1; + } bits; + UINT8 u8; +} RTC_M41T83_TIMERCONTROL; + +typedef union { + struct { + UINT8 MicroSeconds; + } bits; + UINT8 u8; +} RTC_M41T83_DOTSECOND; + +typedef union { + struct{ + UINT8 Seconds:7; + UINT8 ST:1; + } bits; + UINT8 u8; +} RTC_M41T83_SECOND; + +typedef union { + struct { + UINT8 Minutes:7; + UINT8 Rsv:1; + } bits; + UINT8 u8; +} RTC_M41T83_MINUTE; + +typedef union { + struct { + UINT8 Hours:6; + UINT8 CB:2; + } bits; + UINT8 u8; +} RTC_M41T83_HOUR; + +typedef union { + struct{ + UINT8 Days:3; + UINT8 Rsv:5; + } bits; + UINT8 u8; +} RTC_M41T83_WEEK_DAY; + +typedef union { + struct{ + UINT8 Days:6; + UINT8 Rsv:2; + } bits; + UINT8 u8; +} RTC_M41T83_MONTH_DAY; + +typedef union { + struct { + UINT8 Months:5; + UINT8 Rsv:3; + } bits; + UINT8 u8; +} RTC_M41T83_MONTH; + +typedef union { + struct { + UINT8 Years:8; + } bits; + UINT8 u8; +} RTC_M41T83_YEAR; + +typedef union { + struct { + UINT8 Second:7; + UINT8 RPT11:1; + } bits; + UINT8 u8; +} RTC_M41T83_ALARM1SEC; + +typedef union { + struct { + UINT8 Minute:7; + UINT8 RPT12:1; + } bits; + UINT8 u8; +} RTC_M41T83_ALARM1MIN; + +typedef union { + struct { + UINT8 Hour:6; + UINT8 HT:1; + UINT8 RPT13:1; + } bits; + UINT8 u8; +} RTC_M41T83_ALARM1HOUR; + +typedef struct { + RTC_M41T83_DOTSECOND Addr0; + RTC_M41T83_SECOND Addr1; + RTC_M41T83_MINUTE Addr2; + RTC_M41T83_HOUR Addr3; + RTC_M41T83_WEEK_DAY Addr4; + RTC_M41T83_MONTH_DAY Addr5; + RTC_M41T83_MONTH Addr6; + RTC_M41T83_YEAR Addr7; +} RTC_M41T83_TIME; + +#pragma pack() + +// Define EPOCH (1970-JANUARY-01) in the Julian Date representation +#define EPOCH_JULIAN_DATE 2440588 + +// Seconds per unit +#define SEC_PER_MIN ((UINTN) 60) +#define SEC_PER_HOUR ((UINTN) 3600) +#define SEC_PER_DAY ((UINTN) 86400) + +#define SEC_PER_MONTH ((UINTN) 2,592,000) +#define SEC_PER_YEAR ((UINTN) 31,536,000) + +EFI_LOCK mRtcLock; + +#endif diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c new file mode 100644 index 0000000000..9b1d7c00e8 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c @@ -0,0 +1,603 @@ +/** @file + + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Limited. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "M41T83RealTimeClock.h" + +extern I2C_DEVICE gDS3231RtcDevice; + +EFI_STATUS +SwitchRtcI2cChannelAndLock ( + VOID + ) +{ + UINT8 Temp; + UINT8 Count; + + for (Count = 0; Count < 100; Count++) { + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //To get the other side's state is idle first + if (0 != (Temp & BIT3)) { + (VOID) MicroSecondDelay (30000); + if (99 == Count) { //Try 100 times, the other side has not released the bus, return preemption failed + if (!EfiAtRuntime ()) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail !!!\n", __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + continue; //The other side occupies, continue polling is idle + } + + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //Each other free, can be set 1 preemption + Temp = Temp | CPU_GET_I2C_CONTROL; //bit2 = 1 + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); //Come up directly write CPU occupied RTC I2C State + (VOID) MicroSecondDelay (2); + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //Whether or not to preempt success + if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) { + break; //Preemption Successful exit loop continue + } + if (99 == Count) {//Try 100 times, the other side has not released the bus, return preemption failed + if (!EfiAtRuntime ()) { + DEBUG((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state fail !!! \n", __FUNCTION__, __LINE__)); + } + return EFI_DEVICE_ERROR; + } + (VOID) MicroSecondDelay (30000); //Delay 30ms + } + + //Polling BMC RTC I2C status + for (Count = 0; Count < 100; Count++) { + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + if (0 == (Temp & BIT3)) { + return EFI_SUCCESS; + } + (VOID) MicroSecondDelay (30000); //Delay 30ms + } + + //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle or the subsequent BMC will not preempt + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & (~CPU_GET_I2C_CONTROL); //BIT2 = 0 + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); + + return EFI_NOT_READY; +} + + +/** + Read RTC content through its registers. + + @param Address Address offset of RTC data. + @param Size Size of RTC data to read. + @param Data The data of UINT8 type read from RTC. + + @return EFI_STATUS +**/ +EFI_STATUS +RtcRead ( + IN UINT8 Address, + IN UINT8 Size, + OUT UINT8 *Data + ) +{ + EFI_STATUS Status; + + Status = I2CRead (&gDS3231RtcDevice, Address, Size, Data); + MicroSecondDelay (1000); + return Status; +} + +/** + Write RTC through its registers. + + @param Address Address offset of RTC data. + @param Size Size of RTC data to write. + @param Data The data of UINT8 type write from RTC. + + @return EFI_STATUS +**/ +EFI_STATUS +RtcWrite ( + IN UINT8 Address, + IN UINT8 Size, + UINT8 *Data + ) +{ + EFI_STATUS Status; + + Status = I2CWrite(&gDS3231RtcDevice, Address, Size, Data); + MicroSecondDelay (1000); + return Status; +} + +VOID +ReleaseOwnershipOfRtc ( + VOID + ) +{ + UINT8 Temp; + + Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); + Temp = Temp & ~CPU_GET_I2C_CONTROL; + WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); +} + + +EFI_STATUS +InitializeM41T83 ( + VOID + ) +{ + EFI_STATUS Status; + RTC_M41T83_ALARM1HOUR Alarm1Hour; + RTC_M41T83_SECOND Second; + // Acquire RTC Lock to make access to RTC atomic + if (!EfiAtRuntime ()) { + EfiAcquireLock (&mRtcLock); + } + + Status = I2CInit (gDS3231RtcDevice.Socket, gDS3231RtcDevice.Port, Normal); + MicroSecondDelay (1000); + if (EFI_ERROR (Status)) { + if (!EfiAtRuntime ()) { + EfiReleaseLock (&mRtcLock); + } + return Status; + } + + Status = SwitchRtcI2cChannelAndLock (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + if (!EfiAtRuntime ()) { + EfiReleaseLock (&mRtcLock); + } + return Status; + } + + MicroSecondDelay(1000); + + // Set ST at Power up to clear Oscillator fail detection(OF) + Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + } + Second.bits.ST= 1; + Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + goto Exit; + } + Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + } + Second.bits.ST= 0; + Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + goto Exit; + } + + // Clear HT bit to enanle write to the RTC registers (addresses 0-7) + Status = RtcRead (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + } + Alarm1Hour.bits.HT = 0; + Status = RtcWrite (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.u8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + goto Exit; + } + +Exit: + // Release RTC Lock. + ReleaseOwnershipOfRtc (); + if (!EfiAtRuntime ()) { + EfiReleaseLock (&mRtcLock); + } + return Status; +} + +BOOLEAN +IsLeapYear ( + IN EFI_TIME *Time + ) +{ + if (Time->Year % 4 == 0) { + if (Time->Year % 100 == 0) { + if (Time->Year % 400 == 0) { + return TRUE; + } else { + return FALSE; + } + } else { + return TRUE; + } + } else { + return FALSE; + } +} + +BOOLEAN +DayValid ( + IN EFI_TIME *Time + ) +{ + INTN DayOfMonth[12] = { 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; + + if (Time->Day < 1 || + Time->Day > DayOfMonth[Time->Month - 1] || + (Time->Month == 2 && (!IsLeapYear (Time) && Time->Day > 28)) + ) { + return FALSE; + } + + return TRUE; +} + +BOOLEAN TimeValid( + IN EFI_TIME *Time + ) +{ + // Check the input parameters are within the range specified by UEFI + if ((Time->Year < 2000) || + (Time->Year > 2399) || + (Time->Month < 1 ) || + (Time->Month > 12 ) || + (!DayValid (Time) ) || + (Time->Hour > 23 ) || + (Time->Minute > 59 ) || + (Time->Second > 59 ) || + (Time->Nanosecond > 999999999) || + (!(Time->TimeZone == EFI_UNSPECIFIED_TIMEZONE || (Time->TimeZone >= -1440 && Time->TimeZone <= 1440))) || + (Time->Daylight & (~(EFI_TIME_ADJUST_DAYLIGHT | EFI_TIME_IN_DAYLIGHT))) + ) { + return FALSE; + } + + return TRUE; +} + + +/** + Sets the current local time and date information. + + @param Time A pointer to the current time. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER A time field is out of range. + @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error. + +**/ +EFI_STATUS +EFIAPI +LibSetTime ( + IN EFI_TIME *Time + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + RTC_M41T83_TIME BcdTime; + UINT16 CenturyBase = 2000; + UINTN LineNum = 0; + + if (NULL == Time) { + return EFI_INVALID_PARAMETER; + } + + if (!TimeValid (Time)) { + if (!EfiAtRuntime ()) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status)); + DEBUG (( + DEBUG_ERROR, "Now RTC Time is : %04d-%02d-%02d %02d:%02d:%02d\n", + Time->Year, Time->Month, Time->Day, Time->Hour, Time->Minute, Time->Second + )); + } + return EFI_INVALID_PARAMETER; + } + + Status = SwitchRtcI2cChannelAndLock (); + if (EFI_ERROR (Status)) { + return Status; + } + (VOID) MicroSecondDelay (1000); + + SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0); + + // Acquire RTC Lock to make access to RTC atomic + if (!EfiAtRuntime ()) { + EfiAcquireLock (&mRtcLock); + } + + BcdTime.Addr1.bits.Seconds = DecimalToBcd8 (Time->Second); + BcdTime.Addr2.bits.Minutes = DecimalToBcd8 (Time->Minute); + BcdTime.Addr3.bits.Hours = DecimalToBcd8 (Time->Hour); + BcdTime.Addr5.bits.Days = DecimalToBcd8 (Time->Day); + BcdTime.Addr6.bits.Months = DecimalToBcd8 (Time->Month); + BcdTime.Addr7.bits.Years = DecimalToBcd8 (Time->Year % 100); + BcdTime.Addr3.bits.CB = (Time->Year - CenturyBase) / 100 % 10; + + Status = RtcWrite (M41T83_REGADDR_DOTSECONDS, 1, &BcdTime.Addr0.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &BcdTime.Addr1.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_MINUTES, 1, &BcdTime.Addr2.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_HOURS, 1, &BcdTime.Addr3.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_DAY, 1, &BcdTime.Addr5.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_MONTH, 1, &BcdTime.Addr6.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + Status = RtcWrite (M41T83_REGADDR_YEAR, 1, &BcdTime.Addr7.u8); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + +Exit: + ReleaseOwnershipOfRtc (); + // Release RTC Lock. + if (!EfiAtRuntime ()) { + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, LineNum, Status)); + } + EfiReleaseLock (&mRtcLock); + } + return Status; +} + + +/** + Returns the current time and date information, and the time-keeping capabilities + of the hardware platform. + + @param Time A pointer to storage to receive a snapshot of the current time. + @param Capabilities An optional pointer to a buffer to receive the real time clock + device's capabilities. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_INVALID_PARAMETER Time is NULL. + @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error. + @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an authentication failure. +**/ +EFI_STATUS +EFIAPI +LibGetTime ( + OUT EFI_TIME *Time, + OUT EFI_TIME_CAPABILITIES *Capabilities + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + RTC_M41T83_TIME BcdTime; + UINT16 CenturyBase = 2000; + UINTN LineNum = 0; + BOOLEAN IsTimeInvalid = FALSE; + UINT8 TimeTemp[7] = {0}; + + // Ensure Time is a valid pointer + if (NULL == Time) { + return EFI_INVALID_PARAMETER; + } + + Status = SwitchRtcI2cChannelAndLock (); + if (EFI_ERROR (Status)) { + return Status; + } + + MicroSecondDelay(1000); + + SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0); + SetMem (Time , sizeof (EFI_TIME) , 0); + + // Acquire RTC Lock to make access to RTC atomic + if (!EfiAtRuntime ()) { + EfiAcquireLock (&mRtcLock); + } + + Status = RtcRead (M41T83_REGADDR_SECONDS, 7, TimeTemp); + if (EFI_ERROR (Status)) { + LineNum = __LINE__; + goto Exit; + } + + BcdTime.Addr1.u8 = TimeTemp[0]; //SECONDS + BcdTime.Addr2.u8 = TimeTemp[1]; //MINUTES + BcdTime.Addr3.u8 = TimeTemp[2]; //HOURS + BcdTime.Addr5.u8 = TimeTemp[4]; //DAY + BcdTime.Addr6.u8 = TimeTemp[5]; //MONTH + BcdTime.Addr7.u8 = TimeTemp[6]; //Year + + Time->Year = BcdToDecimal8 (BcdTime.Addr7.bits.Years); + Time->Year += CenturyBase + BcdTime.Addr3.bits.CB * 100; + Time->Month = BcdToDecimal8 (BcdTime.Addr6.bits.Months); + Time->Day = BcdToDecimal8 (BcdTime.Addr5.bits.Days); + Time->Hour = BcdToDecimal8 (BcdTime.Addr3.bits.Hours); + Time->Minute = BcdToDecimal8 (BcdTime.Addr2.bits.Minutes); + Time->Second = BcdToDecimal8 (BcdTime.Addr1.bits.Seconds); + Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE; + + if (!TimeValid (Time)) { + Status = EFI_DEVICE_ERROR; + LineNum = __LINE__; + IsTimeInvalid = TRUE; + goto Exit; + } + +Exit: + ReleaseOwnershipOfRtc (); + // Release RTC Lock. + if (!EfiAtRuntime ()) { + if (EFI_ERROR (Status)) { + if (IsTimeInvalid == TRUE) { + DEBUG((DEBUG_ERROR, "%a(%d) Time invalid.\r\n",__FUNCTION__, LineNum)); + } else { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, LineNum, Status)); + } + } + EfiReleaseLock (&mRtcLock); + } + return Status; +} + + +/** + Returns the current wakeup alarm clock setting. + + @param Enabled Indicates if the alarm is currently enabled or disabled. + @param Pending Indicates if the alarm signal is pending and requires acknowledgement. + @param Time The current alarm setting. + + @retval EFI_SUCCESS The alarm settings were returned. + @retval EFI_INVALID_PARAMETER Any parameter is NULL. + @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error. + +**/ +EFI_STATUS +EFIAPI +LibGetWakeupTime ( + OUT BOOLEAN *Enabled, + OUT BOOLEAN *Pending, + OUT EFI_TIME *Time + ) +{ + // Not a required feature + return EFI_UNSUPPORTED; +} + + +/** + Sets the system wakeup alarm clock time. + + @param Enabled Enable or disable the wakeup alarm. + @param Time If Enable is TRUE, the time to set the wakeup alarm for. + + @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If + Enable is FALSE, then the wakeup alarm was disabled. + @retval EFI_INVALID_PARAMETER A time field is out of range. + @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error. + @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. + +**/ +EFI_STATUS +EFIAPI +LibSetWakeupTime ( + IN BOOLEAN Enabled, + OUT EFI_TIME *Time + ) +{ + // Not a required feature + return EFI_UNSUPPORTED; +} + + +/** + This is the declaration of an EFI image entry point. This can be the entry point to an application + written to this specification, an EFI boot service driver, or an EFI runtime driver. + + @param ImageHandle Handle that identifies the loaded image. + @param SystemTable System Table for this image. + + @retval EFI_SUCCESS The operation completed successfully. + +**/ +EFI_STATUS +EFIAPI +LibRtcInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + EFI_TIME EfiTime; + + EfiInitializeLock (&mRtcLock, TPL_CALLBACK); + + // Setup the setters and getters + gRT->GetTime = LibGetTime; + gRT->SetTime = LibSetTime; + gRT->GetWakeupTime = LibGetWakeupTime; + gRT->SetWakeupTime = LibSetWakeupTime; + + Status = InitializeM41T83 (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\nRTC M41T83 Init Failed !!!\n", + __FUNCTION__, __LINE__, Status)); + /* + * Returning ERROR on failure of RTC initilization will cause the system to hang up. + * So we add some debug message to indecate the RTC initilization failed, + * and continue without returning with error to avoid system hanging up. + * + *return Status; + */ + } + + LibGetTime (&EfiTime, NULL); + if (!TimeValid (&EfiTime)) { + EfiTime.Year = 2015; + EfiTime.Month = 1; + EfiTime.Day = 1; + EfiTime.Hour = 0; + EfiTime.Minute = 0; + EfiTime.Second = 0; + Status = LibSetTime (&EfiTime); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] RTC settime Status : %r\n", __FUNCTION__, __LINE__, Status)); + } + } + + DEBUG (( + DEBUG_ERROR, "Now RTC Time is : %04d-%02d-%02d %02d:%02d:%02d\n", + EfiTime.Year, EfiTime.Month, EfiTime.Day, EfiTime.Hour, EfiTime.Minute, EfiTime.Second + )); + /* + * Returning ERROR on failure of RTC initilization will cause the system to hang up. + * So we add some debug message to indecate the RTC initilization failed, + * and return success to avoid system hanging up. + */ + return EFI_SUCCESS; +} diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf new file mode 100644 index 0000000000..0d0bb37557 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf @@ -0,0 +1,45 @@ +#/** @file +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = M41T83RealTimeClockLib + FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = RealTimeClockLib + +[Sources.common] + M41T83RealTimeClockLib.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Platform/Hisilicon/D06/D06.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseMemoryLib + CpldIoLib + DebugLib + I2CLib + IoLib + PcdLib + TimerLib + UefiLib + UefiRuntimeLib # Use EFiAtRuntime to check stage + +[Depex] + gEfiCpuArchProtocolGuid