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[198.145.21.10]) by mx.google.com with ESMTPS id c18-v6si21677481pgp.467.2018.07.13.01.15.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Jul 2018 01:15:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=IVWYf7pN; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2792920986AB4; Fri, 13 Jul 2018 01:15:58 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 55F9920986AB7 for ; Fri, 13 Jul 2018 01:15:57 -0700 (PDT) Received: by mail-pf0-x241.google.com with SMTP id c21-v6so17611272pfn.8 for ; Fri, 13 Jul 2018 01:15:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=buApLzbytp/eU+y5SkiUgXplzV/QuA5DH7Tx2BdUVg4=; b=IVWYf7pNg4QEGZPwusIrXRgq0WQptMZnVHQfoTofxS4xIN0jc3ONMldjO+PMhw1w+3 AUl9M9ca5XEJzNoK9W7x4LRaaJpqo1P/LCOzZIzMbWiOv0IFqRNd8Lgvmo7JqKz7dRFe hX4VtbJai1P8JkQHeu9KW0hB9P1yALK3CwHJM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=buApLzbytp/eU+y5SkiUgXplzV/QuA5DH7Tx2BdUVg4=; b=PgL3IRhA4cXzVe9vDeubxIuYVmhnKY5pUIuy5bdOENL8Ga9GOTZEWay5tLfFV3cqLG 4Px6XQUngcDzHKfrl2OdWOpCkwqmI/ogKXziEItBUjKVcKxERdaksZu/74Tw7C6iQJdx Q+8RpBE8k71wnjMXy8M/w5rS8swum77swVh6oRvWHk11FoiU0XXKXCvWmdFebLizeXwT 2oLpepPfTiM6Yg9SmlacvHBnaENEj9Fi42GXa2hUGFivVKMJEDWjYlmTIOTanI0WKeNa ILu4QnSGgtw0K2lsOff8smPQRChLXExDJWTHNmf5k3+rexOg5iAQpUFqxQ3wMJOFjz7u qW6Q== X-Gm-Message-State: AOUpUlFzNQkU5ohe7CjGkYp4FCuImkIZvCtaaIRgpboBsKUmrdd/dxOy /SVmYc8/Q2cBpEnlt4uldN5DOw== X-Received: by 2002:a63:aa44:: with SMTP id x4-v6mr5275701pgo.120.1531469757125; Fri, 13 Jul 2018 01:15:57 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id e7-v6sm24400196pgc.55.2018.07.13.01.15.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 01:15:56 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 13 Jul 2018 16:15:37 +0800 Message-Id: <20180713081540.8414-4-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180713081540.8414-1-ming.huang@linaro.org> References: <20180713081540.8414-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v3 3/6] Hisilicon/D0x: Fix SetAtuConfig1RW bug X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, guoheyi@huawei.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The MemLimit is wrong when the Private->BusLimit equal 0xFF. This patch fix enumerating device plug in switch cart failed issue. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c index e5f66eaa4a..3f894e8eec 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c @@ -666,7 +666,7 @@ void SetAtuConfig1RW ( ) { UINTN RbPciBase = Private->RbPciBar; - UINT64 MemLimit = GetPcieCfgAddress (Private->Ecam, Private->BusLimit + 1, 0, 0, 0) - 1; + UINT64 MemLimit = GetPcieCfgAddress (Private->Ecam, Private->BusLimit, 0x1F, 0x07, 0xFFF); UINT64 Cfg1Base = GetPcieCfgAddress (Private->Ecam, Private->BusBase + 2, 0, 0, 0); MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, Index);