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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id y5-v6si1740596pln.274.2018.02.28.11.24.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:24:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=h/t7g4Y6; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id CA79C223522AF; Wed, 28 Feb 2018 11:18:45 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7560E223522AF for ; Wed, 28 Feb 2018 11:18:43 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id o76so3620896wrb.7 for ; Wed, 28 Feb 2018 11:24:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LgXotRULN8LPsO6R1PsyOQ4jK9sTOrkbE5dN7TkgYjI=; b=h/t7g4Y64L2zYlpfOSisAj9lWM6N7AKYPY8hZ8tnTv8lfaFp0A3H31RnkMe/1zsOXw JeyP5MRLcQsZVFf/BfC2bGZu8+KAQktpaOeWUCAcTcUir8j13yuz2Z3Olo31mWfvdSRJ jMW3X4PCx6a1gKUtoWbGCyOrsumRLtaEB5/+4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LgXotRULN8LPsO6R1PsyOQ4jK9sTOrkbE5dN7TkgYjI=; b=KGJFDhAxUn+qUVnFYeYuB046rc61dvhxmNwYJTNEYlYKLF2w6kMGGzuBcdQyL7oRDZ 7mOjqmhdQxAygJsQa7mbRihd/wtDveFd8nlK1wDyRtqF12DZhlIgiYGHjk0M1bttHWRu zJgeXmLckoWUJFzX7d7dnsk3lRCrsVSrIhoWrvs3O8m59qzZ+SwNZOSOuHVU+FxKgKdf 4hKtGu+0NXKkQT2kwhwVHmgBpaQlleVpOzJKVhfhDDHyVlfWwDPgbz1R+v97p+o9s8/3 UNPcXpEBIOUtSkeoqp9X5JruL8BvgflVg6vToW9XdXhncE8Yz6bu3kqTQthg/zglf1kA Xafw== X-Gm-Message-State: APf1xPDo/L++sJCBphFenCiddyOum9nzbaHgK2LtBT3LEuTjSqLRTWGH 08E4fFfsNNj9CqFL+aaU/+41FMjegSs= X-Received: by 10.223.142.194 with SMTP id q60mr16403383wrb.113.1519845889458; Wed, 28 Feb 2018 11:24:49 -0800 (PST) Received: from localhost.localdomain ([160.163.57.8]) by smtp.gmail.com with ESMTPSA id 47sm2152312wrb.48.2018.02.28.11.24.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:24:48 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Feb 2018 19:24:20 +0000 Message-Id: <20180228192421.17684-7-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180228192421.17684-1-ard.biesheuvel@linaro.org> References: <20180228192421.17684-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 6/7] Silicon/SynQuacer/AcpiTables: disable PCI RCs if ECAM ghosts are detected X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: masahisa.kojima@linaro.org, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" We have a couple of workarounds available for the ECAM ghosting issue that affects the Synopsys Designware PCIe RCs. First of all, we can be optimistic and hope that the silicon gets fixed at some point. Then, there is a SCP firmware hack that hides these ghosts by remapping the ECAM region using the SMMU sitting between the CPU and the PCIe RC slave interface. Finally, we have a workaround involving stage 2 translation tables that may be enabled at will using a DIP switch on the board. Instead of adding elaborate logic to infer which of these situations we may find ourselves in, let's just test for the symptom directly in the _STA method implementation of the PNP0A08 devices, and deactivate the device if the ECAM space does not appear sane. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 40 ++++++++++++++++++++ 1 file changed, 40 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl index 1735264f09a3..5ffed663e17d 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl @@ -31,6 +31,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR", Name (_BBN, Zero) // PCI Base Bus Number Name (_CCA, 1) // Cache Coherency Attribute + OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG0_CONFIG_BASE, 0x10000) + Field (BDF1, DWordAcc, NoLock, Preserve) { + Offset (0x8000), + VPID, 16, + } + + Method (_STA, 0x0, Serialized) { + // + // Check whether the VID/PID of device #1 on bus #0 equals 0xffff. + // If this is not the case, we are dealing with a ghost device, + // which means we are running with outdated SCP firmware and we + // should keep this PCIe RC disabled. + // + Store (VPID, local1) + If (!LEqual (local1, 0xffff)) { + Return (0x0) + } + Return (0xf) + } + // PCI Routing Table Name (_PRT, Package () { Package () { 0xFFFF, 0, Zero, 222 }, // INTA @@ -149,6 +169,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR", Name (_BBN, Zero) // PCI Base Bus Number Name (_CCA, 1) // Cache Coherency Attribute + OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG1_CONFIG_BASE, 0x10000) + Field (BDF1, DWordAcc, NoLock, Preserve) { + Offset (0x8000), + VPID, 16, + } + + Method (_STA, 0x0, Serialized) { + // + // Check whether the VID/PID of device #1 on bus #0 equals 0xffff. + // If this is not the case, we are dealing with a ghost device, + // which means we are running with outdated SCP firmware and we + // should keep this PCIe RC disabled. + // + Store (VPID, local1) + If (!LEqual (local1, 0xffff)) { + Return (0x0) + } + Return (0xf) + } + // PCI Routing Table Name (_PRT, Package () { Package () { 0xFFFF, 0, Zero, 214 }, // INTA