@@ -31,6 +31,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR",
Name (_BBN, Zero) // PCI Base Bus Number
Name (_CCA, 1) // Cache Coherency Attribute
+ OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG0_CONFIG_BASE, 0x10000)
+ Field (BDF1, DWordAcc, NoLock, Preserve) {
+ Offset (0x8000),
+ VPID, 16,
+ }
+
+ Method (_STA, 0x0, Serialized) {
+ //
+ // Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
+ // If this is not the case, we are dealing with a ghost device,
+ // which means we are running with outdated SCP firmware and we
+ // should keep this PCIe RC disabled.
+ //
+ Store (VPID, local1)
+ If (!LEqual (local1, 0xffff)) {
+ Return (0x0)
+ }
+ Return (0xf)
+ }
+
// PCI Routing Table
Name (_PRT, Package () {
Package () { 0xFFFF, 0, Zero, 222 }, // INTA
@@ -149,6 +169,26 @@ DefinitionBlock ("SsdtPci.aml", "SSDT", 1, "SNI", "SYNQUACR",
Name (_BBN, Zero) // PCI Base Bus Number
Name (_CCA, 1) // Cache Coherency Attribute
+ OperationRegion (BDF1, SystemMemory, SYNQUACER_PCI_SEG1_CONFIG_BASE, 0x10000)
+ Field (BDF1, DWordAcc, NoLock, Preserve) {
+ Offset (0x8000),
+ VPID, 16,
+ }
+
+ Method (_STA, 0x0, Serialized) {
+ //
+ // Check whether the VID/PID of device #1 on bus #0 equals 0xffff.
+ // If this is not the case, we are dealing with a ghost device,
+ // which means we are running with outdated SCP firmware and we
+ // should keep this PCIe RC disabled.
+ //
+ Store (VPID, local1)
+ If (!LEqual (local1, 0xffff)) {
+ Return (0x0)
+ }
+ Return (0xf)
+ }
+
// PCI Routing Table
Name (_PRT, Package () {
Package () { 0xFFFF, 0, Zero, 214 }, // INTA
We have a couple of workarounds available for the ECAM ghosting issue that affects the Synopsys Designware PCIe RCs. First of all, we can be optimistic and hope that the silicon gets fixed at some point. Then, there is a SCP firmware hack that hides these ghosts by remapping the ECAM region using the SMMU sitting between the CPU and the PCIe RC slave interface. Finally, we have a workaround involving stage 2 translation tables that may be enabled at will using a DIP switch on the board. Instead of adding elaborate logic to infer which of these situations we may find ourselves in, let's just test for the symptom directly in the _STA method implementation of the PNP0A08 devices, and deactivate the device if the ECAM space does not appear sane. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 40 ++++++++++++++++++++ 1 file changed, 40 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel