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[198.145.21.10]) by mx.google.com with ESMTPS id c1si1379031pgq.109.2018.02.28.11.24.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:24:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Yq46vppd; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 08A2C223522A7; Wed, 28 Feb 2018 11:18:40 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C886F21F6A6FC for ; Wed, 28 Feb 2018 11:18:38 -0800 (PST) Received: by mail-wr0-x244.google.com with SMTP id l43so3640908wrc.2 for ; Wed, 28 Feb 2018 11:24:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WzbzPT5M+Dj7kcGJhUnyhr9UXfsw/51qiorokl8nR1g=; b=Yq46vppdiaTkhgeaPccPd1HEszPW3I+gERKNKDzTe8t0y5BLRwuzSRX59pVGDjieuB x1rW9+pLaZEWQ8+DT2Iz5ISM9GDq0TUjyCW9SgcszG9o0q3L/kuWwe0S/r5e8IReNW15 j4+SNauBljAyKvZEvnm9GIwnWdmp30mdq3Eu4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WzbzPT5M+Dj7kcGJhUnyhr9UXfsw/51qiorokl8nR1g=; b=iU4dYW53qgZ9brWIbRyjQGQfioNI9nnfrbJm2OmBVTIgALTKQwqHQGvz87hHO5p36L j1YHxh4yYHky3UKHS1IBOODDbH40ep1um82xltvFCDCuXW2C8Jq15lR0atSot9a/+1nw OFSb2028FnEThWwjdICuXS5DOX23NITxYr/8TZ6JJVp30tp42MHUca2tynX9vNvRqtDj 3sunTNnWKDYKSuZeN8HKd0AfDead41o2/CTEL5Zq8PJy86wvmi8jFAjBKTolvm+L8u0w 51AasOozAUr7ZrzysLaYCb8Qp3GLG3sr9jI6SBkeLJu/2UyeCyqCmIhsiZEQeZ65wfrL c0wg== X-Gm-Message-State: APf1xPBtMsILl7D6QqPAdyKGuGIvpifU4gwUP2zVQNG+NlkcvvCe+gtE +B7luPlwdk2uGQP5M869H9D/lHPHwd0= X-Received: by 10.223.136.44 with SMTP id d41mr17978784wrd.127.1519845884604; Wed, 28 Feb 2018 11:24:44 -0800 (PST) Received: from localhost.localdomain ([160.163.57.8]) by smtp.gmail.com with ESMTPSA id 47sm2152312wrb.48.2018.02.28.11.24.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Feb 2018 11:24:42 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Feb 2018 19:24:18 +0000 Message-Id: <20180228192421.17684-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180228192421.17684-1-ard.biesheuvel@linaro.org> References: <20180228192421.17684-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 4/7] Silicon/SynQuacer/PlatformDxe: add option to enable ACPI mode X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: masahisa.kojima@linaro.org, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Create a HII menu option to choose between device tree and ACPI platform descriptions. Note that the option is only active if PCIe compatibility mode is enabled. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 32 ++++++++++++++------ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 1 + Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni | 8 ++++- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr | 10 +++++- Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 8 +++-- 5 files changed, 46 insertions(+), 13 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c index 8787aa6288a7..4ae1c5b0ff6f 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c @@ -277,15 +277,29 @@ PlatformDxeEntryPoint ( mHiiSettingsVal = PcdGet64 (PcdPlatformSettings); mHiiSettings = (SYNQUACER_PLATFORM_VARSTORE_DATA *)&mHiiSettingsVal; - Dtb = NULL; - Status = DtPlatformLoadDtb (&Dtb, &DtbSize); - if (!EFI_ERROR (Status)) { - Status = gBS->InstallConfigurationTable (&gFdtTableGuid, Dtb); - } - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: failed to install FDT configuration table - %r\n", __FUNCTION__, - Status)); + if (mHiiSettings->AcpiPref == ACPIPREF_DT) { + Dtb = NULL; + Status = DtPlatformLoadDtb (&Dtb, &DtbSize); + if (!EFI_ERROR (Status)) { + Status = gBS->InstallConfigurationTable (&gFdtTableGuid, Dtb); + } + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: failed to install FDT configuration table - %r\n", __FUNCTION__, + Status)); + } + } else { + // + // ACPI was selected: install the gEdkiiPlatformHasAcpiGuid GUID as a + // NULL protocol to unlock dispatch of ACPI related drivers. + // + Status = gBS->InstallMultipleProtocolInterfaces (&ImageHandle, + &gEdkiiPlatformHasAcpiGuid, NULL, NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: failed to install gEdkiiPlatformHasAcpiGuid as a protocol\n", + __FUNCTION__)); + } } Handle = NULL; diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index fca66799ebcb..bef7feccd8b8 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -58,6 +58,7 @@ [LibraryClasses] [Guids] g96BoardsI2c0MasterGuid + gEdkiiPlatformHasAcpiGuid gEfiHiiPlatformSetupFormsetGuid gFdtTableGuid gNetsecNonDiscoverableDeviceGuid diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni index 2eca8bbba8c3..836decc870f0 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2017, Linaro, Ltd. All rights reserved. +* Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved. * * This program and the accompanying materials are licensed and made available * under the terms and conditions of the BSD License which accompanies this @@ -33,3 +33,9 @@ #string STR_EMMC_DISABLED #language en-US "Disabled" #string STR_EMMC_ENABLED #language en-US "Enabled" + +#string STR_DT_ACPI_SELECT_PROMPT #language en-US "O/S Hardware Description" +#string STR_DT_ACPI_SELECT_HELP #language en-US "Select the hardware description that will be exposed to the O/S." + +#string STR_DT_ACPI_SELECT_DT #language en-US "Device Tree" +#string STR_DT_ACPI_SELECT_ACPI #language en-US "ACPI" diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr index ea35e902b2d7..8a395eac681b 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2017, Linaro, Ltd. All rights reserved. +* Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved. * * This program and the accompanying materials are licensed and made available * under the terms and conditions of the BSD License which accompanies this @@ -70,6 +70,14 @@ formset option text = STRING_TOKEN(STR_EMMC_ENABLED), value = EMMC_ENABLED, flags = 0; endoneof; + oneof varid = SynQuacerPlatformSettings.AcpiPref, + prompt = STRING_TOKEN(STR_DT_ACPI_SELECT_PROMPT), + help = STRING_TOKEN(STR_DT_ACPI_SELECT_HELP), + flags = NUMERIC_SIZE_1 | INTERACTIVE | RESET_REQUIRED, + option text = STRING_TOKEN(STR_DT_ACPI_SELECT_DT), value = ACPIPREF_DT, flags = DEFAULT; + option text = STRING_TOKEN(STR_DT_ACPI_SELECT_ACPI), value = ACPIPREF_ACPI, flags = 0; + endoneof; + subtitle text = STRING_TOKEN(STR_NULL_STRING); endform; diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h index fbbcbd7d3eec..bb0e476fc3f8 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+ Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this @@ -22,12 +22,16 @@ #define PCIE_MAX_SPEED_UNLIMITED 0x0 #define PCIE_MAX_SPEED_GEN1 0x1 +#define ACPIPREF_DT 0x0 +#define ACPIPREF_ACPI 0x1 + typedef struct { UINT8 EnableEmmc; UINT8 PcieSlot0MaxSpeed; UINT8 PcieSlot1MaxSpeed; UINT8 PcieSlot2MaxSpeed; - UINT8 Reserved[4]; + UINT8 AcpiPref; + UINT8 Reserved[3]; } SYNQUACER_PLATFORM_VARSTORE_DATA; #endif