Message ID | 20180208193021.24524-2-leif.lindholm@linaro.org |
---|---|
State | New |
Headers | show |
Series | [edk2,edk2-platforms,1/3] Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled | expand |
diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf index 2dd384daba..d3fc9b6cc7 100644 --- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf +++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf @@ -43,9 +43,6 @@ [Sources.AARCH64] [Sources.ARM] Arm/ArmJunoHelper.S | GCC -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [FixedPcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c index aa8d7d9c3b..2d9c2c95a8 100644 --- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c +++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c @@ -72,11 +72,7 @@ ArmPlatformGetVirtualMemoryMap ( return; } - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } + CacheAttributes = DDR_ATTRIBUTES_CACHED; // SMB CS0 - NOR0 Flash VirtualMemoryTable[Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE; diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf index 9e81b1c1cc..329f80dcfe 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf @@ -40,9 +40,6 @@ [Sources.common] CTA15-A7Helper.asm | RVCT CTA15-A7Helper.S | GCC -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [FixedPcd] gArmPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c index 4403cbacb8..05e9abc572 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c @@ -53,11 +53,7 @@ ArmPlatformGetVirtualMemoryMap ( return; } - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } + CacheAttributes = DDR_ATTRIBUTES_CACHED; #ifdef ARM_BIGLITTLE_TC2 // Secure NOR0 Flash diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf index 4cbd2ff4b4..8c6291c42f 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf @@ -45,9 +45,6 @@ [Sources.ARM] [Sources.AARCH64] AArch64/RTSMHelper.S -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [FixedPcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf index 269760f8ba..2287756cf8 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf @@ -41,9 +41,6 @@ [Sources.ARM] [Sources.AARCH64] AArch64/RTSMHelper.S -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [FixedPcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index 6379e81751..9fb0803d31 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -90,9 +90,7 @@ ArmPlatformGetVirtualMemoryMap ( return; } - CacheAttributes = (FeaturePcdGet(PcdCacheEnable)) - ? DDR_ATTRIBUTES_CACHED - : DDR_ATTRIBUTES_UNCACHED; + CacheAttributes = DDR_ATTRIBUTES_CACHED; // ReMap (Either NOR Flash or DRAM) VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
PcdCacheEnabled does nothing useful for these platforms. Delete all uses of it here to keep the platforms building once the Pcd is removed from EmbeddedPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> --- Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf | 3 --- Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c | 6 +----- .../VExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf | 3 --- .../ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c | 6 +----- .../ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 3 --- .../VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf | 3 --- Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 4 +--- 7 files changed, 3 insertions(+), 25 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel