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[198.145.21.10]) by mx.google.com with ESMTPS id y1si4866349plk.414.2017.12.01.03.33.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Dec 2017 03:33:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=VFF9e8kD; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 02CA820352AA2; Fri, 1 Dec 2017 03:29:12 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4B8E820352A8A for ; Fri, 1 Dec 2017 03:29:10 -0800 (PST) Received: by mail-wm0-x242.google.com with SMTP id n138so2956051wmg.2 for ; Fri, 01 Dec 2017 03:33:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DPfAA6a+RtBFsvYkDzq5f4wUxFHcb4/YWS+XjcTht1c=; b=VFF9e8kDaHDvwaaOBpRCTQZKia1dRmYrIqq+CEwPTFXJLn4at6yxPmoRBZ/oNY9eK8 iYNJGaVZu5vKNr0HsymP9qMW6ftHYQpWWj7rGdsJ6tqOn3x+ACUydZZsZY1NVOcDJHGq jbNjD+b+ElfPS8J6e8QlpWWKKA9iFxL5WYntk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DPfAA6a+RtBFsvYkDzq5f4wUxFHcb4/YWS+XjcTht1c=; b=qy1WDfXuBkenvVyYOy2/QkB1bBzOxoxPvVIh2lOrit3/Ts6U2718XEljI1lpl7zJUn LVCVVQLTULvYpM8uyHX+t+rUb2AC2HIqrc5Edw9ZdPU2ITYLJdH5Fu5dy4jLBcSafbWk /6isc7+NK7udPo0sm0Psg/I56ofNCKH4EzbNz1rvc94649Mkq5Wr0RHO90k0kFOKTeaA J6ot4lBrtyw33nMYv3HcbW5iChrBpZ4HtDCuvY4v4CF5m9PaYmypKRLSoC9zac9Ds/JX MZKnJ8yWzf6hR7Ss4l5uu8OpPKYVYWBaDIMQMjSAwWg6/beX4wzZZv10DgCTwmfVElSu hMwg== X-Gm-Message-State: AKGB3mK0crMgLMGdGx7zsbaSAfDpehee14QE4kIzJi1nNy3m+IY/e4JO WWp1lDPzkNCqS0g2ewTOW5ASTDz/Pp4= X-Received: by 10.28.127.197 with SMTP id a188mr955630wmd.138.1512128014929; Fri, 01 Dec 2017 03:33:34 -0800 (PST) Received: from localhost.localdomain ([105.150.171.234]) by smtp.gmail.com with ESMTPSA id n12sm8150716wrn.76.2017.12.01.03.33.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Dec 2017 03:33:34 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 1 Dec 2017 11:33:19 +0000 Message-Id: <20171201113321.23642-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171201113321.23642-1-ard.biesheuvel@linaro.org> References: <20171201113321.23642-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 3/5] Platform/ARM: import HcdLcd glue library for VExpress X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Create a new LcdPlatformLib implementation for HdLcd on VExpress, based on the existing code that lives in ArmPlatformPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c | 285 ++++++++++++++++++++ Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf | 43 +++ 2 files changed, 328 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c new file mode 100644 index 000000000000..b1106ee19b98 --- /dev/null +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c @@ -0,0 +1,285 @@ +/** + + Copyright (c) 2012, ARM Ltd. All rights reserved. + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +typedef struct { + UINT32 Mode; + UINT32 HorizontalResolution; + UINT32 VerticalResolution; + LCD_BPP Bpp; + UINT32 OscFreq; + + // These are used by HDLCD + UINT32 HSync; + UINT32 HBackPorch; + UINT32 HFrontPorch; + UINT32 VSync; + UINT32 VBackPorch; + UINT32 VFrontPorch; +} LCD_RESOLUTION; + + +LCD_RESOLUTION mResolutions[] = { + { // Mode 0 : VGA : 640 x 480 x 24 bpp + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY, + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH + }, + { // Mode 1 : SVGA : 800 x 600 x 24 bpp + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY, + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH + }, + { // Mode 2 : XGA : 1024 x 768 x 24 bpp + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + }, + { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp + SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2), + SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH, + SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH + }, + { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp + UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2), + UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH, + UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH + }, + { // Mode 5 : HD : 1920 x 1080 x 24 bpp + HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2), + HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH, + HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH + } +}; + +EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = { + 0, + NULL +}; + +EFI_EDID_ACTIVE_PROTOCOL mEdidActive = { + 0, + NULL +}; + +EFI_STATUS +LcdPlatformInitializeDisplay ( + IN EFI_HANDLE Handle + ) +{ + EFI_STATUS Status; + + // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard + Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE); + if (EFI_ERROR(Status)) { + return Status; + } + + // Install the EDID Protocols + Status = gBS->InstallMultipleProtocolInterfaces ( + &Handle, + &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered, + &gEfiEdidActiveProtocolGuid, &mEdidActive, + NULL + ); + + return Status; +} + +EFI_STATUS +LcdPlatformGetVram ( + OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress, + OUT UINTN* VramSize + ) +{ + EFI_STATUS Status; + EFI_ALLOCATE_TYPE AllocationType; + + // Set the vram size + *VramSize = LCD_VRAM_SIZE; + + *VramBaseAddress = (EFI_PHYSICAL_ADDRESS)LCD_VRAM_CORE_TILE_BASE; + + // Allocate the VRAM from the DRAM so that nobody else uses it. + if (*VramBaseAddress == 0) { + AllocationType = AllocateAnyPages; + } else { + AllocationType = AllocateAddress; + } + Status = gBS->AllocatePages (AllocationType, EfiBootServicesData, EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress); + if (EFI_ERROR(Status)) { + return Status; + } + + // Mark the VRAM as write-combining. The VRAM is inside the DRAM, which is cacheable. + Status = gDS->SetMemorySpaceAttributes (*VramBaseAddress, *VramSize, + EFI_MEMORY_WC); + ASSERT_EFI_ERROR(Status); + if (EFI_ERROR(Status)) { + gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize)); + return Status; + } + + return EFI_SUCCESS; +} + +UINT32 +LcdPlatformGetMaxMode ( + VOID + ) +{ + // + // The following line will report correctly the total number of graphics modes + // that could be supported by the graphics driver: + // + return (sizeof(mResolutions) / sizeof(LCD_RESOLUTION)); +} + +EFI_STATUS +LcdPlatformSetMode ( + IN UINT32 ModeNumber + ) +{ + EFI_STATUS Status; + + if (ModeNumber >= LcdPlatformGetMaxMode ()) { + return EFI_INVALID_PARAMETER; + } + + // Set the video mode oscillator + do { + Status = ArmPlatformSysConfigSetDevice (SYS_CFG_OSC_SITE1, PcdGet32(PcdHdLcdVideoModeOscId), mResolutions[ModeNumber].OscFreq); + } while (Status == EFI_TIMEOUT); + if (EFI_ERROR(Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + + // Set the DVI into the new mode + do { + Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode); + } while (Status == EFI_TIMEOUT); + if (EFI_ERROR(Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + + // Set the multiplexer + Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, ARM_VE_DAUGHTERBOARD_1_SITE); + if (EFI_ERROR(Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + + return Status; +} + +EFI_STATUS +LcdPlatformQueryMode ( + IN UINT32 ModeNumber, + OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info + ) +{ + if (ModeNumber >= LcdPlatformGetMaxMode ()) { + return EFI_INVALID_PARAMETER; + } + + Info->Version = 0; + Info->HorizontalResolution = mResolutions[ModeNumber].HorizontalResolution; + Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution; + Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution; + + switch (mResolutions[ModeNumber].Bpp) { + case LCD_BITS_PER_PIXEL_24: + Info->PixelFormat = PixelRedGreenBlueReserved8BitPerColor; + Info->PixelInformation.RedMask = LCD_24BPP_RED_MASK; + Info->PixelInformation.GreenMask = LCD_24BPP_GREEN_MASK; + Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK; + Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK; + break; + + case LCD_BITS_PER_PIXEL_16_555: + case LCD_BITS_PER_PIXEL_16_565: + case LCD_BITS_PER_PIXEL_12_444: + case LCD_BITS_PER_PIXEL_8: + case LCD_BITS_PER_PIXEL_4: + case LCD_BITS_PER_PIXEL_2: + case LCD_BITS_PER_PIXEL_1: + default: + // These are not supported + ASSERT(FALSE); + break; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +LcdPlatformGetTimings ( + IN UINT32 ModeNumber, + OUT UINT32* HRes, + OUT UINT32* HSync, + OUT UINT32* HBackPorch, + OUT UINT32* HFrontPorch, + OUT UINT32* VRes, + OUT UINT32* VSync, + OUT UINT32* VBackPorch, + OUT UINT32* VFrontPorch + ) +{ + if (ModeNumber >= LcdPlatformGetMaxMode ()) { + return EFI_INVALID_PARAMETER; + } + + *HRes = mResolutions[ModeNumber].HorizontalResolution; + *HSync = mResolutions[ModeNumber].HSync; + *HBackPorch = mResolutions[ModeNumber].HBackPorch; + *HFrontPorch = mResolutions[ModeNumber].HFrontPorch; + *VRes = mResolutions[ModeNumber].VerticalResolution; + *VSync = mResolutions[ModeNumber].VSync; + *VBackPorch = mResolutions[ModeNumber].VBackPorch; + *VFrontPorch = mResolutions[ModeNumber].VFrontPorch; + + return EFI_SUCCESS; +} + +EFI_STATUS +LcdPlatformGetBpp ( + IN UINT32 ModeNumber, + OUT LCD_BPP * Bpp + ) +{ + if (ModeNumber >= LcdPlatformGetMaxMode ()) { + return EFI_INVALID_PARAMETER; + } + + *Bpp = mResolutions[ModeNumber].Bpp; + + return EFI_SUCCESS; +} diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf new file mode 100644 index 000000000000..c4c5adda896c --- /dev/null +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf @@ -0,0 +1,43 @@ +#/** @file +# +# Component description file for HdLcdArmVExpress library +# +# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = HdLcdArmVExpress + FILE_GUID = 56875b13-d4fc-4f20-8fe9-fc53762e299d + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = LcdPlatformLib + +[Sources.common] + HdLcdArmVExpress.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + MdePkg/MdePkg.dec + Platform/ARM/VExpressPkg/ArmVExpressPkg.dec + +[LibraryClasses] + ArmPlatformSysConfigLib + BaseLib + DxeServicesTableLib + +[Protocols] + gEfiEdidDiscoveredProtocolGuid # PRODUCES + gEfiEdidActiveProtocolGuid # PRODUCES + +[Pcd] + gVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId