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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id d8si13259161pgt.286.2017.11.22.02.08.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Nov 2017 02:08:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=L9XMHVCz; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id DEDF3220C162D; Wed, 22 Nov 2017 02:03:46 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AA098220C1608 for ; Wed, 22 Nov 2017 02:03:44 -0800 (PST) Received: by mail-wr0-x243.google.com with SMTP id u40so13975820wrf.10 for ; Wed, 22 Nov 2017 02:08:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YWMtn2HwEBm2pUd+mGLeBkvf0xEScgLQFEzc32R/E0w=; b=L9XMHVCzUBZgJBPR2EyKpyxXvKWr4TVrEcDYEeONq6TeuJoDcwkIlIkErk4ZDVEIfO cTnZV7pksHAPAnT7BqdZNGt7QnwzzT6kXUvjGauOQ0nZbYDUwzyFuLylqCIKxcD/AF6z psurUVTGK6rkII8qF5oDdVN64SFbXO4wSMvco= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YWMtn2HwEBm2pUd+mGLeBkvf0xEScgLQFEzc32R/E0w=; b=m+VnmPyODynQEdLxEMEM+kQHle1ICC8usOx+Euoic9c6X1eKjlNCyHhGXmss1xbQmM o7uQuP11ki6Gme/yyhQH22FQmbq96Jh+H+2/rX/7WxgGGdBsR1n6hd2OgYMiQhLKpRaE LsJ4QypE08m1gCgISasKmuri7gvf8kvL1AV/PtXgHNXDHJ3yg4KRzPRlbWvCI9zWCTMO DRKC7lAJNsPFlgLsrwx2ji9tE5dJlbpSRt835K0IPNpNepkWcCxxw1D/eUPEReF2P7Bn OvxcEgeKqXgnmDPsJFt4tRW9SHiAnMCH65sJpTaTNOfms/RBSBDWg2cUj9jgBb8GQQ4R 1gmw== X-Gm-Message-State: AJaThX4ebV6bbeVRcfDEQOedRX0azcU8j6qyctRHqrxcYvVl+2pa27j0 eiPBnwmIyx7/hBoV0ZbniOR8GZmXL4w= X-Received: by 10.223.201.2 with SMTP id m2mr12772731wrh.274.1511345279145; Wed, 22 Nov 2017 02:07:59 -0800 (PST) Received: from localhost.localdomain ([154.145.25.106]) by smtp.gmail.com with ESMTPSA id i192sm2761457wmf.46.2017.11.22.02.07.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Nov 2017 02:07:58 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, lersek@redhat.com Date: Wed, 22 Nov 2017 10:07:29 +0000 Message-Id: <20171122100731.24525-13-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171122100731.24525-1-ard.biesheuvel@linaro.org> References: <20171122100731.24525-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 12/14] ArmVirtPkg: create QemuVirtMemInfoLib version for ArmVirtQemu X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The QemuVirtMemInfoLib ArmVirtMemInfoLib implementation created for ArmVirtQemuKernel does exactly what we need for ArmVirtQemu, the only difference being that the latter is PrePeiCore based, and so it uses a different method to ensure that PcdSystemMemorySize is set when ArmVirtGetMemoryMap() is called. On ArmVirtQemu, we currently abuse the implied ordering guarantees provided by ArmPlatformLib, by implementing this as follows: ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf [ArmVirtPkg/ArmVirtQemu.dsc] InitializeMemory() [ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c] ArmPlatformInitializeSystemMemory() [ArmVirtPkg/Library/ArmVirtPlatformLib/Virt.c] // // set PcdSystemMemorySize from the DT // MemoryPeim() [ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c] InitMmu() [ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c] ArmPlatformGetVirtualMemoryMap() [ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c] // // consume PcdSystemMemorySize // Given that we are trying to get rid of ArmPlatformLib, or at least remove some of these API functions that are never used for their original purpose by any platforms, we need to move the PCD assignment elsewhere. So create a PEIM-only version of QemuVirtMemInfoLib especially for ArmVirtQemu, and add the PCD assignment code to its constructor. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/ArmVirtQemu.dsc | 3 + ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf | 58 +++++++++++ ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c | 106 ++++++++++++++++++++ 3 files changed, 167 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Laszlo Ersek diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index d14a0dd0d1d9..519c2ae2e939 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -67,6 +67,9 @@ [LibraryClasses.common] HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf !endif +[LibraryClasses.common.PEIM] + ArmVirtMemInfoLib|ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf + [LibraryClasses.common.UEFI_DRIVER] UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf new file mode 100644 index 000000000000..e574a47443d0 --- /dev/null +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf @@ -0,0 +1,58 @@ +#/* @file +# +# Copyright (c) 2011-2015, ARM Limited. All rights reserved. +# Copyright (c) 2014-2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = QemuVirtMemInfoLib + FILE_GUID = 0c4d10cf-d949-49b4-bd13-47a4ae22efce + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmVirtMemInfoLib|PEIM + CONSTRUCTOR = QemuVirtMemInfoPeiLibConstructor + +[Sources] + QemuVirtMemInfoLib.c + QemuVirtMemInfoPeiLibConstructor.c + +[Sources.ARM] + Arm/PhysAddrTop.S + +[Sources.AARCH64] + AArch64/PhysAddrTop.S + +[Packages] + ArmPkg/ArmPkg.dec + ArmVirtPkg/ArmVirtPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + DebugLib + FdtLib + PcdLib + MemoryAllocationLib + +[Pcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdSize + gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c new file mode 100644 index 000000000000..ef8ac6e018d1 --- /dev/null +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c @@ -0,0 +1,106 @@ +/** @file + + Copyright (c) 2014-2017, Linaro Limited. All rights reserved. + + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +RETURN_STATUS +EFIAPI +QemuVirtMemInfoPeiLibConstructor ( + VOID + ) +{ + VOID *DeviceTreeBase; + INT32 Node, Prev; + UINT64 NewBase, CurBase; + UINT64 NewSize, CurSize; + CONST CHAR8 *Type; + INT32 Len; + CONST UINT64 *RegProp; + RETURN_STATUS PcdStatus; + + NewBase = 0; + NewSize = 0; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // + // Make sure we have a valid device tree blob + // + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + // + // Look for the lowest memory node + // + for (Prev = 0;; Prev = Node) { + Node = fdt_next_node (DeviceTreeBase, Prev, NULL); + if (Node < 0) { + break; + } + + // + // Check for memory node + // + Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len); + if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) { + // + // Get the 'reg' property of this node. For now, we will assume + // two 8 byte quantities for base and size, respectively. + // + RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len); + if (RegProp != 0 && Len == (2 * sizeof (UINT64))) { + + CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp)); + CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1)); + + DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n", + __FUNCTION__, CurBase, CurBase + CurSize - 1)); + + if (NewBase > CurBase || NewBase == 0) { + NewBase = CurBase; + NewSize = CurSize; + } + } else { + DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n", + __FUNCTION__)); + } + } + } + + // + // Make sure the start of DRAM matches our expectation + // + ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase); + PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize); + ASSERT_RETURN_ERROR (PcdStatus); + + // + // We need to make sure that the machine we are running on has at least + // 128 MB of memory configured, and is currently executing this binary from + // NOR flash. This prevents a device tree image in DRAM from getting + // clobbered when our caller installs permanent PEI RAM, before we have a + // chance of marking its location as reserved or copy it to a freshly + // allocated block in the permanent PEI RAM in the platform PEIM. + // + ASSERT (NewSize >= SIZE_128MB); + ASSERT ( + (((UINT64)PcdGet64 (PcdFdBaseAddress) + + (UINT64)PcdGet32 (PcdFdSize)) <= NewBase) || + ((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize))); + + return RETURN_SUCCESS; +}