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[198.145.21.10]) by mx.google.com with ESMTPS id e8si2915776pgs.480.2017.11.17.08.09.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Nov 2017 08:09:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZomGUXMU; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C44E42035BB21; Fri, 17 Nov 2017 08:05:30 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 623DD2035BB1C for ; Fri, 17 Nov 2017 08:05:29 -0800 (PST) Received: by mail-wm0-x244.google.com with SMTP id r68so7495636wmr.3 for ; Fri, 17 Nov 2017 08:09:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aAe7bvypbVrUcCBMsziDXYOI2cMdEGHa3FLlqUVBDp0=; b=ZomGUXMUemmzPkQJZTH5MrahoproY6WnAcxGCnp8I99ImPTs7LreC+0YFflUs9JBWg +rP/0eLmabYI1yATxwq7PSMkAxd/IalotUpF7WC3D8hWqZENTN425HjJFPKbL04WS3uE qInyvsQfVjctfxqrB/awB2A98KL2+BW6IA6vI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aAe7bvypbVrUcCBMsziDXYOI2cMdEGHa3FLlqUVBDp0=; b=MKXuPJ7MlkVgEIKUMKcYsHZjO2Duq9laFolIKU6GBlp/3mgV5CGehDyCfefh5Ifcda Zvt54rwuc+ZqyoItsv4OM8iw+26XPHdOPCgRTxA7VFB1+U3W+Za9zpQFxTgWFrF/3HYk fqw3juWhG32emO2IR2xZ7P5KmsluLZmkVA664OsIN6e/jUy4ASkNwul7hVDJaNd0r+aX 0DSHF4XQSUxGgB86JUg0ReuGtwNLqLoMU3II/j31xkIbf/jNNpqLZqRGOsig5iT9uCuX LBY1SxNCvWIhlQZ925ZPHE6SzvYJHZnDPuuCh2d9/B3lel7vMj9kLEmt8OlixcdU8ltV 9nIg== X-Gm-Message-State: AJaThX4C9CY2NLRaDEkzm9D/GdHxY1nKslB3vn1jJcuhg020dgzh2Lvo mnqSmUFi2iW+stI0CIrHO1anHatJo+c= X-Received: by 10.28.232.130 with SMTP id f2mr2903852wmi.46.1510934978651; Fri, 17 Nov 2017 08:09:38 -0800 (PST) Received: from localhost.localdomain ([160.167.170.128]) by smtp.gmail.com with ESMTPSA id p42sm5575959wrb.28.2017.11.17.08.09.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Nov 2017 08:09:37 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, lersek@redhat.com Date: Fri, 17 Nov 2017 16:09:07 +0000 Message-Id: <20171117160913.17292-10-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171117160913.17292-1-ard.biesheuvel@linaro.org> References: <20171117160913.17292-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 09/15] ArmVirtPkg/ArmVirtPlatformLib: remove support for uncached mappings X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" QEMU/KVM has very little tolerance for using anything except writeback cacheable mappings of DRAM, so let's remove the 'feature' that allows us to select uncached mappings at build time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Laszlo Ersek diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c index d10548f86dfc..4368d05f76ef 100644 --- a/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c +++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/VirtMem.c @@ -22,10 +22,6 @@ // Number of Virtual Memory Map Descriptors #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5 -// DDR attributes -#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK -#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED - EFI_PHYSICAL_ADDRESS ArmGetPhysAddrTop ( VOID @@ -48,7 +44,6 @@ ArmPlatformGetVirtualMemoryMap ( IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap ) { - ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; ASSERT (VirtualMemoryMap != NULL); @@ -65,17 +60,11 @@ ArmPlatformGetVirtualMemoryMap ( return; } - if (FeaturePcdGet (PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } - // System DRAM VirtualMemoryTable[0].PhysicalBase = PcdGet64 (PcdSystemMemoryBase); VirtualMemoryTable[0].VirtualBase = VirtualMemoryTable[0].PhysicalBase; VirtualMemoryTable[0].Length = PcdGet64 (PcdSystemMemorySize); - VirtualMemoryTable[0].Attributes = CacheAttributes; + VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; DEBUG ((EFI_D_INFO, "%a: Dumping System DRAM Memory Map:\n" "\tPhysicalBase: 0x%lX\n" @@ -104,7 +93,7 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[3].PhysicalBase = FixedPcdGet64 (PcdFdBaseAddress); VirtualMemoryTable[3].VirtualBase = VirtualMemoryTable[3].PhysicalBase; VirtualMemoryTable[3].Length = FixedPcdGet32 (PcdFdSize); - VirtualMemoryTable[3].Attributes = CacheAttributes; + VirtualMemoryTable[3].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; // End of Table ZeroMem (&VirtualMemoryTable[4], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));