From patchwork Wed Nov 1 13:11:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 117690 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp868901qgn; Wed, 1 Nov 2017 06:11:57 -0700 (PDT) X-Google-Smtp-Source: ABhQp+RI9jSqTmKhHTLuyCxk51uSz4JCR+RoY7+/A1V93jH0e2Zlr/OgJ3ZzwJw8mje3rQdzFKst X-Received: by 10.99.172.83 with SMTP id z19mr6353143pgn.46.1509541917725; Wed, 01 Nov 2017 06:11:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509541917; cv=none; d=google.com; s=arc-20160816; b=gZMlcpBe6RUWe9GEpQpfaoD4WH5NPOglAbPBIJDEfRtKje+uDbJG8ZMH/ekCvMDlSi RZQsKcurl4PWqF8GMFtA+s/JDOYxeLWy+jkRa1o6jcrtqjOZ24590eLiSwCh8HN3uu78 QwSO3V/AJGeuDg4Lo4cWnE1ob/Su5gS+XotxKLLn5392A69huGMsg//wAoctOW280Cz0 ns9Z68WauyJfFcH98y27UWQzXlItf4lwmn7zX4RqbVVrD9XxCMgmEJagfZ14woi+v8Ds TsA824FBuSLo1omBhNLgt3bbL0/ZECv9diKz3rmedkaGPXnF/6DDaqNwwwTNaef5YJdI bnIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=pwSXHNdG8EruzPM3q1cCOZudC/BVnc01Rl44QvDVPOg=; b=ljU9Q0kxy3pC9kLO/yfeYQO21dCwBT35W+uXBuAkHPpRbr5qqUybSg0ery3b+aN2Is LTVALM2c0luhWfOT4wxd9rwMpY1BTRfyAYntUKtERgiNmbkvpf0tNBUh3UrCk58HJUc/ PA6p1jX/F5ZYC2/IalXSux6pFxP/I/2Ep8z7Ptv3lMG11c6F3oB7qTpa+qS2CS84RDsD s1ixjnaQd+oBmtDPHwfShc3EysMeUWtRsUVmYbK9SWgh8+toUNLTAJkAEsVTNpTj6Miu DLUcdJjtBI9L4vvFxRCpNnj39EfcC+XMjWQmfmCh7b/+tIcjN+gPQL+oxDFqHKRj1EiP wOFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Tk801RTy; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id t28si1017801pfg.6.2017.11.01.06.11.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Nov 2017 06:11:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Tk801RTy; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 51CD121FCA28B; Wed, 1 Nov 2017 06:08:04 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::242; helo=mail-wm0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6145821FCA285 for ; Wed, 1 Nov 2017 06:08:02 -0700 (PDT) Received: by mail-wm0-x242.google.com with SMTP id y83so4806794wmc.4 for ; Wed, 01 Nov 2017 06:11:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=REWtqC1/4x97tvn0W7Onr49hF10rTdby1qJIA0jJQ04=; b=Tk801RTyX2/TLxUtdCKnmZLRC61ZwdY22M8jVJvjS9Od4neiGKN8k+X2039hKpEzt9 VYzg3hA9/1MaVt+f/iIoB44VB0yrvvL3vYH+i7s7Wjr7mCbxrWr6LTMMI7W8hWL99WuP 4A/JjE7/BDaD4DCfH8dG0wkUhyacfPMfEHYWw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=REWtqC1/4x97tvn0W7Onr49hF10rTdby1qJIA0jJQ04=; b=eD5DBcdAKbJAZEAFIV2sm1Ux4Fg6OyFsb+tbdITf70KqwGmc1kZx0ODALGGfmbvhVg Qz4nym/ZAKk3gaA7GJjqfb6KSPBOGkCGmE7Y1mhwNhmnqtCNcFRd2OPp4vHjwebIuPag wzBd8zkRzfGuaFnuBGxL7JKTlJRbULGPe5c2W1sqJjvn7oEjBALn3NZwSmP5AojBnzDf 0YDCX4ymdf+Yh3YEGQVl4gtjSXUIvEcMk0qF67t4J++kzTZW/uKsgL4erQp0WU7keOkp VPeL9SWIjhPvn2nGjIgme3Dutga5r+9HNubiEnASmTOAochtweypsL8qh35nk9gGLsMM uAyw== X-Gm-Message-State: AMCzsaUpjwyspn7agku0VrUpyHzlZQd+7onW+ULnXXx6zXiG4/RUtG/l j1YRG8sfGASB+qVruJzPXYRSY+cT44E= X-Received: by 10.28.136.146 with SMTP id k140mr215135wmd.147.1509541913617; Wed, 01 Nov 2017 06:11:53 -0700 (PDT) Received: from localhost.localdomain ([105.129.222.2]) by smtp.gmail.com with ESMTPSA id o13sm636749wrc.10.2017.11.01.06.11.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Nov 2017 06:11:52 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 1 Nov 2017 13:11:44 +0000 Message-Id: <20171101131145.16459-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171101131145.16459-1-ard.biesheuvel@linaro.org> References: <20171101131145.16459-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/2] EmbeddedPkg: introduce GPIO PPI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniel.thompson@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Introduce a PPI counterpart of the existing 'embedded GPIO' protocol, so we can manipulate GPIOs from PEI modules. This allows things like setting the boot mode based on a DIP switch setting. Note that the naming is slightly awkward, as there is nothing 'embedded' about a GPIO, but given that the DXE protocol already resides here and has the 'embedded' prefix, it makes sense to retain uniformity. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- EmbeddedPkg/EmbeddedPkg.dec | 3 + EmbeddedPkg/Include/Ppi/EmbeddedGpio.h | 151 ++++++++++++++++++++ 2 files changed, 154 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index 52482af13aeb..cb07d3ece685 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -86,6 +86,9 @@ [Protocols.common] gPlatformGpioProtocolGuid = { 0x52ce9845, 0x5af4, 0x43e2, {0xba, 0xfd, 0x23, 0x08, 0x12, 0x54, 0x7a, 0xc2 }} gAndroidBootImgProtocolGuid = { 0x9859bb19, 0x407c, 0x4f8b, {0xbc, 0xe1, 0xf8, 0xda, 0x65, 0x65, 0xf4, 0xa5 }} +[Ppis] + gEdkiiEmbeddedGpioPpiGuid = { 0x21c3b115, 0x4e0b, 0x470c, { 0x85, 0xc7, 0xe1, 0x05, 0xa5, 0x75, 0xc9, 0x7b }} + [PcdsFeatureFlag.common] gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|FALSE|BOOLEAN|0x00000001 gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE|BOOLEAN|0x00000002 diff --git a/EmbeddedPkg/Include/Ppi/EmbeddedGpio.h b/EmbeddedPkg/Include/Ppi/EmbeddedGpio.h new file mode 100644 index 000000000000..d87c860a17fb --- /dev/null +++ b/EmbeddedPkg/Include/Ppi/EmbeddedGpio.h @@ -0,0 +1,151 @@ +/** @file + + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EMBEDDED_GPIO_PPI_H__ +#define __EMBEDDED_GPIO_PPI_H__ + +// +// Protocol interface structure +// +typedef struct _EMBEDDED_GPIO_PPI EMBEDDED_GPIO_PPI; + +// +// Data Types +// +typedef UINTN EMBEDDED_GPIO_PIN; + +#define GPIO(Port, Pin) ((EMBEDDED_GPIO_PIN)(((Port) << (16)) | (Pin))) +#define GPIO_PIN(x) ((EMBEDDED_GPIO_PIN)(x) & (0xFFFF)) +#define GPIO_PORT(x) ((EMBEDDED_GPIO_PIN)(x) >> (16)) + +typedef enum { + GPIO_MODE_INPUT = 0x00, + GPIO_MODE_OUTPUT_0 = 0x0E, + GPIO_MODE_OUTPUT_1 = 0x0F, + GPIO_MODE_SPECIAL_FUNCTION_2 = 0x02, + GPIO_MODE_SPECIAL_FUNCTION_3 = 0x03, + GPIO_MODE_SPECIAL_FUNCTION_4 = 0x04, + GPIO_MODE_SPECIAL_FUNCTION_5 = 0x05, + GPIO_MODE_SPECIAL_FUNCTION_6 = 0x06, + GPIO_MODE_SPECIAL_FUNCTION_7 = 0x07 +} EMBEDDED_GPIO_MODE; + +typedef enum { + GPIO_PULL_NONE, + GPIO_PULL_UP, + GPIO_PULL_DOWN +} EMBEDDED_GPIO_PULL; + +// +// Function Prototypes +// + +/** + + Gets the state of a GPIO pin + + @param This Pointer to protocol + @param Gpio Which pin to read + @param Value State of the pin + + @retval EFI_SUCCESS GPIO state returned in Value + @retval EFI_INVALID_PARAMETER Value is NULL + @retval EFI_NOT_FOUND Pin does not exit + +**/ +typedef +EFI_STATUS +(EFIAPI *EMBEDDED_GPIO_GET) ( + IN EMBEDDED_GPIO_PPI *This, + IN EMBEDDED_GPIO_PIN Gpio, + OUT UINTN *Value + ); + +/** + + Sets the state of a GPIO pin + + @param This Pointer to protocol + @param Gpio Which pin to modify + @param Mode Mode to set + + @retval EFI_SUCCESS GPIO set as requested + @retval EFI_INVALID_PARAMETER Invalid mode + @retval EFI_NOT_FOUND Pin does not exit + +**/ +typedef +EFI_STATUS +(EFIAPI *EMBEDDED_GPIO_SET) ( + IN EMBEDDED_GPIO_PPI *This, + IN EMBEDDED_GPIO_PIN Gpio, + IN EMBEDDED_GPIO_MODE Mode + ); + + +/** + + Gets the mode (function) of a GPIO pin + + @param This Pointer to protocol + @param Gpio Which pin + @param Mode Pointer to output mode value + + @retval EFI_SUCCESS Mode value retrieved + @retval EFI_INVALID_PARAMETER Mode is NULL + @retval EFI_NOT_FOUND Pin does not exit + +**/ +typedef +EFI_STATUS +(EFIAPI *EMBEDDED_GPIO_GET_MODE) ( + IN EMBEDDED_GPIO_PPI *This, + IN EMBEDDED_GPIO_PIN Gpio, + OUT EMBEDDED_GPIO_MODE *Mode + ); + + +/** + + Sets the pull-up / pull-down resistor of a GPIO pin + + @param This Pointer to PPI + @param Gpio Port/pin index + @param Pull The pullup/pulldown mode to set + + @retval EFI_SUCCESS Mode was set + @retval EFI_NOT_FOUND Pin does not exist + @retval EFI_UNSUPPORTED Action not supported + +**/ +typedef +EFI_STATUS +(EFIAPI *EMBEDDED_GPIO_SET_PULL) ( + IN EMBEDDED_GPIO_PPI *This, + IN EMBEDDED_GPIO_PIN Gpio, + IN EMBEDDED_GPIO_PULL Direction + ); + + +struct _EMBEDDED_GPIO_PPI { + EMBEDDED_GPIO_GET Get; + EMBEDDED_GPIO_SET Set; + EMBEDDED_GPIO_GET_MODE GetMode; + EMBEDDED_GPIO_SET_PULL SetPull; +}; + +extern EFI_GUID gEmbeddedGpioPpiGuid; + +#endif