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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id f10si1294995pge.194.2017.06.28.03.51.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jun 2017 03:51:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=RLkzoBRO; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7CA3121A00ADA; Wed, 28 Jun 2017 03:49:43 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22c.google.com (mail-wm0-x22c.google.com [IPv6:2a00:1450:400c:c09::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 716FF21A00AD9 for ; Wed, 28 Jun 2017 03:49:41 -0700 (PDT) Received: by mail-wm0-x22c.google.com with SMTP id 62so49488278wmw.1 for ; Wed, 28 Jun 2017 03:51:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=UJQY/hiunr2hDbYIIYyTGU72ITh8L8DPBDKGEhiuiN0=; b=RLkzoBRORQlYWVm9W4ZauczzEkPEQEG9OWtxBQZJiuQn1ss/j2BFm/H1yBukSBmd46 NEyrzZrkqSirbmpqU8+jnJ0Rc/bbdNZIggKC5LdM7UxeEBoaNyXmAwc0XtVD0nZSCJbD dNYHYGFVlQlG0tkBrM4gQYkajDPmg/7dtY3do= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=UJQY/hiunr2hDbYIIYyTGU72ITh8L8DPBDKGEhiuiN0=; b=YvyGXC7M9nx0RVwiKDymYYe2zZZpfvBZvSfzAJY4sUTTgD5RbLnAVdxtR2ROu3k81v 7sW+9IwZgDUbDFeJwaKd0rQRmtujpHDtHcxAy5+RGLIr3Q28KHlxN71XHEtFDS3VQ4Fg zHGvuWQJ9qlT6dSJMUCBnQ7caBEomU1EuvhNiZDE2jcuPzfkBZcEzSE7yUOK3Dkur0CT iTYy7feT7Fa+WL7FG0VGPUknNEZb4Xq7YmP8KHtC6Crh+nX1nMSW8OMMbuSTZVgwsVmk OqY7sKjvc+udWnBsGWj3r6dcomBJ0v6ZwDG42iwAWThyDj34gMdICc9rkjkdLZDvpM+z lTfA== X-Gm-Message-State: AKS2vOxkNyCsZJEYBxg+9XYLFxFbP5DHmDtMMxFOsoSChfmEopbUaLK8 L1kc/lp46T6X426JfJ/tPA== X-Received: by 10.28.154.17 with SMTP id c17mr7104454wme.35.1498647071394; Wed, 28 Jun 2017 03:51:11 -0700 (PDT) Received: from localhost.localdomain ([105.133.250.69]) by smtp.gmail.com with ESMTPSA id q24sm1201980wra.16.2017.06.28.03.51.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jun 2017 03:51:10 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, star.zeng@intel.com, eric.dong@intel.com Date: Wed, 28 Jun 2017 10:51:01 +0000 Message-Id: <20170628105101.31525-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 Subject: [edk2] [PATCH v3] MdeModulePkg/AtaAtapiPassThru: relax PHY detect timeout X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The SATA spec mandates that link detection by the PHY completes within 10 ms after receiving a reset signal. However, there is no obligation to uphold this requirement at the driver end as strictly as we do, and as it turns out, some combinations of host and device (e.g., Samsung 850 EVO connected to a LeMaker Cello) are only borderline compliant, which means the device is not detected reliably. So let's allow for a bit of margin, and increase the PHY detect timeout value to 15 ms. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- v3: update comment AhciModeInitialization() again MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 3 +-- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 ++- 2 files changed, 3 insertions(+), 3 deletions(-) -- 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Star Zeng Signed-off-by: Ard Biesheuvel diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 4d01c1dd7fca..b954de81015e 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -2376,8 +2376,7 @@ AhciModeInitialization ( AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE); // - // Wait no longer than 10 ms to wait the Phy to detect the presence of a device. - // It's the requirment from SATA1.0a spec section 5.2. + // Wait for the Phy to detect the presence of a device. // PhyDetectDelay = EFI_AHCI_BUS_PHY_DETECT_TIMEOUT; Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS; diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h index 6401fb2e9fcd..809bcc307fc4 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -41,8 +41,9 @@ typedef union { // // Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms. +// Add a bit of margin for robustness. // -#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10 +#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15 // // Refer SATA1.0a spec, the FIS enable time should be less than 500ms. //