From patchwork Fri Mar 31 08:37:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 96344 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp620363qgd; Fri, 31 Mar 2017 01:37:58 -0700 (PDT) X-Received: by 10.84.216.81 with SMTP id f17mr2109882plj.170.1490949478156; Fri, 31 Mar 2017 01:37:58 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id 71si4533613pge.184.2017.03.31.01.37.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 Mar 2017 01:37:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3E58C21A04839; Fri, 31 Mar 2017 01:37:57 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wr0-x231.google.com (mail-wr0-x231.google.com [IPv6:2a00:1450:400c:c0c::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9080621A04830 for ; Fri, 31 Mar 2017 01:37:55 -0700 (PDT) Received: by mail-wr0-x231.google.com with SMTP id w11so94144272wrc.3 for ; Fri, 31 Mar 2017 01:37:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ComdDsk64P7WwdJV9m47Bgrf6rRrPCaa7y7aVRgUPY4=; b=fLqWrkvmBPbSC+ASrqeJBppkcYN/oneH8N665BOMDbflApUheIwmRPy9M4Zrcd73tD Vm85Jvg6lbyNxdTd8bzSC9OXN2Iz9tYeezF1bHc9ikHHswzxO3/8A8t2ZJ7BJULhQQal Wqt0uP2IQn2C24cS0BG7neaXSey5sZJB0ZhVI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ComdDsk64P7WwdJV9m47Bgrf6rRrPCaa7y7aVRgUPY4=; b=TC7eih9c0QNQWhcV/8KIYHx8r5ZiA2VyqfxodGFfyG+xN9hAl31k5B9gDH5tDHneK7 CXa2if2smVWlF+URlcB1jh1e8VPVc0+QRIarYqKGZdnRJod2zdsnm+g4iGNEgTPh5a0T IMLbqM4FW5l66zPvgVjYUy8fd3ZrbcheoM2yjqxci/2EOxbnuEFGW5Rqkger3JShoZ/r /pJYvM3LLkWud/mpYK4jtZmdZUnbOcFlIbj6v/sgSt5HY80p+8iZqfmgAf+BxnMSacI3 5iMhUHaMoKZJO2hWH17G2igW0HhuIH7kV852mB50IP9bph16Yzku5vo4h/dAeFs1rBzj 6nig== X-Gm-Message-State: AFeK/H0xNs3Bwv482y+mZI8CeYd85b+CfoJ/eQA/R3IlBn7KYwXGd6559BlIL5spknZEtng2 X-Received: by 10.223.139.196 with SMTP id w4mr1441569wra.70.1490949473204; Fri, 31 Mar 2017 01:37:53 -0700 (PDT) Received: from localhost.localdomain ([160.171.180.74]) by smtp.gmail.com with ESMTPSA id z88sm2602547wrb.1.2017.03.31.01.37.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 Mar 2017 01:37:52 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Fri, 31 Mar 2017 09:37:44 +0100 Message-Id: <20170331083744.3964-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 Subject: [edk2] [PATCH] BaseTools/GCC AARCH64: force disable PIC code generation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, lersek@redhat.com, liming.gao@intel.com, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" As a security measure, some distro toolchains now default to PIC code generation, allowing executables (as opposed to shared libraries) using the objects to be built as PIE binaries, which can be loaded at a random virtual offset. However, our ELF to PE/COFF generation code does not deal with the resulting relocation types (i.e., GOT based), and so the use of PIC code leads to GenFw errors. Given that a) our non-PIC PE/COFF executables are already relocatable, b) PIC code leads to all symbol references to be indirected via GOT entries containing absolute addresses, each requiring an entry in the relocation table, c) the AArch64 ISA makes it perfectly feasible to built PIE executables from non-PIC code, there is absolutely no upside to using PIC code for building EDK2 modules, and so we're better off simply disabling it unconditionally. Note that when running under the OS, the GOT has an additional advantage, i.e., that all .text/.rodata pages remain clean and so can be shared between processes. This does not apply to the UEFI environment, however. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c | 67 ---------------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf | 35 -------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S | 27 ------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c | 84 -------------------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf | 38 --------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.c | 41 ---------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf | 27 ------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 23 ------ ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.asm | 29 ------- ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c | 76 ------------------ ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf | 37 --------- ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c | 39 --------- ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf | 34 -------- BaseTools/Conf/tools_def.template | 2 +- 14 files changed, 1 insertion(+), 558 deletions(-) -- 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c deleted file mode 100644 index e05e8abf3949..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c +++ /dev/null @@ -1,67 +0,0 @@ -/** @file - - Copyright (c) 2011-2012, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include -#include -#include - -#include - -#define A15_FEATURE_SMP (1<<6) - -VOID -ArmCpuSetup ( - IN UINTN MpId - ) -{ - // Check if Architectural Timer frequency is valid number (should not be 0) - ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz)); - ASSERT(ArmIsArchTimerImplemented () != 0); - - // Enable SWP instructions - ArmEnableSWPInstruction (); - - // Enable program flow prediction, if supported. - ArmEnableBranchPrediction (); - - // Note: System Counter frequency can only be set in Secure privileged mode, - // if security extensions are implemented. - ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz)); - - if (ArmIsMpCore()) { - // Turn on SMP coherency - ArmSetAuxCrBit (A15_FEATURE_SMP); - } - -} - - -VOID -ArmCpuSetupSmpNonSecure ( - IN UINTN MpId - ) -{ - /*// Make the SCU accessible in Non Secure world - if (ArmPlatformIsPrimaryCore (MpId)) { - ScuBase = ArmGetScuBaseAddress(); - - // Allow NS access to SCU register - MmioOr32 (ScuBase + A9_SCU_SACR_OFFSET, 0xf); - // Allow NS access to Private Peripherals - MmioOr32 (ScuBase + A9_SCU_SSACR_OFFSET, 0xfff); - }*/ -} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf deleted file mode 100644 index bd9a733b46cd..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf +++ /dev/null @@ -1,35 +0,0 @@ -#/* @file -# Copyright (c) 2011-2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCortexA15Lib - FILE_GUID = 501b1c8f-21d5-4ef5-a565-435b7f0aae2d - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmCpuLib - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - ArmLib - ArmGenericTimerCounterLib - PcdLib - -[Sources.common] - ArmCortexA15Lib.c - -[FixedPcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S deleted file mode 100644 index ba3d48f11f6d..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S +++ /dev/null @@ -1,27 +0,0 @@ -#------------------------------------------------------------------------------ -# -# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#------------------------------------------------------------------------------ - -#include - -ASM_FUNC(ArmReadCpuExCr) - mrs x0, S3_1_c15_c2_1 - ret - -ASM_FUNC(ArmWriteCpuExCr) - msr S3_1_c15_c2_1, x0 - dsb sy - isb - ret - -ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c deleted file mode 100644 index 3d39acd50c04..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c +++ /dev/null @@ -1,84 +0,0 @@ -/** @file - - Copyright (c) 2011-2014, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include -#include -#include - -#include - -VOID -ArmCpuSetup ( - IN UINTN MpId - ) -{ - // Check if Architectural Timer frequency is valid number (should not be 0) - ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz)); - ASSERT (ArmIsArchTimerImplemented () != 0); - - // Note: System Counter frequency can only be set in Secure privileged mode, - // if security extensions are implemented. - ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz)); - - if (ArmIsMpCore ()) { - // Turn on SMP coherency - ArmSetCpuExCrBit (A5X_FEATURE_SMP); - } - - // - // If CPU is CortexA57 r0p0 apply Errata workarounds - // - if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) == - ((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) { - - // Errata 806969: DisableLoadStoreWB (1ULL << 49) - // Errata 813420: Execute Data Cache clean as Data Cache clean/invalidate (1ULL << 44) - // Errata 814670: disable DMB nullification (1ULL << 58) - ArmSetCpuActlrBit ( (1ULL << 49) | (1ULL << 44) | (1ULL << 58) ); - } -} - -VOID -ArmCpuSetupSmpNonSecure ( - IN UINTN MpId - ) -{ -} - -VOID -EFIAPI -ArmSetCpuExCrBit ( - IN UINT64 Bits - ) -{ - UINT64 Value; - Value = ArmReadCpuExCr (); - Value |= Bits; - ArmWriteCpuExCr (Value); -} - -VOID -EFIAPI -ArmUnsetCpuExCrBit ( - IN UINT64 Bits - ) -{ - UINT64 Value; - Value = ArmReadCpuExCr (); - Value &= ~Bits; - ArmWriteCpuExCr (Value); -} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf deleted file mode 100644 index e27022032624..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf +++ /dev/null @@ -1,38 +0,0 @@ -#/* @file -# Copyright (c) 2011-2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCortexA5xLib - FILE_GUID = 08107938-85d8-4967-ba65-b673f708fcb2 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmCpuLib - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - ArmLib - ArmGenericTimerCounterLib - PcdLib - -[Sources.common] - ArmCortexA5xLib.c - -[Sources.AARCH64] - AArch64/ArmCortexA5xHelper.S | GCC - -[FixedPcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.c deleted file mode 100644 index e0ba1fab8d90..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.c +++ /dev/null @@ -1,41 +0,0 @@ -/** @file - - Copyright (c) 2011, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -#include - -VOID -ArmCpuSetup ( - IN UINTN MpId - ) -{ - // Enable SWP instructions - ArmEnableSWPInstruction (); - - // Enable program flow prediction, if supported. - ArmEnableBranchPrediction (); -} - -VOID -ArmCpuSetupSmpNonSecure ( - IN UINTN MpId - ) -{ - // The CortexA8 is a Unicore CPU. We must not initialize SMP for Non Secure Accesses - ASSERT(0); -} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf deleted file mode 100644 index 890958a7e395..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf +++ /dev/null @@ -1,27 +0,0 @@ -#/* @file -# Copyright (c) 2011, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCortexA8Lib - FILE_GUID = 34b5745e-f575-44ce-ba2e-df0886807c16 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmCpuLib - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[Sources.common] - ArmCortexA8Lib.c diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S deleted file mode 100644 index 365d57d7e8bd..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S +++ /dev/null @@ -1,23 +0,0 @@ -// -// Copyright (c) 2011-2012, ARM Limited. All rights reserved. -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - -#include - -// IN None -// OUT r0 = SCU Base Address -ASM_FUNC(ArmGetScuBaseAddress) - // Read Configuration Base Address Register. ArmCBar cannot be called to get - // the Configuration BAR as a stack is not necessary setup. The SCU is at the - // offset 0x0000 from the Private Memory Region. - mrc p15, 4, r0, c15, c0, 0 - bx lr diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.asm b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.asm deleted file mode 100644 index 882f25b780cd..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.asm +++ /dev/null @@ -1,29 +0,0 @@ -// -// Copyright (c) 2011-2012, ARM Limited. All rights reserved. -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - - INCLUDE AsmMacroExport.inc - INCLUDE AsmMacroIoLib.inc - - - PRESERVE8 - -// IN None -// OUT r0 = SCU Base Address - RVCT_ASM_EXPORT ArmGetScuBaseAddress - // Read Configuration Base Address Register. ArmCBar cannot be called to get - // the Configuration BAR as a stack is not necessary setup. The SCU is at the - // offset 0x0000 from the Private Memory Region. - mrc p15, 4, r0, c15, c0, 0 - bx lr - - END diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c deleted file mode 100644 index 4fc6a08b9a94..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c +++ /dev/null @@ -1,76 +0,0 @@ -/** @file - - Copyright (c) 2011-2012, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include -#include -#include - -#include - -VOID -ArmEnableScu ( - VOID - ) -{ - INTN ScuBase; - - ScuBase = ArmGetScuBaseAddress(); - - // Invalidate all: write -1 to SCU Invalidate All register - MmioWrite32(ScuBase + A9_SCU_INVALL_OFFSET, 0xffffffff); - // Enable SCU - MmioWrite32(ScuBase + A9_SCU_CONTROL_OFFSET, 0x1); -} - -VOID -ArmCpuSetup ( - IN UINTN MpId - ) -{ - // Enable SWP instructions - ArmEnableSWPInstruction (); - - // Enable program flow prediction, if supported. - ArmEnableBranchPrediction (); - - // If MPCore then Enable the SCU - if (ArmIsMpCore()) { - // Signals the Cortex-A9 processor is taking part in coherency - ArmSetAuxCrBit (A9_FEATURE_SMP); - - ArmEnableScu (); - } -} - - -VOID -ArmCpuSetupSmpNonSecure ( - IN UINTN MpId - ) -{ - INTN ScuBase; - - // Make the SCU accessible in Non Secure world - if (ArmPlatformIsPrimaryCore (MpId)) { - ScuBase = ArmGetScuBaseAddress(); - - // Allow NS access to SCU register - MmioOr32 (ScuBase + A9_SCU_SACR_OFFSET, 0xf); - // Allow NS access to Private Peripherals - MmioOr32 (ScuBase + A9_SCU_SSACR_OFFSET, 0xfff); - } -} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf deleted file mode 100644 index 236b0bcb6ca7..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf +++ /dev/null @@ -1,37 +0,0 @@ -#/* @file -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCortexA9Lib - FILE_GUID = c9709ea3-1beb-4806-889a-8a1d5e5e1697 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmCpuLib - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - ArmLib - ArmPlatformLib - IoLib - PcdLib - -[Sources.common] - ArmCortexA9Lib.c - ArmCortexA9Helper.asm | RVCT - ArmCortexA9Helper.S | GCC - diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c deleted file mode 100644 index ee2c057fe099..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c +++ /dev/null @@ -1,39 +0,0 @@ -/** @file - - Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -#include - -VOID -ArmCpuSetup ( - IN UINTN MpId - ) -{ - // Note: System Counter frequency can only be set in Secure privileged mode, - // if security extensions are implemented. - ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz)); -} - - -VOID -ArmCpuSetupSmpNonSecure ( - IN UINTN MpId - ) -{ - // Nothing to do -} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf deleted file mode 100644 index 1c8122082d9d..000000000000 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf +++ /dev/null @@ -1,34 +0,0 @@ -#/* @file -# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCortexAEMv8Lib - FILE_GUID = 8ab5a7e3-86b1-4dd3-a092-09ee801e774b - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmCpuLib - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - ArmGenericTimerCounterLib - PcdLib - -[Sources.common] - ArmCortexAEMv8Lib.c - -[FixedPcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 0aabdeb2d973..2c5cd5808912 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -4341,7 +4341,7 @@ DEFINE GCC_X64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mno-red-zone -Wno-ad DEFINE GCC_IPF_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -minline-int-divide-min-latency DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-builtin -Wno-address -mthumb -mfloat-abi=soft DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access -DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -fno-builtin -Wno-address -fno-asynchronous-unwind-tables +DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -fno-builtin -Wno-address -fno-asynchronous-unwind-tables -fno-pic DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds