From patchwork Wed Oct 12 10:09:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 77539 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp377469qge; Wed, 12 Oct 2016 03:09:17 -0700 (PDT) X-Received: by 10.98.159.130 with SMTP id v2mr505915pfk.48.1476266956966; Wed, 12 Oct 2016 03:09:16 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id x28si5122811pgc.11.2016.10.12.03.09.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Oct 2016 03:09:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 679741A1EC5; Wed, 12 Oct 2016 03:09:15 -0700 (PDT) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CBCF21A1E98 for ; Wed, 12 Oct 2016 03:09:13 -0700 (PDT) Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 65F8E335F97; Wed, 12 Oct 2016 10:09:13 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-37.phx2.redhat.com [10.3.116.37]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9CA99ve006514; Wed, 12 Oct 2016 06:09:12 -0400 From: Laszlo Ersek To: edk2-devel-01 Date: Wed, 12 Oct 2016 12:09:02 +0200 Message-Id: <20161012100905.6296-3-lersek@redhat.com> In-Reply-To: <20161012100905.6296-1-lersek@redhat.com> References: <20161012100905.6296-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 12 Oct 2016 10:09:13 +0000 (UTC) Subject: [edk2] [PATCH 2/5] OvmfPkg/QemuVideoDxe: drop QEMU_VIDEO_CIRRUS_MODES.RefreshRate X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Justen MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Thanks to the previous patch, this field is also unnecessary now. Remove it. The patch is best reviewed with "git show --word-diff". Cc: Jordan Justen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/QemuVideoDxe/Qemu.h | 1 - OvmfPkg/QemuVideoDxe/Initialize.c | 16 ++++++++-------- 2 files changed, 8 insertions(+), 9 deletions(-) -- 2.9.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/OvmfPkg/QemuVideoDxe/Qemu.h b/OvmfPkg/QemuVideoDxe/Qemu.h index 7c1f80c772e3..1246b74d4955 100644 --- a/OvmfPkg/QemuVideoDxe/Qemu.h +++ b/OvmfPkg/QemuVideoDxe/Qemu.h @@ -129,11 +129,10 @@ typedef struct { /// typedef struct { UINT32 Width; UINT32 Height; UINT32 ColorDepth; - UINT32 RefreshRate; UINT8 *CrtcSettings; UINT16 *SeqSettings; UINT8 MiscSetting; } QEMU_VIDEO_CIRRUS_MODES; diff --git a/OvmfPkg/QemuVideoDxe/Initialize.c b/OvmfPkg/QemuVideoDxe/Initialize.c index b12253ba5892..de74fd65ec67 100644 --- a/OvmfPkg/QemuVideoDxe/Initialize.c +++ b/OvmfPkg/QemuVideoDxe/Initialize.c @@ -142,18 +142,18 @@ UINT16 Seq_1024_768_32bpp_60[15] = { /// /// Table of supported video modes /// QEMU_VIDEO_CIRRUS_MODES QemuVideoCirrusModes[] = { -// { 640, 480, 8, 60, Crtc_640_480_256_60, Seq_640_480_256_60, 0xe3 }, -// { 800, 600, 8, 60, Crtc_800_600_256_60, Seq_800_600_256_60, 0xef }, - { 640, 480, 32, 60, Crtc_640_480_32bpp_60, Seq_640_480_32bpp_60, 0xef }, - { 800, 600, 32, 60, Crtc_800_600_32bpp_60, Seq_800_600_32bpp_60, 0xef }, -// { 1024, 768, 8, 60, Crtc_1024_768_256_60, Seq_1024_768_256_60, 0xef } - { 1024, 768, 24, 60, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef } -// { 1024, 768, 32, 60, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef } -// { 960, 720, 32, 60, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef } +// { 640, 480, 8, Crtc_640_480_256_60, Seq_640_480_256_60, 0xe3 }, +// { 800, 600, 8, Crtc_800_600_256_60, Seq_800_600_256_60, 0xef }, + { 640, 480, 32, Crtc_640_480_32bpp_60, Seq_640_480_32bpp_60, 0xef }, + { 800, 600, 32, Crtc_800_600_32bpp_60, Seq_800_600_32bpp_60, 0xef }, +// { 1024, 768, 8, Crtc_1024_768_256_60, Seq_1024_768_256_60, 0xef } + { 1024, 768, 24, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef } +// { 1024, 768, 32, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef } +// { 960, 720, 32, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef } }; #define QEMU_VIDEO_CIRRUS_MODE_COUNT \ (sizeof (QemuVideoCirrusModes) / sizeof (QemuVideoCirrusModes[0]))