From patchwork Thu May 24 00:46:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 136688 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1556024lji; Wed, 23 May 2018 17:47:01 -0700 (PDT) X-Google-Smtp-Source: AB8JxZr95yLf0dZe1UglannABs+BPie+tVo/affkrytgw6aZwsKmudDC/WjSGs5zXbjGK8Tm4Dpx X-Received: by 2002:a65:65ce:: with SMTP id y14-v6mr3980507pgv.270.1527122821137; Wed, 23 May 2018 17:47:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527122821; cv=none; d=google.com; s=arc-20160816; b=saNTGnhpFz4iwAqBPQwPZYBR2a2HFMAhJbnxEazkiEBYFyKQoyA+OWmiOvCAmmff57 1FzdYObnoO4od5pQTpbqkGAz7me6mq590Gg1qAm8/yoVFgDF9UWqZ+zoGoCEhKY4MYBH VIx2HTf2jifonEd+Wl2IXQj0Lhz7rNpvG6f6kqsbnH0xmnEYKGfKfldMSyYxMY4AbcHg NSQoeBl+u9uEgeYIG9/z4uD4i1R0V9HXVHf6N7ySuf0xC1A5twm9oZBH3P6eAz4/MYhn 9VwNl8VP3rzmjwfFP6eRAYT+Ww8O8luBSeLNH5ni3L9lPofp7mHhTGIXNubqBeRJiKwG CA3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=Gq8nnAxkDLCqcZ7SVQWEBMJKeCaGvKCHSOk6eKhpCzk=; b=fOlnVxxN56+yX64ThT06gzjXoLVN3AIml21pOnP0WHCZBxqpIwi9S0KvV9JHKe5zgg wdRZxLM9jLt3wp7/tiPsrc9f3AouoHu1VsLByGn0wpLeSOE5Cf58o7SRDZYrm4JxemT6 f4Mhq34RlgSriP8W0VprZjYEl4/krMOOGMeoFtLa4yW/xL44ZjYIhSZDfi7zw91jx9fk 38s+MonmsGUMSgs8RNPS9EDdaQQp3sz/LK1xaFdISmb8eoJE84p22vmiLzAbO4Qc4uV5 RNdZ6yjDEkW8CaKOLE8n5oMCtnJBMBtSaOYldDch7hPPevHjb2vB20519W6jYsYdk+5I AYrA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=A0i54okO; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id b60-v6si20101510plc.270.2018.05.23.17.47.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 17:47:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=A0i54okO; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 220F72083775C; Wed, 23 May 2018 17:46:59 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::243; helo=mail-pl0-x243.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x243.google.com (mail-pl0-x243.google.com [IPv6:2607:f8b0:400e:c01::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F34E1207E6368 for ; Wed, 23 May 2018 17:46:57 -0700 (PDT) Received: by mail-pl0-x243.google.com with SMTP id u6-v6so14026751pls.9 for ; Wed, 23 May 2018 17:46:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZY/2EzF/sWpldHMQ9hGWNGfd93/ydDKoQomiJPrqbho=; b=A0i54okO1VYjSc83WsIAK7U9AoObFCFoK265zTQlpixmKU24IQgylTWKTfZ3OqKAsk 3JQPnyt+U+6XtIIXX7oxrITBnSNpr/6IPYJxDHZMmp49iRByUvyUHVeqOFmQoMfJIGB1 65Yi4LT5dAOtQwubzutTbjgSPktlVxcOvo+kY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZY/2EzF/sWpldHMQ9hGWNGfd93/ydDKoQomiJPrqbho=; b=RTYQb2ctYs1g0EX0fE7NmVXpSzEk+V/H4BUN/IiShrwiPvN6pIdsjz4ZdGKo3yrX6p m41ErX5tInspOOE06twNERCtsNmKZtxw7TtBJBwwHOb5MoglSrwrmAMZFs8u2amwq6i6 ODpvjH27+v3NWkqtpCv4e2NteJPQrSUWp8ATyni5TBxoiaJwK3PIR3L8yoyiUiyXx7tm 1g74eI6pPaZv7wGjJVzVKwd8kCNVYq9tlZEM1XQapORA9CQsMSNvKHepkUOoVco5ssT6 +1ltOXPRH+PRO7R8az1LTBL3XMx5FW8bru+LdnASzM1e4UsPidkMdR5F915Voll7Zuio x4Sg== X-Gm-Message-State: ALKqPweDwKgGX52BDb8MSxTa67q1Qyv00AvcfSh0Nzi/NcoH8NMOFM1v RLMac9i09u3BDr9MBdDh8/Qr8decuYQ= X-Received: by 2002:a17:902:5309:: with SMTP id b9-v6mr5117216pli.187.1527122817251; Wed, 23 May 2018 17:46:57 -0700 (PDT) Received: from localhost.localdomain ([64.64.108.105]) by smtp.gmail.com with ESMTPSA id y29-v6sm48817471pff.42.2018.05.23.17.46.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 May 2018 17:46:56 -0700 (PDT) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 24 May 2018 08:46:29 +0800 Message-Id: <1527122790-23592-6-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527122790-23592-1-git-send-email-haojian.zhuang@linaro.org> References: <1527122790-23592-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH v6 edk2-platforms 5/6] Platform/HiKey: do basic initialization on hikey X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Do some basic initialization on HiKey platform, such as pin setting, regulators and making peripherals out of reset mode. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKey.dsc | 3 + Platform/Hisilicon/HiKey/HiKey.fdf | 3 + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 40 ++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h | 31 ++++++ Silicon/Hisilicon/Hi6220/Include/Hi6220.h | 6 ++ Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h | 50 ++++++++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 102 ++++++++++++++++++++ 7 files changed, 235 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 5c1604d7f689..5cc4ff27f01b 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -189,8 +189,11 @@ [Components.common] # # GPIO # + Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + # # MMC/SD # diff --git a/Platform/Hisilicon/HiKey/HiKey.fdf b/Platform/Hisilicon/HiKey/HiKey.fdf index 2a5c5a4d6e79..39020d27dbcd 100644 --- a/Platform/Hisilicon/HiKey/HiKey.fdf +++ b/Platform/Hisilicon/HiKey/HiKey.fdf @@ -120,8 +120,11 @@ [FV.FvMain] # # GPIO # + INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf + INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + # # Multimedia Card Interface # diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf new file mode 100644 index 000000000000..34734391b45a --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf @@ -0,0 +1,40 @@ +# +# Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved. +# Copyright (c) 2018, Linaro Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x0001001a + BASE_NAME = HiKeyDxe + FILE_GUID = f567684b-1089-4214-8881-d64b20cbda2f + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyEntryPoint + +[Sources.common] + HiKeyDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib + IoLib + UefiLib + UefiDriverEntryPoint + +[Guids] + gEfiEndOfDxeEventGroupGuid + +[Depex] + TRUE diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h new file mode 100644 index 000000000000..07f9ae6a949a --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HIKEYDXE_H__ +#define __HIKEYDXE_H__ + +#include +#include +#include + +#include +#include + +#define DETECT_J15_FASTBOOT 24 // GPIO3_0 + +#define ADB_REBOOT_ADDRESS 0x05F01000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + +#endif /* __HIKEYDXE_H__ */ diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220.h index 203424adfc8b..9b2508955772 100644 --- a/Silicon/Hisilicon/Hi6220/Include/Hi6220.h +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220.h @@ -23,6 +23,12 @@ #define HI6220_PERIPH_BASE 0xF4000000 #define HI6220_PERIPH_SZ 0x05800000 +#define IOMG_BASE 0xF7010000 +#define IOMG_080_REG (IOMG_BASE + 0x140) + +#define IOCG_BASE 0xF7010800 +#define IOCG_084_REG (IOCG_BASE + 0x150) + #define PERI_CTRL_BASE 0xF7030000 #define SC_PERIPH_CTRL4 0x00C #define CTRL4_FPGA_EXT_PHY_SEL BIT3 diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h new file mode 100644 index 000000000000..0db8af37d2d0 --- /dev/null +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h @@ -0,0 +1,50 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI6220_REGS_PERI_H__ +#define __HI6220_REGS_PERI_H__ + +#define SC_PERIPH_CLKEN3 0x230 +#define SC_PERIPH_RSTEN3 0x330 +#define SC_PERIPH_RSTDIS0 0x304 +#define SC_PERIPH_RSTDIS3 0x334 +#define SC_PERIPH_RSTSTAT3 0x338 + +/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */ +#define PERIPH_RST0_MMC2 (1 << 2) + +/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */ +#define PERIPH_RST3_CSSYS (1 << 0) +#define PERIPH_RST3_I2C0 (1 << 1) +#define PERIPH_RST3_I2C1 (1 << 2) +#define PERIPH_RST3_I2C2 (1 << 3) +#define PERIPH_RST3_I2C3 (1 << 4) +#define PERIPH_RST3_UART1 (1 << 5) +#define PERIPH_RST3_UART2 (1 << 6) +#define PERIPH_RST3_UART3 (1 << 7) +#define PERIPH_RST3_UART4 (1 << 8) +#define PERIPH_RST3_SSP (1 << 9) +#define PERIPH_RST3_PWM (1 << 10) +#define PERIPH_RST3_BLPWM (1 << 11) +#define PERIPH_RST3_TSENSOR (1 << 12) +#define PERIPH_RST3_DAPB (1 << 18) +#define PERIPH_RST3_HKADC (1 << 19) +#define PERIPH_RST3_CODEC_SSI (1 << 20) +#define PERIPH_RST3_PMUSSI1 (1 << 22) + +#define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) +#define PMUSSI_ONOFF8_REG (PMUSSI_BASE + (0x1c << 2)) +#define PMUSSI_ONOFF8_EN_32KB BIT6 + +#endif /* __HI6220_REGS_PERI_H__ */ diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c new file mode 100644 index 000000000000..b812f8bd483d --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c @@ -0,0 +1,102 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "HiKeyDxe.h" + +STATIC +VOID +UartInit ( + IN VOID + ) +{ + UINT32 Val; + + /* make UART1 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1); + /* make UART2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2); + /* make UART3 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3); + /* make UART4 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4); + + /* make DW_MMC2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2); + + /* enable clock for BT/WIFI */ + Val = MmioRead32 (PMUSSI_ONOFF8_REG) | PMUSSI_ONOFF8_EN_32KB; + MmioWrite32 (PMUSSI_ONOFF8_REG, Val); +} + +STATIC +VOID +MtcmosInit ( + IN VOID + ) +{ + UINT32 Data; + + /* enable MTCMOS for GPU */ + MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D); + do { + Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0); + } while ((Data & PW_EN0_G3D) == 0); +} + +EFI_STATUS +HiKeyInitPeripherals ( + IN VOID + ) +{ + UINT32 Data, Bits; + + /* make I2C0/I2C1/I2C2/SPI0 out of reset */ + Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | \ + PERIPH_RST3_SSP; + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, Bits); + + do { + Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3); + } while (Data & Bits); + + UartInit (); + /* MTCMOS -- Multi-threshold CMOS */ + MtcmosInit (); + + /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */ + MmioWrite32 (IOCG_084_REG, 0); /* configure GPIO24 as nopull */ + MmioWrite32 (IOMG_080_REG, 0); /* configure GPIO24 as GPIO */ + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +HiKeyEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = HiKeyInitPeripherals (); + if (EFI_ERROR (Status)) { + return Status; + } + return Status; +}