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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id c23-v6si2600325plk.341.2018.03.20.18.04.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Mar 2018 18:04:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=TxSP2phG; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3731C22631476; Tue, 20 Mar 2018 17:57:35 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1DCB622631492 for ; Tue, 20 Mar 2018 17:57:32 -0700 (PDT) Received: by mail-pl0-x242.google.com with SMTP id m22-v6so2134401pls.5 for ; Tue, 20 Mar 2018 18:04:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vUqwhpICO1cov4K9R/vGpE5Bp/yom3ngsGUWZINS19Q=; b=TxSP2phGk81OIarH+MPiExFSgGEEaqdC4hgxHTfnpp7QVp6Y9NYnSp3UUzTPJ0juw2 IT3gQX1yJkpataJ1r4oQXZQatdf1xUtE7Ussxu3GF4dw8jKQ4KMpbOid2y8ifhSE+GKz ouAlx3aBPCWUIk4P64uYrJS2ICrfLBpBNtDuc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vUqwhpICO1cov4K9R/vGpE5Bp/yom3ngsGUWZINS19Q=; b=suHSm71BuRyc7FHY9Vylf9VtCoL5E8G0xYanTg9Y4x3ftx1D8QK6GchiMT/bNTo2p3 Uy6/WeUImx/BvFaZDF2Q6MtkZYK5dudZot9A5qA33nyz/HHb2RLpEtgEGE1va6yjv3px Dr4k2NlTYjeoFb/7IxzOTJfcpZEGkTUABRwlJUCHfKDbAXyXvBOmLODypcyAsKZCcBpF KLlFIyq0nVVi2kQasi2uh0jHMv2gK3aNA9SMLqggrM3CNNHBzQSpR9273mJ0rrovut1E ojxhsYJFYU9I5fGB3uMojnX6GyRY1x2Gi6gPuKKIEHMs9F3jWqxeoGyTGxdxE+9BooOF ZnQg== X-Gm-Message-State: AElRT7ElIDv9CmwVRvQjn5Gi1ftJLhfqCeL6SZsHjYH13w3T/xNJHhVk Smvvr1/Ki9AuKdFvkFkvzbsL0hacw8s= X-Received: by 2002:a17:902:43e4:: with SMTP id j91-v6mr854180pld.118.1521594242734; Tue, 20 Mar 2018 18:04:02 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.100]) by smtp.gmail.com with ESMTPSA id 184sm5702491pfg.124.2018.03.20.18.04.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Mar 2018 18:04:02 -0700 (PDT) From: Heyi Guo To: edk2-devel@lists.01.org Date: Wed, 21 Mar 2018 09:03:10 +0800 Message-Id: <1521594198-52523-5-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521594198-52523-1-git-send-email-heyi.guo@linaro.org> References: <1521594198-52523-1-git-send-email-heyi.guo@linaro.org> Subject: [edk2] [PATCH edk2-platforms 04/12] Hisilicon/Pci: Merge PciPlatform into PcieInit Driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Heyi Guo , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This is to prepare for switching to generic PciHostBridge driver, so we move all platform specific code to platform specific drivers, not in PciHostBridge driver. This patch is to prepare moving EnlargeAtuConfig0() out of PciHostBridge. Since the function was originally called in NotifyPhase() of phase EfiPciHostBridgeEndEnumeration, so we propose to move it to EFI_PCI_PLATFORM_PROTOCOL->PlatformNotify(). To reduce redundant ATU definitions, we merge PciPlatform into PcieInitDxe driver since ATU initialization is done in PcieInitDxe. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Platform/Hisilicon/D03/D03.dsc | 1 - Platform/Hisilicon/D05/D05.dsc | 1 - Platform/Hisilicon/D03/D03.fdf | 1 - Platform/Hisilicon/D05/D05.fdf | 1 - Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf | 53 -------------------- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 5 ++ {Platform/Hisilicon/D03/Drivers/PciPlatform => Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.h | 0 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 6 +++ {Platform/Hisilicon/D03/Drivers/PciPlatform => Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.c | 12 +++++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c | 4 +- 10 files changed, 24 insertions(+), 60 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index c4963063794b..0b2bd29cdf83 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -457,7 +457,6 @@ [Components.common] NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf } - Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 0792b0814ea1..2150a6f4c0e9 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -611,7 +611,6 @@ [Components.common] NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } - Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 09613fb8f6ea..e430d5c08982 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -263,7 +263,6 @@ [FV.FvMain] # PCI Support # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf - INF Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 17a43d8edbd0..13a60837a607 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -285,7 +285,6 @@ [FV.FvMain] # PCI Support # INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf - INF Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf diff --git a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf b/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf deleted file mode 100644 index 8b170d265485..000000000000 --- a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf +++ /dev/null @@ -1,53 +0,0 @@ -#/** @file -# -# Copyright (c) 2016, Hisilicon Limited. All rights reserved. -# Copyright (c) 2016, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[defines] - INF_VERSION = 0x00010005 - BASE_NAME = PciPlatform - FILE_GUID = E2441B64-7EF4-41fe-B3A3-8CAA7F8D3017 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = PciPlatformDriverEntry - -[sources.common] - PciPlatform.c - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - ArmPkg/ArmPkg.dec - Silicon/Hisilicon/HisiPkg.dec - -[LibraryClasses] - UefiDriverEntryPoint - UefiLib - BaseLib - DebugLib - ArmLib - IoLib - MemoryAllocationLib - -[Protocols] - gEfiPciPlatformProtocolGuid - gEfiFirmwareVolume2ProtocolGuid - gEfiPciIoProtocolGuid - -[Pcd] - -[FixedPcd] - -[Depex] - TRUE - diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf index cb0a63f9a84e..94d0fc8c028b 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf @@ -26,6 +26,7 @@ [Sources] PcieInit.c PcieInitLib.c PcieInitAtu.c + PciPlatform.c [Packages] MdePkg/MdePkg.dec @@ -40,6 +41,7 @@ [LibraryClasses] BaseLib DebugLib ArmLib + MemoryAllocationLib TimerLib PcdLib IoLib @@ -47,6 +49,9 @@ [LibraryClasses] [Protocols] #gEfiPcieRootBridgeProtocolGuid + gEfiFirmwareVolume2ProtocolGuid + gEfiPciIoProtocolGuid + gEfiPciPlatformProtocolGuid [Pcd] gHisiTokenSpaceGuid.PcdPcieRootBridgeMask diff --git a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.h b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PciPlatform.h similarity index 100% rename from Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.h rename to Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PciPlatform.h diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h index 87700ae8b9aa..ab0c7ab8bfa7 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h @@ -248,4 +248,10 @@ EFI_STATUS PcieSetDBICS2Enable(UINT32 HostBridgeNum, UINT32 Port, UINT32 Enable) VOID InitAtu (PCI_ROOT_BRIDGE_RESOURCE_APPETURE *Private); +EFI_STATUS +PciPlatformDriverEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + #endif diff --git a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PciPlatform.c similarity index 93% rename from Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.c rename to Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PciPlatform.c index 8bfac2d99fc4..35faa9caf022 100644 --- a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PciPlatform.c @@ -25,6 +25,7 @@ #include #include #include +#include "PcieInitLib.h" // // Global variables for Option ROMs @@ -387,6 +388,17 @@ Returns: --*/ { + switch (Phase) { + case EfiPciHostBridgeEndEnumeration: + // Only do once + if (ChipsetPhase == ChipsetEntry) { + DEBUG ((DEBUG_INFO, "PCI end enumeration platform hook\n")); + EnlargeAtuConfig0 (HostBridge); + } + break; + default: + break; + } return EFI_SUCCESS; } diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c index de297e67e2e1..6ee0cf845dee 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c @@ -160,9 +160,7 @@ PcieInitEntry ( } } - - return EFI_SUCCESS; - + return PciPlatformDriverEntry (ImageHandle, SystemTable); }