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[198.145.21.10]) by mx.google.com with ESMTPS id a190si2841456pge.436.2018.03.14.21.01.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Mar 2018 21:01:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LfDCacjK; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 743CC2264D223; Wed, 14 Mar 2018 20:54:36 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::243; helo=mail-pl0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x243.google.com (mail-pl0-x243.google.com [IPv6:2607:f8b0:400e:c01::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 91FAB225892DD for ; Wed, 14 Mar 2018 20:54:35 -0700 (PDT) Received: by mail-pl0-x243.google.com with SMTP id c8-v6so2132669plr.8 for ; Wed, 14 Mar 2018 21:00:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2cP1Kc08sYx9mind/8WQGD3k/jUDSrlrpi4kOPMcESM=; b=LfDCacjKi8qcBNMRBxzML/0xlb+YkmqSYKE0R23h5/8+YptdbC+7V9yzShOAqHqJHM Ikl/pfYVD89DVPIitSfoz32GDTHGmNG4z2Wmj8TyC5g+rH62X82REYyAaHxu6dd8qBKb 1HcGpu+jSKKw4/fRnnlEN/d3wfMM+0iBxxhkU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2cP1Kc08sYx9mind/8WQGD3k/jUDSrlrpi4kOPMcESM=; b=JH8e5fQcDvjzHHJTRSysYtK/qoQx5vdxGI5KK+uMlX56Ilr7IAMA8IBqZIQxa+otOW SqqTOwmMps2fjN+vHdN8k9f4+ZyUhOWAZrcPr4eeHLP+koDuo+rP6PYYp6FIG1QCwpns fo9eX06TTsjhupec0nmflS3YXWciJ5OsEPnEntK3ZMx54j+kefNqiPqyyt86GVEqMYb8 PrNO03Hyhur4rTe/THmyEdyn5tgO3/Hw8TwvIdony2LEk8MqiFrI97Bs38DvtQxD+n+S L/Tz1c5QXISiy/7qP9Wn6zdiVuppvFJMb/VzN+82IXwDK8f3hmaiW4kU8bzWYWQHY7Zb LmdA== X-Gm-Message-State: AElRT7Eo7w4YkbOHFAOzTZqO6pAgeINKEZVISOt+9BCg17Gs/e21WSes 15z5psaz6qMXrJM2J0ieTTV44vQFPS4= X-Received: by 2002:a17:902:b101:: with SMTP id q1-v6mr6453980plr.287.1521086458833; Wed, 14 Mar 2018 21:00:58 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.100]) by smtp.gmail.com with ESMTPSA id e4sm8107785pfa.166.2018.03.14.21.00.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Mar 2018 21:00:58 -0700 (PDT) From: Heyi Guo To: edk2-devel@lists.01.org Date: Thu, 15 Mar 2018 12:00:21 +0800 Message-Id: <1521086424-113954-4-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521086424-113954-1-git-send-email-heyi.guo@linaro.org> References: <1521086424-113954-1-git-send-email-heyi.guo@linaro.org> Subject: [edk2] [PATCH v6 3/6] MdeModulePkg/PciHostBridgeLib.h: add address Translation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni , Yi Li , Eric Dong , Ard Biesheuvel , Heyi Guo , Michael D Kinney , Laszlo Ersek , Star Zeng MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add Translation field to PCI_ROOT_BRIDGE_APERTURE. Translation is used to represent the difference between device address and host address, if they are not the same on some platforms. In UEFI 2.7, "Address Translation Offset" is "Offset to apply to the Starting address to convert it to a PCI address". This means: Translation = device address - host address So we also use the above calculation for this Translation field to keep consistent. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo Signed-off-by: Yi Li Cc: Ruiyu Ni Cc: Ard Biesheuvel Cc: Star Zeng Cc: Eric Dong Cc: Laszlo Ersek Cc: Michael D Kinney --- MdeModulePkg/Include/Library/PciHostBridgeLib.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index d42e9ecdd763..18963a0d3821 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -20,8 +20,27 @@ // (Base > Limit) indicates an aperture is not available. // typedef struct { + // + // Base and Limit are the device address instead of host address when + // Translation is not zero + // UINT64 Base; UINT64 Limit; + // + // According to UEFI 2.7, Device Address = Host Address + Translation, + // so Translation = Device Address - Host Address. + // On platforms where Translation is not zero, the subtraction is probably to + // be performed with UINT64 wrap-around semantics, for we may translate an + // above-4G host address into a below-4G device address for legacy PCIe device + // compatibility. + // + // NOTE: The alignment of Translation is required to be larger than any BAR + // alignment in the same root bridge, so that the same alignment can be + // applied to both device address and host address, which simplifies the + // situation and makes the current resource allocation code in generic PCI + // host bridge driver still work. + // + UINT64 Translation; } PCI_ROOT_BRIDGE_APERTURE; typedef struct {