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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id 84sm1539781ljc.67.2017.10.11.03.16.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Oct 2017 03:16:07 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Wed, 11 Oct 2017 12:15:34 +0200 Message-Id: <1507716939-31798-8-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507716939-31798-1-git-send-email-mw@semihalf.com> References: <1507716939-31798-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 07/12] Marvell/Armada: Ensure GICC frames adjacency X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel The GIC architecture mandates that the CPU interface, which consists of 2 consecutive 4 KB frames, can be mapped using separate mappings. Since this is problematic on 64 KB pages, the MMU-400 aliases each frame 16 times, and the two consecutive frames can be found at offset 0xf000. Therefore use the last alias from the first series of aliases as the base address, so that the first frame from the second series becomes directly adjacent, whilst remaining covered by a separate 64KB page. This patch is intended to expose correct GICC alias via MADT, once ACPI support is added. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada/Armada.dsc.inc | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc index 5071bd5..bd2336f 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -263,7 +263,14 @@ # ARM Generic Interrupt Controller gArmTokenSpaceGuid.PcdGicDistributorBase|0xF0210000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF0220000 + + # + # NOTE: the GIC architecture mandates that the CPU interface, which consists + # of 2 consecutive 4 KB frames, can be mapped using separate mappings. + # Since this is problematic on 64 KB pages, the MMU-400 aliases each frame + # 16 times, and the two consecutive frames can be found at offset 0xf000 + # + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF022F000 # ARM Architectural Timer Support gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|25000000