Message ID | 1507716939-31798-8-git-send-email-mw@semihalf.com |
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State | New |
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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id 84sm1539781ljc.67.2017.10.11.03.16.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Oct 2017 03:16:07 -0700 (PDT) From: Marcin Wojtas <mw@semihalf.com> To: edk2-devel@lists.01.org Date: Wed, 11 Oct 2017 12:15:34 +0200 Message-Id: <1507716939-31798-8-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507716939-31798-1-git-send-email-mw@semihalf.com> References: <1507716939-31798-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 07/12] Marvell/Armada: Ensure GICC frames adjacency X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development <edk2-devel.lists.01.org> List-Unsubscribe: <https://lists.01.org/mailman/options/edk2-devel>, <mailto:edk2-devel-request@lists.01.org?subject=unsubscribe> List-Archive: <http://lists.01.org/pipermail/edk2-devel/> List-Post: <mailto:edk2-devel@lists.01.org> List-Help: <mailto:edk2-devel-request@lists.01.org?subject=help> List-Subscribe: <https://lists.01.org/mailman/listinfo/edk2-devel>, <mailto:edk2-devel-request@lists.01.org?subject=subscribe> Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" <edk2-devel-bounces@lists.01.org> |
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diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc index 5071bd5..bd2336f 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -263,7 +263,14 @@ # ARM Generic Interrupt Controller gArmTokenSpaceGuid.PcdGicDistributorBase|0xF0210000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF0220000 + + # + # NOTE: the GIC architecture mandates that the CPU interface, which consists + # of 2 consecutive 4 KB frames, can be mapped using separate mappings. + # Since this is problematic on 64 KB pages, the MMU-400 aliases each frame + # 16 times, and the two consecutive frames can be found at offset 0xf000 + # + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF022F000 # ARM Architectural Timer Support gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|25000000