From patchwork Wed Jul 5 08:27:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Nie X-Patchwork-Id: 107040 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp482574qge; Wed, 5 Jul 2017 01:27:28 -0700 (PDT) X-Received: by 10.84.228.207 with SMTP id y15mr20895530pli.13.1499243248717; Wed, 05 Jul 2017 01:27:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499243248; cv=none; d=google.com; s=arc-20160816; b=k+iqTQ6MlyQ3dvkMZ4eAFxU9rFvbOzk+EpGJ9ZYfsIj0OZhtp5hhKZgnwo736PndyX g0sTQniHiKrLtPlLIHdccW2zOt9EWFik13CPwBMquGzbi0i6hRiczQvGCP98CY6xLAxm ZvMfHc6SSo1XpkOc1WzsdPcoz6IakUuJVGocKwC6BR+4A7sQVkE71uwHERRPouioFzFD qEynbS78UfkHFYK4TI4C4MRWhCsutjB6JWBn6QaC/BHdSBoNDMjphENo0T0nQzSax37r tYS3/ZBLHmfOqVU31ews2JLS9Y8X4FtnnRs87bjmkOr5Sg6rD60xVWxzTIOmjybPEg5v Rm9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=Pd8WMmN8fONS7l3gDn5nsnw+QeI33PDxsVDA9kEZpc0=; b=G7M02kDooilK2OoT78u/41AeexA8MGESN5fWAZzlsbFGU/8GpcirLDKDIQ1gR04iQF c+53UM17gLWoIJD5YDIzgSsz1p/yH6J8gM2Ve1X3EZ76hxPCgoo9bCSnO1jXaLlBiiJB 8TdgxT1Jpw4x9DN7jKK6zlNqUXTiEGaWqTUgE1F1epKedQh2MYMFmVAtgLx2JaUIzwuC 472ibzGCz0DkUO5xpMUpWXkzXxre+EtIQIHz40Nikus7bfvXrK9Hy8R5W5D+JSrpaPbI YIi34Tzd8oelaCkg9vg/JJhpdhY5kIlB5lNkvs/O68rA8c/QMZ3dvvgOlpRL78CFe81G 0vtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=GtPIi9M6; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id a8si16333767pfg.381.2017.07.05.01.27.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jul 2017 01:27:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=GtPIi9M6; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 31AF321C8F620; Wed, 5 Jul 2017 01:25:49 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pf0-x233.google.com (mail-pf0-x233.google.com [IPv6:2607:f8b0:400e:c00::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2180521A00AF6 for ; Wed, 5 Jul 2017 01:25:48 -0700 (PDT) Received: by mail-pf0-x233.google.com with SMTP id c73so126161698pfk.2 for ; Wed, 05 Jul 2017 01:27:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dZ6nvfvIzJjV9VCj6LsZHHnV6KguMsN1oysQaBi8fw0=; b=GtPIi9M6AEOo64SP9bO30LfnpiL6kgN7D7Z8m6I1HyPIas0S7kcHp8E042+kPw38ji EWEhUPs+P3jcktBrTEjr2Au8LNcuOdbGKYHmQyF/unJtGqaUjU7YXWh0DZDIpmI9VWMA RXlmCpVHvA359XPx9TkJWBALXr4MDdcIPt3aE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dZ6nvfvIzJjV9VCj6LsZHHnV6KguMsN1oysQaBi8fw0=; b=Cc6vgMnpbmIsi6q/8xaGA4/6OT7eudaCMjp7hpI/MOk46HOcWvrk5ZKMYimufwkhQ0 cl2c8gVnZiyQvgwjxCTKqW/28OIY7R67rEzX6mk5YDsjqpLSrkRxSJyEDoPpNAyYY89m moaUXVbVLTxRaMxGl0B2lHKi7KMJncnAubjbvuH8gwV/gjG4HuJGQ4v09Wp2umdgUpGe UzZF4+qe2XveA24+GhzBiXTAbk/jyYkLF0UlcIYxA/I5VbLKRRWw8fcRJvs/kjabIbLD RM6R18NuqJp7Hv4dDHbQk7RQR1XaY5lYTN1nTaIxpHDRS68h7F6NU58VeyZUfanuEevK VZ8A== X-Gm-Message-State: AIVw112xGIbypYMpQ6VKrecIArPU4/1NMv9oqJ1dl5b+PfjdGYZtHgat 77dYxK2xNMPNGMA6 X-Received: by 10.84.131.6 with SMTP id 6mr21302416pld.33.1499243246985; Wed, 05 Jul 2017 01:27:26 -0700 (PDT) Received: from localhost.localdomain ([113.53.228.78]) by smtp.gmail.com with ESMTPSA id z74sm35503722pfd.112.2017.07.05.01.27.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 05 Jul 2017 01:27:26 -0700 (PDT) From: Jun Nie To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, haojian.zhuang@linaro.org, edk2-devel@lists.01.org Date: Wed, 5 Jul 2017 16:27:08 +0800 Message-Id: <1499243228-1225-2-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499243228-1225-1-git-send-email-jun.nie@linaro.org> References: <1499243228-1225-1-git-send-email-jun.nie@linaro.org> Subject: [edk2] [PATCH v2 2/2] EmbeddedPkg/DwEmmc: Adjust FIFO threshold X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jason.liu@linaro.org, shawn.guo@linaro.org MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Adjust FIFO threshold according to FIFO depth. Skip the adjustment if we do not have FIFO depth info. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie --- EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h | 6 ++++ EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 50 +++++++++++++++++++++++++++++ EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + EmbeddedPkg/EmbeddedPkg.dec | 1 + 4 files changed, 58 insertions(+) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h index 055f1e0..90c7676 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h @@ -38,7 +38,10 @@ #define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044) #define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048) #define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c) +#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c) +#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060) #define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064) +#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070) #define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074) #define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080) #define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088) @@ -47,6 +50,7 @@ #define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094) #define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098) #define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100) +#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200) #define CMD_UPDATE_CLK 0x80202000 #define CMD_START_BIT (1 << 31) @@ -124,4 +128,6 @@ #define DWEMMC_CARD_RD_THR(x) ((x & 0xfff) << 16) #define DWEMMC_CARD_RD_THR_EN (1 << 0) +#define DWEMMC_GET_HDATA_WIDTH(x) (((x) >> 7) & 0x7) + #endif // __DWEMMC_H__ diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c index bb26b69..70e064d 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c @@ -415,6 +415,55 @@ DwEmmcReceiveResponse ( return EFI_SUCCESS; } +VOID DwEmmcAdjustFifothreshold ( + VOID + ) +{ + /* DMA multiple transaction size map to reg value as array index */ + CONST UINT32 BurstSize[] = {1, 4, 8, 16, 32, 64, 128, 256}; + UINT32 BlkDepthInFifo, Fifoth, FifoWidth, FifoDepth; + UINT32 BlkSize = DWEMMC_BLOCK_SIZE, Idx = 0, RxWmark = 1, TxWmark, TxWmarkInvers; + + /* Skip FIFO adjustment if we do not have platform FIFO depth info */ + FifoDepth = PcdGet32 (PcdDwEmmcDxeFifoDepth); + if (!FifoDepth) { + return; + } + + TxWmark = FifoDepth / 2; + TxWmarkInvers = FifoDepth - TxWmark; + + FifoWidth = DWEMMC_GET_HDATA_WIDTH (MmioRead32 (DWEMMC_HCON)); + if (!FifoWidth) { + FifoWidth = 2; + } else if (FifoWidth == 2) { + FifoWidth = 8; + } else { + FifoWidth = 4; + } + + BlkDepthInFifo = BlkSize / FifoWidth; + + /* if BlkSize is not a multiple of the FIFO width */ + if (BlkSize % FifoWidth) { + goto done; + } + + Idx = ARRAY_SIZE (BurstSize) - 1; + while (Idx && ((BlkDepthInFifo % BurstSize[Idx]) || (TxWmarkInvers % BurstSize[Idx]))) { + Idx--; + } + RxWmark = BurstSize[Idx] - 1; + /* + * If Idx is '0', it won't be tried + * Thus, initial values are used + */ +done: + Fifoth = DWEMMC_DMA_BURST_SIZE (Idx) | DWEMMC_FIFO_TWMARK (TxWmark) + | DWEMMC_FIFO_RWMARK (RxWmark); + MmioWrite32 (DWEMMC_FIFOTH, Fifoth); +} + EFI_STATUS PrepareDmaData ( IN DWEMMC_IDMAC_DESCRIPTOR* IdmacDesc, @@ -633,6 +682,7 @@ DwEmmcDxeInitialize ( Handle = NULL; + DwEmmcAdjustFifothreshold (); gpIdmacDesc = (DWEMMC_IDMAC_DESCRIPTOR *)AllocatePages (DWEMMC_MAX_DESC_PAGES); if (gpIdmacDesc == NULL) { return EFI_BUFFER_TOO_SMALL; diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf index 99b4f99..bc4413e 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf @@ -49,6 +49,7 @@ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth [Depex] TRUE diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index 2da9b2f..5f39d9d 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -170,6 +170,7 @@ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000035 gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000036 gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000037 + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000038 # # Android FastBoot