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[60.249.34.38]) by smtp.gmail.com with ESMTPSA id m81sm8003048pfj.121.2017.06.08.01.12.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Jun 2017 01:12:41 -0700 (PDT) From: Jun Nie To: olivier.martin@arm.com, haojian.zhuang@linaro.org, edk2-devel@lists.01.org Date: Thu, 8 Jun 2017 16:12:27 +0800 Message-Id: <1496909547-16085-1-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 Subject: [edk2] [PATCH] EmbeddedPkg/MmcDxe: Add non-DDR timing mode support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jason.liu@linaro.org, shawn.guo@linaro.org MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Only DDR mode is support for 8bit mode currently. Add non-DDR case when configuring ECSD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie --- EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c index 574a77e..5c0d7e7 100644 --- a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c +++ b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c @@ -286,7 +286,10 @@ InitializeEmmcDevice ( } Status = Host->SetIos (Host, BusClockFreq, 8, TimingMode[Idx]); if (!EFI_ERROR (Status)) { - Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_DDR_8BIT); + if (Idx < 2) + Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_DDR_8BIT); + else + Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_8BIT); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "InitializeEmmcDevice(): Failed to set EXTCSD bus width, Status:%r\n", Status)); }