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[198.145.21.10]) by mx.google.com with ESMTPS id 3si3871313pla.191.2016.11.22.23.09.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Nov 2016 23:09:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1EB3481EC0; Tue, 22 Nov 2016 23:09:05 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pg0-x230.google.com (mail-pg0-x230.google.com [IPv6:2607:f8b0:400e:c05::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3F69181EC0 for ; Tue, 22 Nov 2016 23:09:04 -0800 (PST) Received: by mail-pg0-x230.google.com with SMTP id x23so2866649pgx.1 for ; Tue, 22 Nov 2016 23:09:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GS3Gh5LZf1K7iY9gt9YZJ4+9rkFfNllIyUqGUUC+juA=; b=KF28mqktXsE8a+VsQzRRl54l2ODK6nrzFxudURMEEghai78+iFCqb3rXGMjZ8dLeXC U3nm12CZrEcdZ77/+u8lWKYwGE4g5L6K6EvmgiJunZAOn3le2CfdYHmYEqWQlsr+hS67 k/r7jwQX/UDVSUGGMqMp/7dWJhZi7JRD+/g74= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GS3Gh5LZf1K7iY9gt9YZJ4+9rkFfNllIyUqGUUC+juA=; b=B9zgj6hQ8OpqlVU0BSGbTG8fBmNb2Xm9h1GlR6/Z6qZW+eQ3johsORpA7lSbm2s3KV ftdHzHByy8EzaHRDXPQWwDPRMRF+hjav+U6PSCCX18OF7l7af3QO/tvqJ9qsc+BuUJor lgaWVaZ//ngMlJIut4+/R1e0V425Q/dGRPT3MM6YT6HTrQtG8cc2KHPMXJRE5zmbpLT4 A1cfNqkPNOY/zWaHQ7/1stPjQWP/BirUwHwLvyqLOYaCwzvfiZ0ICUC2jczkjlWcThgX ykWcU5GVyk6OY+oYavFzLq31E2FMOva7m7ag5kNpwi5zEd+eyJKU6/0bEL8Y0aM8TRSq SFmw== X-Gm-Message-State: AKaTC03n8D7sVF5WHgXok1T6Kq3bPe7lOsCPV8YvLDcssf5MH9rcWG75+KcQ1dZlV/fhf+Su X-Received: by 10.84.178.195 with SMTP id z61mr3791588plb.176.1479884943919; Tue, 22 Nov 2016 23:09:03 -0800 (PST) Received: from localhost.localdomain ([45.56.159.99]) by smtp.gmail.com with ESMTPSA id 65sm49873730pfn.12.2016.11.22.23.09.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Nov 2016 23:09:03 -0800 (PST) From: Haojian Zhuang To: ryan.harkin@linaro.org, edk2-devel@lists.01.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org Date: Wed, 23 Nov 2016 15:08:40 +0800 Message-Id: <1479884921-25398-4-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479884921-25398-1-git-send-email-haojian.zhuang@linaro.org> References: <1479884921-25398-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH v7 3/4] PL180: update for indentifying SD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" When CMD6 & ACMD51 are added into indentifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it'll hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang Tested-by: Ryan Harkin --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 29 ++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 5526aac..b2ba4c0 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -63,11 +63,6 @@ MciIsReadOnly ( return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_WPROT); } -#if 0 -//Note: This function has been commented out because it is not used yet. -// This function could be used to remove the hardcoded BlockLen used -// in MciPrepareDataPath - // Convert block size to 2^n STATIC UINT32 @@ -87,7 +82,6 @@ GetPow2BlockLen ( return Pow2BlockLen; } -#endif VOID MciPrepareDataPath ( @@ -126,6 +120,23 @@ MciSendCommand ( MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT); } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) { MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD); + } else if (MmcCmd == MMC_CMD6) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + MmioWrite32 (MCI_DATA_LENGTH_REG, 64); +#ifndef USE_STREAM + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (64)); +#else + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); +#endif + } else if (MmcCmd == MMC_ACMD51) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + /* SCR register is 8 bytes long. */ + MmioWrite32 (MCI_DATA_LENGTH_REG, 8); +#ifndef USE_STREAM + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (8)); +#else + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); +#endif } // Create Command for PL180 @@ -223,7 +234,11 @@ MciReadBlockData ( // Read data from the RX FIFO Loop = 0; - Finish = MMCI0_BLOCKLEN / 4; + if (Length < MMCI0_BLOCKLEN) { + Finish = Length / 4; + } else { + Finish = MMCI0_BLOCKLEN / 4; + } // Raise the TPL at the highest level to disable Interrupts. Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);