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[198.145.21.10]) by mx.google.com with ESMTPS id yk10si41101714pac.237.2016.09.21.08.03.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Sep 2016 08:03:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 412171A1F01; Wed, 21 Sep 2016 08:03:05 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pa0-x231.google.com (mail-pa0-x231.google.com [IPv6:2607:f8b0:400e:c03::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5B3611A1EFE for ; Wed, 21 Sep 2016 08:03:03 -0700 (PDT) Received: by mail-pa0-x231.google.com with SMTP id wk8so19266383pab.1 for ; Wed, 21 Sep 2016 08:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=13tRAGo66CbehCfuK8VN7LiY6a16WwTs7ITGEsEX1w0=; b=WcVt5EAuz++9/OK/VI+Rmz9NvudcfyRQw061cqCoHbN/HHOE8QtJ0+XFCL7hTb4p/6 4R3b/h7RXDsV0WBKOaztJU1b8wiERetqeiCTQXPB5ODDyFOIYS3R3+ZtXtArrpc8s/b7 oIJDba1ndirn3eeLkA6YmPKnvynHKuJXSJ+n0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=13tRAGo66CbehCfuK8VN7LiY6a16WwTs7ITGEsEX1w0=; b=kSPBDMxC02Rqet3DLWVYjRwje0H3OqPTULhSCWfn9tN8jUXVv31gER14jqmD5lO8mF 5uB6NPmkRdU3cLbVfa9GrjMNm5DOLKuO2+oCo1sma53hSRjHbI62R/lLKghREzKHx7KE J4NIAG6xdOkjJMzwO6HcQqA/LfTJwLhXD+7Vd/bu7mmc3LyYD3mkzRHfnhHIl9hO8ziN 81NUAQ6n1Z9LexsCZdL3H+Hf+bCJc5WgE8UkeEq0UlMbYUS6gX3UL9h5NJSiSILfnYe2 C5O74uS2XWYsMzbY9iwuHwekJFZDMUwuqRzKFDN9ug0pwaXOcp+AyCQ1BC6NfYKePEOR zybw== X-Gm-Message-State: AE9vXwNKZN5/iUiKwnZ0jxWDC+m7Ap41DQ7MMZRGZJyWT3tpCPxVO3njZRA5pasBS2nwkvZd X-Received: by 10.66.27.44 with SMTP id q12mr65587227pag.58.1474470183048; Wed, 21 Sep 2016 08:03:03 -0700 (PDT) Received: from localhost.localdomain ([104.237.91.137]) by smtp.gmail.com with ESMTPSA id 85sm28914221pfw.92.2016.09.21.08.03.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Sep 2016 08:03:02 -0700 (PDT) From: Haojian Zhuang To: ryan.harkin@linaro.org, edk2-devel@lists.01.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org Date: Wed, 21 Sep 2016 23:02:27 +0800 Message-Id: <1474470147-23156-11-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1474470147-23156-1-git-send-email-haojian.zhuang@linaro.org> References: <1474470147-23156-1-git-send-email-haojian.zhuang@linaro.org> Subject: [edk2] [PATCH v3 10/10] PL180: update for indentifying SD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haojian Zhuang MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" When CMD6 & ACMD51 are added into indentifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it'll hang when system tries to read expected data. Signed-off-by: Haojian Zhuang --- ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c index 5526aac..7647608 100644 --- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c +++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c @@ -126,6 +126,15 @@ MciSendCommand ( MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT); } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) { MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD); + } else if (MmcCmd == MMC_CMD6) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + MmioWrite32 (MCI_DATA_LENGTH_REG, 64); + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); + } else if (MmcCmd == MMC_ACMD51) { + MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF); + /* SCR register is 8 bytes long. */ + MmioWrite32 (MCI_DATA_LENGTH_REG, 8); + MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS); } // Create Command for PL180 @@ -223,7 +232,11 @@ MciReadBlockData ( // Read data from the RX FIFO Loop = 0; - Finish = MMCI0_BLOCKLEN / 4; + if (Length < MMCI0_BLOCKLEN) { + Finish = Length / 4; + } else { + Finish = MMCI0_BLOCKLEN / 4; + } // Raise the TPL at the highest level to disable Interrupts. Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);