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[198.145.21.10]) by mx.google.com with ESMTPS id k20si28461067pfg.177.2016.09.05.02.17.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 05 Sep 2016 02:17:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id EF4A11A1E2D; Mon, 5 Sep 2016 02:17:47 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com [IPv6:2a00:1450:400c:c09::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0272F1A1E2C for ; Mon, 5 Sep 2016 02:17:47 -0700 (PDT) Received: by mail-wm0-x22b.google.com with SMTP id 1so127695649wmz.1 for ; Mon, 05 Sep 2016 02:17:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=u05uLyeWIuXkG1DI+m3oBcATPipGKahsnkMrpRfRSPA=; b=YDKAvicR4VG7o3/g0c6esWPDw++ZWTVPE2dBrHpVIBnT2eQtC8j8zRkgWE9cfyBmmu OMYJcHaWbs7CS0FWXVTt/OA+VWawbEB0stquENYJTXYfXHFGi+aC8dFjilEWpTOsc1SX cAR0WO3b6+G6Iw5vJuYRHlfsiofURY1jNqiuo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u05uLyeWIuXkG1DI+m3oBcATPipGKahsnkMrpRfRSPA=; b=hs5XbVqv4ENIjg/qkhsM75MgGSozCC1LXV6nmn13LebpIAxQLzgfcT+/WFIDcMZWfb BPD8fo0yp55Io+qcxhqOxXCG59LSNTYG+RIPnj4OYjioBk0sk+wVGgmWuSkYjKOzwSTK ocP5RnScbmedlqCmVFILsJCBvCBadhqm+2crgurmYf4t8wxi+ubjUyfiMXhqdmPI6Euj WC+pWoelHnZKRsCm1lqsPEqE490zsZSHTgr1ON8KuEgDfCs8IkfWWMnbAhEXgdL+wS/2 W95grZ+2cx7bXEMD9kgZO7Te7vEwEnysC69srgZ6kt2fnGDluhADqaKJLw8SohAexiYH q6Vw== X-Gm-Message-State: AE9vXwP6313s6zqb7UErQYr1Rg3pkRPNIiCeE4XgI6pRYzLFS8hu4+0pvLlogFVZlILfTfgF X-Received: by 10.194.242.67 with SMTP id wo3mr16299019wjc.65.1473067065560; Mon, 05 Sep 2016 02:17:45 -0700 (PDT) Received: from localhost.localdomain ([197.130.133.164]) by smtp.gmail.com with ESMTPSA id m133sm10157457wmg.0.2016.09.05.02.17.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Sep 2016 02:17:44 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, feng.tian@intel.com, star.zeng@intel.com, liming.gao@intel.com Date: Mon, 5 Sep 2016 10:17:23 +0100 Message-Id: <1473067049-16252-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org> References: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/7] MdeModulePkg/AtaAtapiPassThru: enable 64-bit PCI DMA X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 469a40ac392a..68bce94810a6 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -2258,7 +2258,25 @@ AhciModeInitialization ( if ((Capability & EFI_AHCI_CAP_SAM) == 0) { AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE); } - + + // + // Enable 64-bit DMA support in the PCI layer if this controller + // supports it. + // + if ((Capability & EFI_AHCI_CAP_S64A) != 0) { + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_WARN, + "AhciModeInitialization: failed to enable 64-bit DMA on 64-bit capable controller (%r)\n", + Status)); + } + } + // // Get the number of command slots per port supported by this HBA. //