From patchwork Fri Aug 5 14:53:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 73360 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp1979167qga; Fri, 5 Aug 2016 07:54:07 -0700 (PDT) X-Received: by 10.98.210.69 with SMTP id c66mr135909539pfg.71.1470408847802; Fri, 05 Aug 2016 07:54:07 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id ep4si20777656pac.211.2016.08.05.07.54.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Aug 2016 07:54:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5258C1A1DFE; Fri, 5 Aug 2016 07:54:07 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x234.google.com (mail-wm0-x234.google.com [IPv6:2a00:1450:400c:c09::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A31791A1DFC for ; Fri, 5 Aug 2016 07:54:05 -0700 (PDT) Received: by mail-wm0-x234.google.com with SMTP id q128so34506161wma.1 for ; Fri, 05 Aug 2016 07:54:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=mgGZUkPDvIkKhga5DTyoFBtnm1ap3n71g4LfYpCQ3p8=; b=BimQuPqKsMRix+L7JiSeGmONFux4WLqN3M0Hw6n0xj2UIsRJcf+dk+fZDoRGMe5lmA prgYU3nXgOvfo6rTEu39gXyuKgjIUBpJcLCODpRMtXVph6vVQmi/2Hgstb8B4KNxjuv2 tdfvGN/DFxbioBfifj8DWu6n8htPHf432Ul1w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=mgGZUkPDvIkKhga5DTyoFBtnm1ap3n71g4LfYpCQ3p8=; b=lGitjD6BPwJcpDUHESL0g+TfKOVOYgXMOnlcvVec125q7yjLELDLhnnVAA0Icpk8t5 C9K4g8csgZWDKytRjY+crEv2gKIPJ7taWzWADtgjZ3AGB0kfTp+Dl+ahhBHJSB72fIKG bCauTJN0bc0HTcRL+GNyDeeC6ReUtBIqNKpx1XTQcsN2IXbHHWCZ6JFNtQa+gzfktvrv WRBHwFpB0hsprNGw9q47yucyZCU/CDj4iitU1mhAu/Z6AN1l3OMNsfdG4PVw88tUsh44 XXzlHPwPEoH0UVAfsnpgEJsEF2XvN2W62zUh3jy9J/zfmuNz3NJHn6kOt1480XSTvV3C Y+5A== X-Gm-Message-State: AEkoous9KcgcC2nTm/mlvhJkR0WilATFcRHSXO3weDY05SdyuOEPttSXIdbBuihktUY1WkXk X-Received: by 10.28.232.145 with SMTP id f17mr3812787wmi.15.1470408843494; Fri, 05 Aug 2016 07:54:03 -0700 (PDT) Received: from localhost.localdomain (3.red-81-34-118.dynamicip.rima-tde.net. [81.34.118.3]) by smtp.gmail.com with ESMTPSA id d64sm8956201wmc.22.2016.08.05.07.54.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Aug 2016 07:54:02 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 5 Aug 2016 16:53:57 +0200 Message-Id: <1470408838-1020-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [PATCH 1/2] ArmVirtPkg/PrePi: use correct callee saved regs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Both the ARM and the AARCH64 versions of the PrePi code (shared between ArmVirtQemuKernel and ArmVirtXen) 'preserve' values across a function call using registers that are not in fact callee saved. So fix that. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 24 ++++++++++---------- ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 10 ++++---- 2 files changed, 17 insertions(+), 17 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Acked-by: Laszlo Ersek diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S index 68049d5df2bf..e61f5df12e89 100644 --- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S +++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S @@ -71,7 +71,7 @@ ASM_PFX(_ModuleEntryPoint): // Get ID of this CPU in Multicore system bl ASM_PFX(ArmReadMpidr) // Keep a copy of the MpId register value - mov x10, x0 + mov x20, x0 // Check if we can install the stack at the top of the System Memory or if we need // to install the stacks at the bottom of the Firmware Device (case the FD is located @@ -113,39 +113,39 @@ _SetupStack: // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the // top of the memory space) - adds x11, x1, #1 + adds x21, x1, #1 b.cs _SetupOverflowStack _SetupAlignedStack: - mov x1, x11 + mov x1, x21 b _GetBaseUefiMemory _SetupOverflowStack: // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE // aligned (4KB) LoadConstantToReg (EFI_PAGE_MASK, x11) - and x11, x11, x1 - sub x1, x1, x11 + and x21, x21, x1 + sub x1, x1, x21 _GetBaseUefiMemory: // Calculate the Base of the UEFI Memory - sub x11, x1, x4 + sub x21, x1, x4 _GetStackBase: // r1 = The top of the Mpcore Stacks // Stack for the primary core = PrimaryCoreStack LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2) - sub x12, x1, x2 + sub x22, x1, x2 // Stack for the secondary core = Number of Cores - 1 LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0) sub x0, x0, #1 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1) mul x1, x1, x0 - sub x12, x12, x1 + sub x22, x22, x1 // x12 = The base of the MpCore Stacks (primary stack & secondary stacks) - mov x0, x12 + mov x0, x22 mov x1, x10 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize) LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2) @@ -159,9 +159,9 @@ _GetStackBase: bne _PrepareArguments _PrepareArguments: - mov x0, x10 - mov x1, x11 - mov x2, x12 + mov x0, x20 + mov x1, x21 + mov x2, x22 // Move sec startup address into a data register // Ensure we're jumping to FV version of the code (not boot remapped alias) diff --git a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S index 441db36857de..3215c7d55876 100644 --- a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S +++ b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S @@ -154,17 +154,17 @@ _GetStackBase: // r1 = The top of the Mpcore Stacks // Stack for the primary core = PrimaryCoreStack LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2) - sub r12, r1, r2 + sub r9, r1, r2 // Stack for the secondary core = Number of Cores - 1 LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0) sub r0, r0, #1 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1) mul r1, r1, r0 - sub r12, r12, r1 + sub r9, r9, r1 - // r12 = The base of the MpCore Stacks (primary stack & secondary stacks) - mov r0, r12 + // r9 = The base of the MpCore Stacks (primary stack & secondary stacks) + mov r0, r9 mov r1, r10 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize) LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2) @@ -180,7 +180,7 @@ _GetStackBase: _PrepareArguments: mov r0, r10 mov r1, r11 - mov r2, r12 + mov r2, r9 // Move sec startup address into a data register // Ensure we're jumping to FV version of the code (not boot remapped alias)