From patchwork Fri May 6 17:19:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 67289 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp428924qge; Fri, 6 May 2016 10:19:45 -0700 (PDT) X-Received: by 10.98.93.5 with SMTP id r5mr30003880pfb.15.1462555177473; Fri, 06 May 2016 10:19:37 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 13si18792359pfn.148.2016.05.06.10.19.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 May 2016 10:19:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 72C4B1A1F7F; Fri, 6 May 2016 10:19:36 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id C75411A1F7F for ; Fri, 6 May 2016 10:19:34 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E78523ED; Fri, 6 May 2016 10:19:42 -0700 (PDT) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C6B963F246; Fri, 6 May 2016 10:19:33 -0700 (PDT) From: Mark Rutland To: edk2-devel@lists.01.org Date: Fri, 6 May 2016 18:19:09 +0100 Message-Id: <1462555149-18136-5-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462555149-18136-1-git-send-email-mark.rutland@arm.com> References: <1462555149-18136-1-git-send-email-mark.rutland@arm.com> Subject: [edk2] [PATCH 4/4] EmbeddedPkg/Lan9118Dxe: remove redundant stalls X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: ryan.harkin@linaro.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Now that the LAN9118-specific MMIO accessors provide the required delays, remove the redundant stalls. Stalls in delay loops are kept, as these give time for work to happen beyond synchronisation of the device register file. Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Ryan Harkin Signed-off-by: Mark Rutland Contributed-under: TianoCore Contribution Agreement 1.0 --- EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c | 5 ----- EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c | 16 ---------------- 2 files changed, 21 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c index bef34c2..8af23df 100644 --- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c +++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c @@ -307,8 +307,6 @@ SnpInitialize ( // Write the current configuration to the register Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf); - gBS->Stall (LAN9118_STALL); - gBS->Stall (LAN9118_STALL); // Configure GPIO and HW Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp); @@ -431,7 +429,6 @@ SnpReset ( // Write the current configuration to the register Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf); - gBS->Stall (LAN9118_STALL); // Reactivate the LEDs Status = ConfigureHardware (HW_CONF_USE_LEDS, Snp); @@ -446,7 +443,6 @@ SnpReset ( HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer); // assign size chosen in SnpInitialize Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf); // Write the conf - gBS->Stall (LAN9118_STALL); } // Enable the receiver and transmitter and clear their contents @@ -701,7 +697,6 @@ SnpReceiveFilters ( // Write the options to the MAC_CSR // IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCSRValue); - gBS->Stall (LAN9118_STALL); // // If we have to retrieve something, start packet reception. diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c index 61f11b6..50c004d 100644 --- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c +++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c @@ -284,7 +284,6 @@ IndirectEEPROMRead32 ( // Write to Eeprom command register Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd); - gBS->Stall (LAN9118_STALL); // Wait until operation has completed while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY); @@ -332,7 +331,6 @@ IndirectEEPROMWrite32 ( // Write to Eeprom command register Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd); - gBS->Stall (LAN9118_STALL); // Wait until operation has completed while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY); @@ -410,7 +408,6 @@ Lan9118Initialize ( if (((Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) { DEBUG ((DEBUG_NET, "Waking from reduced power state.\n")); Lan9118MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF); - gBS->Stall (LAN9118_STALL); } // Check that device is active @@ -495,7 +492,6 @@ SoftReset ( // Write the configuration Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf); - gBS->Stall (LAN9118_STALL); // Wait for reset to complete while (Lan9118MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) { @@ -590,7 +586,6 @@ ConfigureHardware ( // Write the configuration Lan9118MmioWrite32 (LAN9118_GPIO_CFG, GpioConf); - gBS->Stall (LAN9118_STALL); } return EFI_SUCCESS; @@ -719,7 +714,6 @@ StopTx ( TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG); TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP; Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg); - gBS->Stall (LAN9118_STALL); } // Check if already stopped @@ -738,7 +732,6 @@ StopTx ( if (TxCfg & TXCFG_TX_ON) { TxCfg |= TXCFG_STOP_TX; Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg); - gBS->Stall (LAN9118_STALL); // Wait for Tx to finish transmitting while (Lan9118MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX); @@ -773,7 +766,6 @@ StopRx ( RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG); RxCfg |= RXCFG_RX_DUMP; Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg); - gBS->Stall (LAN9118_STALL); while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP); } @@ -799,28 +791,23 @@ StartTx ( TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG); TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP; Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg); - gBS->Stall (LAN9118_STALL); } // Check if tx was started from MAC and enable if not if (Flags & START_TX_MAC) { MacCsr = IndirectMACRead32 (INDIRECT_MAC_INDEX_CR); - gBS->Stall (LAN9118_STALL); if ((MacCsr & MACCR_TX_EN) == 0) { MacCsr |= MACCR_TX_EN; IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr); - gBS->Stall (LAN9118_STALL); } } // Check if tx was started from TX_CFG and enable if not if (Flags & START_TX_CFG) { TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG); - gBS->Stall (LAN9118_STALL); if ((TxCfg & TXCFG_TX_ON) == 0) { TxCfg |= TXCFG_TX_ON; Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg); - gBS->Stall (LAN9118_STALL); } } @@ -850,14 +837,12 @@ StartRx ( RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG); RxCfg |= RXCFG_RX_DUMP; Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg); - gBS->Stall (LAN9118_STALL); while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP); } MacCsr |= MACCR_RX_EN; IndirectMACWrite32 (INDIRECT_MAC_INDEX_CR, MacCsr); - gBS->Stall (LAN9118_STALL); } return EFI_SUCCESS; @@ -1047,7 +1032,6 @@ ChangeFifoAllocation ( HwConf &= ~(0xF0000); HwConf |= ((TxFifoOption & 0xF) << 16); Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf); - gBS->Stall (LAN9118_STALL); return EFI_SUCCESS; }