| Message ID | 20180724070922.63362-1-ming.huang@linaro.org |
|---|---|
| Headers | show |
| Series | Upload for D06 platform | expand |
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_______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Tue, Jul 24, 2018 at 03:08:44PM +0800, Ming Huang wrote: > The major features of this patchset include: > 1 D06 source code; > 2 Unify some D0x modules; > > This patch set is base on pcihostbridage-v2. > For compiling D06, add below hunk to edk2-platforms.config > [d06] > LONGNAME=HiSilicon D06 > DSC=Platform/Hisilicon/D06/D06.dsc > ARCH=AARCH64 Very helpful, thank you. > > Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git > branch: d06-platform-v1 Now, I started by trying to compile this, but I run into two issues. First, the platform fails to build without FIRMWARE_VER specified on the command line, since there is an extra '"' in the definition of PcdFirmwareVersionString. Then there is a build fault when generating ACPI tables. I tried to update to a newer version of acpica-tools, but I still get: --- "aarch64-linux-gnu-gcc" -x c -E -include AutoGen.h -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables -I/work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/DEBUG -I/work/git/edk2/ArmPkg -I/work/git/edk2/ArmPkg/Include -I/work/git/edk2/ArmPlatformPkg -I/work/git/edk2/ArmPlatformPkg/Include -I/work/git/edk2/EmbeddedPkg -I/work/git/edk2/EmbeddedPkg/Include -I/work/git/edk2/MdeModulePkg -I/work/git/edk2/MdeModulePkg/Include -I/work/git/edk2/MdePkg -I/work/git/edk2/MdePkg/Include -I/work/git/edk2/MdePkg/Include/AArch64 -I/work/git/edk2-platforms/Silicon/Hisilicon -I/work/git/edk2-platforms/Silicon/Hisilicon/Include -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.i > /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iii Trim --source-code -l -o /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii"aarch64-linux-gnu-gcc" -x c -E -include AutoGen.h -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables -I/work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/DEBUG -I/work/git/edk2/ArmPkg -I/work/git/edk2/ArmPkg/Include -I/work/git/edk2/ArmPlatformPkg -I/work/git/edk2/ArmPlatformPkg/Include -I/work/git/edk2/EmbeddedPkg -I/work/git/edk2/EmbeddedPkg/Include -I/work/git/edk2/MdeModulePkg -I/work/git/edk2/MdeModulePkg/Include -I/work/git/edk2/MdePkg -I/work/git/edk2/MdePkg/Include -I/work/git/edk2/MdePkg/Include/AArch64 -I/work/git/edk2-platforms/Silicon/Hisilicon -I/work/git/edk2-platforms/Silicon/Hisilicon/Include -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.i > /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iii Trim --source-code -l -o /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi16Copyright (c) 2000 - 2018 Intel Corporation /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii 71: [0004] ID Count : 00000100 Error 6303 - Integer too large for target ^ (0000000000000100 - max 1 bytes) Table Input: /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii - 1991 lines, 59818 bytes, 68 fields Compilation complete. 2 Errors, 0 Warnings, 0 Remarks --- Any ideas what may be causing this? / Leif > > Heyi Guo (2): > Hisilicon/Hi1620: Add ACPI PPTT table > Platform/Hisilicon/D06: Enable ACPI PPTT > > Luqi Jiang (1): > Hisilicon/D06: add apei driver > > Ming Huang (18): > Silicon/Hisilicon: Modify the MRC interface for other module > Silicon/Hisilicon: Separate PlatformArch.h > Hisilicon/D06: Add several basal file for D06 > Platform/Hisilicon/D06: Add M41T83RealTimeClockLib > Platform/Hisilicon/D06: Add binary file for D06 > Hisilicon/D06: Add OemMiscLibD06 > Silicon/Hisilicon/D06: Wait for all disk ready > Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe > Silicon/Hisilicon/I2C: Optimize I2C library > Platform/Hisilicon/D06: Add OemNicLib > Hisilicon/D0X: Rename the global variable gDS3231RtcDevice > Platform/Hisilicon/D06: Add EarlyConfigPeim peim > Platform/Hisilicon/D06: Add PciHostBridgeLib > Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h > Silicon/Hisilicon/Setup: Support SPCR table switch > Silicon/Hisilicon/setup: Support SMMU switch > Hisilicon/D06: Add PciPlatformLib > Platform/Hisilicon/D0x: Update version string to 18.08 > > Sun Yuanchen (5): > Silicon/Hisilicon/D06: Stop watchdog > Silicon/Hisilicon/Acpi: Move some macro to PlatformArch.h > Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h > Hisilicon/D0x: Update SMBIOS type9 info > Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h > > Yan Zhang (2): > Hisilicon/D06: Add Debug Serial Port Init Driver > Hisilicon/D06: Add ACPI Tables for D06 > > Yang XinYi (2): > Hisilicon/D06: Add Hi1620OemConfigUiLib > Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" > > ZhenYao (1): > Silicon/Hisilicon/D06: Modify for close slave core clock. > > shaochangliang (6): > Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 > Silicon/Hisilicon/D06: Add I2C delay for HNS auto config > Silicon/Hisilicon/D06: Optimize HNS config CDR post time > Platform/Hisilicon/D06: Add OemNicConfig2P Driver > Hisilicon/D0x: Unify FlashFvbDxe driver > Silicon/Hisilicon/D06: Add I2C Bus Exception deal function > > xulinwei (1): > Platform/Hisilicon/D06: Add capsule upgrade support > > Platform/Hisilicon/D03/D03.dsc | 2 +- > Platform/Hisilicon/D03/D03.fdf | 6 +- > .../DS3231RealTimeClockLib.c | 8 +- > .../OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- > .../Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 24 + > .../OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 + > Platform/Hisilicon/D05/D05.dsc | 2 +- > Platform/Hisilicon/D05/D05.fdf | 6 +- > .../Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- > .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27 +- > .../Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + > .../SystemFirmwareUpdateConfig.ini | 46 + > Platform/Hisilicon/D06/D06.dec | 29 + > Platform/Hisilicon/D06/D06.dsc | 492 ++++ > Platform/Hisilicon/D06/D06.fdf | 444 ++++ > .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + > .../OemNicConfig2PHi1620/OemNicConfig2P.c | 71 + > .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + > .../SystemFirmwareDescriptor.aslc | 81 + > .../SystemFirmwareDescriptor.inf | 50 + > .../SystemFirmwareDescriptorPei.c | 70 + > .../D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 108 + > .../EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 + > .../Hisilicon/D06/Include/Library/CpldD06.h | 37 + > .../M41T83RealTimeClock.h | 168 ++ > .../M41T83RealTimeClockLib.c | 603 +++++ > .../M41T83RealTimeClockLib.inf | 46 + > .../Library/OemMiscLibD06/BoardFeatureD06.c | 432 ++++ > .../OemMiscLibD06/BoardFeatureD06Strings.uni | Bin 0 -> 5204 bytes > .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 246 ++ > .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + > .../D06/Library/OemNicLib/OemNicLib.c | 571 +++++ > .../D06/Library/OemNicLib/OemNicLib.inf | 35 + > .../PciHostBridgeLib/PciHostBridgeLib.c | 636 ++++++ > .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + > .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 22 +- > .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 7 +- > .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 1 + > .../HisiAcpiPlatformDxe/UpdateAcpiTable.c | 111 +- > .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +- > .../Smbios/MemorySubClassDxe/MemorySubClass.c | 22 +- > .../Smbios/MemorySubClassDxe/MemorySubClass.h | 2 - > .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 27 +- > .../Hisilicon/Hi1610/Include/PlatformArch.h | 69 + > .../Hi1616/D05AcpiTables/Hi1616Platform.h | 24 +- > .../Hisilicon/Hi1616/Include/PlatformArch.h | 69 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 92 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 48 + > .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 63 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 86 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 42 + > .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 326 +++ > .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 154 ++ > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 320 +++ > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 100 + > .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 379 ++++ > .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 145 ++ > .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 98 + > .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 58 + > .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 303 +++ > .../Hi1620/Drivers/Apei/OemApeiHi1620.h | 28 + > .../Pl011DebugSerialPortInitDxe.c | 64 + > .../Pl011DebugSerialPortInitDxe.inf | 48 + > .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + > .../Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 ++++ > .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + > .../Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + > .../Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + > .../Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + > .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 ++++++++++++ > .../Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + > .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++++++++++ > .../Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + > .../Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + > .../Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + > .../Dsdt/Hi1620Socip4_i2c100k.asl | 249 +++ > .../Dsdt/Hi1620Socip4_i2c400k.asl | 249 +++ > .../Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + > .../Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 ++++++++++++++ > .../Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + > .../Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + > .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + > .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 +++++++++++++++++ > .../Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 ++++++++++++++ > .../Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + > .../Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + > .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 ++ > .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 ++++ > .../Hi1620OemConfigUiLib/MemoryConfig.hfr | 154 ++ > .../Hi1620OemConfigUiLib/MemoryConfig.uni | 172 ++ > .../Hi1620OemConfigUiLib/MiscConfig.hfr | 48 + > .../Hi1620OemConfigUiLib/MiscConfig.uni | 36 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 380 ++++ > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h | 141 ++ > .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h | 64 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 67 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.uni | 24 + > .../OemConfigUiLibStrings.uni | 64 + > .../Hi1620OemConfigUiLib/OemConfigVfr.Vfr | 89 + > .../Hi1620OemConfigUiLib/PcieConfig.hfr | 219 ++ > .../PcieConfigStrings.uni | 185 ++ > .../Hi1620OemConfigUiLib/PciePortConfig.hfr | 167 ++ > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 171 ++ > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.uni | 135 ++ > .../Hi1620OemConfigUiLib/iBMCConfig.hfr | 80 + > .../Hi1620OemConfigUiLib/iBMCConfig.uni | 49 + > .../Hi1620/Include/Library/SerdesLib.h | 85 + > .../Hisilicon/Hi1620/Include/PlatformArch.h | 68 + > .../Hi1620PciPlatformLib.c | 69 + > .../Hi1620PciPlatformLib.inf | 30 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 +++++ > Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 69 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 + > Silicon/Hisilicon/HisiPkg.dec | 2 + > .../Hisilicon/Include/Library/AcpiNextLib.h | 31 +- > .../Hisilicon/Include/Library/HwMemInitLib.h | 351 +-- > .../Hisilicon/Include/Library/IpmiCmdLib.h | 16 + > Silicon/Hisilicon/Include/Library/LpcLib.h | 51 +- > .../Include/Library/OemAddressMapLib.h | 6 + > .../Hisilicon/Include/Library/OemConfigData.h | 85 + > .../Hisilicon/Include/Library/OemMiscLib.h | 5 +- > Silicon/Hisilicon/Include/Library/OemNicLib.h | 58 + > .../Include/Library/PlatformSysCtrlLib.h | 8 + > Silicon/Hisilicon/Include/PlatformArch.h | 35 - > .../DS3231RealTimeClockLib.c | 8 +- > Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 4 + > Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 220 +- > .../PlatformBootManagerLib/PlatformBm.c | 65 + > .../PlatformBootManagerLib.inf | 4 + > 133 files changed, 21324 insertions(+), 573 deletions(-) > create mode 100644 Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini > create mode 100644 Platform/Hisilicon/D06/D06.dec > create mode 100644 Platform/Hisilicon/D06/D06.dsc > create mode 100644 Platform/Hisilicon/D06/D06.fdf > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf > create mode 100644 Platform/Hisilicon/D06/Include/Library/CpldD06.h > create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf > create mode 100644 Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > create mode 100644 Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h > create mode 100644 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.c > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > create mode 100644 Silicon/Hisilicon/Include/Library/OemConfigData.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemNicLib.h > delete mode 100644 Silicon/Hisilicon/Include/PlatformArch.h > > -- > 2.17.0 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
在 8/2/2018 5:56 AM, Leif Lindholm 写道: > On Tue, Jul 24, 2018 at 03:08:44PM +0800, Ming Huang wrote: >> The major features of this patchset include: >> 1 D06 source code; >> 2 Unify some D0x modules; >> >> This patch set is base on pcihostbridage-v2. >> For compiling D06, add below hunk to edk2-platforms.config >> [d06] >> LONGNAME=HiSilicon D06 >> DSC=Platform/Hisilicon/D06/D06.dsc >> ARCH=AARCH64 > > Very helpful, thank you. > >> >> Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git >> branch: d06-platform-v1 > > Now, I started by trying to compile this, but I run into two issues. > > First, the platform fails to build without FIRMWARE_VER specified on > the command line, since there is an extra '"' in the definition of > PcdFirmwareVersionString. > > Then there is a build fault when generating ACPI tables. I tried to > update to a newer version of acpica-tools, but I still get: > --- > "aarch64-linux-gnu-gcc" -x c -E -include AutoGen.h > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables > -I/work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/DEBUG > -I/work/git/edk2/ArmPkg -I/work/git/edk2/ArmPkg/Include > -I/work/git/edk2/ArmPlatformPkg > -I/work/git/edk2/ArmPlatformPkg/Include -I/work/git/edk2/EmbeddedPkg > -I/work/git/edk2/EmbeddedPkg/Include -I/work/git/edk2/MdeModulePkg > -I/work/git/edk2/MdeModulePkg/Include -I/work/git/edk2/MdePkg > -I/work/git/edk2/MdePkg/Include > -I/work/git/edk2/MdePkg/Include/AArch64 > -I/work/git/edk2-platforms/Silicon/Hisilicon > -I/work/git/edk2-platforms/Silicon/Hisilicon/Include > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables > /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.i >> /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iii > Trim --source-code -l -o > /work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/work/git/tianocore/Build/D06/DEBUG_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii"aarch64-linux-gnu-gcc" > -x c -E -include AutoGen.h > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables > -I/work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/DEBUG > -I/work/git/edk2/ArmPkg -I/work/git/edk2/ArmPkg/Include > -I/work/git/edk2/ArmPlatformPkg > -I/work/git/edk2/ArmPlatformPkg/Include -I/work/git/edk2/EmbeddedPkg > -I/work/git/edk2/EmbeddedPkg/Include -I/work/git/edk2/MdeModulePkg > -I/work/git/edk2/MdeModulePkg/Include -I/work/git/edk2/MdePkg > -I/work/git/edk2/MdePkg/Include > -I/work/git/edk2/MdePkg/Include/AArch64 > -I/work/git/edk2-platforms/Silicon/Hisilicon > -I/work/git/edk2-platforms/Silicon/Hisilicon/Include > -I/work/git/edk2-platforms/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables > /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.i >> /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iii > Trim --source-code -l -o > /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi16Copyright > (c) 2000 - 2018 Intel Corporation > /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii > 71: [0004] ID Count : 00000100 > Error 6303 - > Integer too large for target ^ (0000000000000100 - max 1 bytes) > > Table Input: > /work/git/tianocore/Build/D06/RELEASE_GCC5/AARCH64/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620/OUTPUT/./Hi1620Iort.iiii > - 1991 lines, 59818 bytes, 68 fields > > Compilation complete. 2 Errors, 0 Warnings, 0 Remarks > --- > > Any ideas what may be causing this? > > / > Leif > I am sorry for the first issue, the modify FIRMWARE_VER patch is add alone just befor send out the patchset. For generating acpi table, I use acpica-tools 20180508 version and it works. I think acpica-tools are not backward compatibility and confused about acpica-tools. Thanks. >> >> Heyi Guo (2): >> Hisilicon/Hi1620: Add ACPI PPTT table >> Platform/Hisilicon/D06: Enable ACPI PPTT >> >> Luqi Jiang (1): >> Hisilicon/D06: add apei driver >> >> Ming Huang (18): >> Silicon/Hisilicon: Modify the MRC interface for other module >> Silicon/Hisilicon: Separate PlatformArch.h >> Hisilicon/D06: Add several basal file for D06 >> Platform/Hisilicon/D06: Add M41T83RealTimeClockLib >> Platform/Hisilicon/D06: Add binary file for D06 >> Hisilicon/D06: Add OemMiscLibD06 >> Silicon/Hisilicon/D06: Wait for all disk ready >> Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe >> Silicon/Hisilicon/I2C: Optimize I2C library >> Platform/Hisilicon/D06: Add OemNicLib >> Hisilicon/D0X: Rename the global variable gDS3231RtcDevice >> Platform/Hisilicon/D06: Add EarlyConfigPeim peim >> Platform/Hisilicon/D06: Add PciHostBridgeLib >> Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h >> Silicon/Hisilicon/Setup: Support SPCR table switch >> Silicon/Hisilicon/setup: Support SMMU switch >> Hisilicon/D06: Add PciPlatformLib >> Platform/Hisilicon/D0x: Update version string to 18.08 >> >> Sun Yuanchen (5): >> Silicon/Hisilicon/D06: Stop watchdog >> Silicon/Hisilicon/Acpi: Move some macro to PlatformArch.h >> Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h >> Hisilicon/D0x: Update SMBIOS type9 info >> Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h >> >> Yan Zhang (2): >> Hisilicon/D06: Add Debug Serial Port Init Driver >> Hisilicon/D06: Add ACPI Tables for D06 >> >> Yang XinYi (2): >> Hisilicon/D06: Add Hi1620OemConfigUiLib >> Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" >> >> ZhenYao (1): >> Silicon/Hisilicon/D06: Modify for close slave core clock. >> >> shaochangliang (6): >> Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 >> Silicon/Hisilicon/D06: Add I2C delay for HNS auto config >> Silicon/Hisilicon/D06: Optimize HNS config CDR post time >> Platform/Hisilicon/D06: Add OemNicConfig2P Driver >> Hisilicon/D0x: Unify FlashFvbDxe driver >> Silicon/Hisilicon/D06: Add I2C Bus Exception deal function >> >> xulinwei (1): >> Platform/Hisilicon/D06: Add capsule upgrade support >> >> Platform/Hisilicon/D03/D03.dsc | 2 +- >> Platform/Hisilicon/D03/D03.fdf | 6 +- >> .../DS3231RealTimeClockLib.c | 8 +- >> .../OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- >> .../Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 24 + >> .../OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 + >> Platform/Hisilicon/D05/D05.dsc | 2 +- >> Platform/Hisilicon/D05/D05.fdf | 6 +- >> .../Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- >> .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27 +- >> .../Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + >> .../SystemFirmwareUpdateConfig.ini | 46 + >> Platform/Hisilicon/D06/D06.dec | 29 + >> Platform/Hisilicon/D06/D06.dsc | 492 ++++ >> Platform/Hisilicon/D06/D06.fdf | 444 ++++ >> .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + >> .../OemNicConfig2PHi1620/OemNicConfig2P.c | 71 + >> .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + >> .../SystemFirmwareDescriptor.aslc | 81 + >> .../SystemFirmwareDescriptor.inf | 50 + >> .../SystemFirmwareDescriptorPei.c | 70 + >> .../D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 108 + >> .../EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 + >> .../Hisilicon/D06/Include/Library/CpldD06.h | 37 + >> .../M41T83RealTimeClock.h | 168 ++ >> .../M41T83RealTimeClockLib.c | 603 +++++ >> .../M41T83RealTimeClockLib.inf | 46 + >> .../Library/OemMiscLibD06/BoardFeatureD06.c | 432 ++++ >> .../OemMiscLibD06/BoardFeatureD06Strings.uni | Bin 0 -> 5204 bytes >> .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 246 ++ >> .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + >> .../D06/Library/OemNicLib/OemNicLib.c | 571 +++++ >> .../D06/Library/OemNicLib/OemNicLib.inf | 35 + >> .../PciHostBridgeLib/PciHostBridgeLib.c | 636 ++++++ >> .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + >> .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 22 +- >> .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 7 +- >> .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 1 + >> .../HisiAcpiPlatformDxe/UpdateAcpiTable.c | 111 +- >> .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +- >> .../Smbios/MemorySubClassDxe/MemorySubClass.c | 22 +- >> .../Smbios/MemorySubClassDxe/MemorySubClass.h | 2 - >> .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 27 +- >> .../Hisilicon/Hi1610/Include/PlatformArch.h | 69 + >> .../Hi1616/D05AcpiTables/Hi1616Platform.h | 24 +- >> .../Hisilicon/Hi1616/Include/PlatformArch.h | 69 + >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 92 + >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 48 + >> .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 63 + >> .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 86 + >> .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 42 + >> .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 326 +++ >> .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 154 ++ >> .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 320 +++ >> .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 100 + >> .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 379 ++++ >> .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 145 ++ >> .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 98 + >> .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 58 + >> .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 303 +++ >> .../Hi1620/Drivers/Apei/OemApeiHi1620.h | 28 + >> .../Pl011DebugSerialPortInitDxe.c | 64 + >> .../Pl011DebugSerialPortInitDxe.inf | 48 + >> .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + >> .../Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 ++++ >> .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + >> .../Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 ++++++++++++ >> .../Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++++++++++ >> .../Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + >> .../Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + >> .../Dsdt/Hi1620Socip4_i2c100k.asl | 249 +++ >> .../Dsdt/Hi1620Socip4_i2c400k.asl | 249 +++ >> .../Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + >> .../Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 ++++++++++++++ >> .../Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + >> .../Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + >> .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + >> .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 +++++++++++++++++ >> .../Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 ++++++++++++++ >> .../Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + >> .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 ++ >> .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 ++++ >> .../Hi1620OemConfigUiLib/MemoryConfig.hfr | 154 ++ >> .../Hi1620OemConfigUiLib/MemoryConfig.uni | 172 ++ >> .../Hi1620OemConfigUiLib/MiscConfig.hfr | 48 + >> .../Hi1620OemConfigUiLib/MiscConfig.uni | 36 + >> .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 380 ++++ >> .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h | 141 ++ >> .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h | 64 + >> .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 67 + >> .../Hi1620OemConfigUiLib/OemConfigUiLib.uni | 24 + >> .../OemConfigUiLibStrings.uni | 64 + >> .../Hi1620OemConfigUiLib/OemConfigVfr.Vfr | 89 + >> .../Hi1620OemConfigUiLib/PcieConfig.hfr | 219 ++ >> .../PcieConfigStrings.uni | 185 ++ >> .../Hi1620OemConfigUiLib/PciePortConfig.hfr | 167 ++ >> .../Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 171 ++ >> .../Hi1620/Hi1620OemConfigUiLib/RasConfig.uni | 135 ++ >> .../Hi1620OemConfigUiLib/iBMCConfig.hfr | 80 + >> .../Hi1620OemConfigUiLib/iBMCConfig.uni | 49 + >> .../Hi1620/Include/Library/SerdesLib.h | 85 + >> .../Hisilicon/Hi1620/Include/PlatformArch.h | 68 + >> .../Hi1620PciPlatformLib.c | 69 + >> .../Hi1620PciPlatformLib.inf | 30 + >> Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 +++++ >> Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 69 + >> Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 + >> Silicon/Hisilicon/HisiPkg.dec | 2 + >> .../Hisilicon/Include/Library/AcpiNextLib.h | 31 +- >> .../Hisilicon/Include/Library/HwMemInitLib.h | 351 +-- >> .../Hisilicon/Include/Library/IpmiCmdLib.h | 16 + >> Silicon/Hisilicon/Include/Library/LpcLib.h | 51 +- >> .../Include/Library/OemAddressMapLib.h | 6 + >> .../Hisilicon/Include/Library/OemConfigData.h | 85 + >> .../Hisilicon/Include/Library/OemMiscLib.h | 5 +- >> Silicon/Hisilicon/Include/Library/OemNicLib.h | 58 + >> .../Include/Library/PlatformSysCtrlLib.h | 8 + >> Silicon/Hisilicon/Include/PlatformArch.h | 35 - >> .../DS3231RealTimeClockLib.c | 8 +- >> Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 4 + >> Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 220 +- >> .../PlatformBootManagerLib/PlatformBm.c | 65 + >> .../PlatformBootManagerLib.inf | 4 + >> 133 files changed, 21324 insertions(+), 573 deletions(-) >> create mode 100644 Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini >> create mode 100644 Platform/Hisilicon/D06/D06.dec >> create mode 100644 Platform/Hisilicon/D06/D06.dsc >> create mode 100644 Platform/Hisilicon/D06/D06.fdf >> create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h >> create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c >> create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf >> create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc >> create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf >> create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c >> create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c >> create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf >> create mode 100644 Platform/Hisilicon/D06/Include/Library/CpldD06.h >> create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h >> create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c >> create mode 100644 Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf >> create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c >> create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni >> create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c >> create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf >> create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c >> create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf >> create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c >> create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf >> create mode 100644 Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> create mode 100644 Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.Vfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr >> create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni >> create mode 100644 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf >> create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.c >> create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h >> create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf >> create mode 100644 Silicon/Hisilicon/Include/Library/OemConfigData.h >> create mode 100644 Silicon/Hisilicon/Include/Library/OemNicLib.h >> delete mode 100644 Silicon/Hisilicon/Include/PlatformArch.h >> >> -- >> 2.17.0 >>
On Thu, Aug 02, 2018 at 09:46:13AM +0800, Ming wrote: > I am sorry for the first issue, the modify FIRMWARE_VER patch is add > alone just befor send out the patchset. > > For generating acpi table, I use acpica-tools 20180508 version and it works. > I think acpica-tools are not backward compatibility and confused about acpica-tools. Yes, it's a real pain. We used to have lots of issues with this, but the last couple of years have been less bad. Some platforms moved from .asl to .aslc to get around this. I can confirm using 20180508 version resolves this issue. And that 20180629 does not work :( Unfortunately that won't currently work with our AMD overdrive platforms. But we'll have to live with that for now. However, I notice the D02 build is now broken, due to the removal of Silicon/Hisilicon/Drivers/PciHostBridgeDxe. I guess this is not a huge issue, and maybe it is time to retire that platform anyway. If so, could you create a set removing D02 and the bits only used by it? / Leif _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Thu, Aug 02, 2018 at 11:12:56AM +0100, Leif Lindholm wrote: > On Thu, Aug 02, 2018 at 09:46:13AM +0800, Ming wrote: > > I am sorry for the first issue, the modify FIRMWARE_VER patch is add > > alone just befor send out the patchset. > > > > For generating acpi table, I use acpica-tools 20180508 version and it works. > > I think acpica-tools are not backward compatibility and confused about acpica-tools. > > Yes, it's a real pain. We used to have lots of issues with this, but > the last couple of years have been less bad. > Some platforms moved from .asl to .aslc to get around this. > > I can confirm using 20180508 version resolves this issue. > And that 20180629 does not work :( > Unfortunately that won't currently work with our AMD overdrive > platforms. But we'll have to live with that for now. > This sounds like a bug in IORT support in acpica tools as it works for other tables. Graeme _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Tue, Jul 24, 2018 at 03:09:10PM +0800, Ming Huang wrote: > From: Sun Yuanchen <sunyuanchen@huawei.com> > > Move some RAS macros definition to PlatformArch.h for > unifying D0x Minor comments below. However, I would still prefer for this to be split up into a refactoring patch for d03/d05, and then simpley introduced when the d06 files are added. / Leif > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Sun Yuanchen <sunyuanchen@huawei.com> > Signed-off-by: Ming Huang <ming.huang@linaro.org> > Signed-off-by: Heyi Guo <heyi.guo@linaro.org> > --- > Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 7 +++++-- > Silicon/Hisilicon/Hi1616/Include/PlatformArch.h | 4 ++++ > Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 8 ++++++-- > 3 files changed, 15 insertions(+), 4 deletions(-) > > diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > index 4843b60536..5198e3efff 100644 > --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h > @@ -1,7 +1,7 @@ > /** @file > * > -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. > -* Copyright (c) 2015, Linaro Limited. All rights reserved. > +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. > * > * This program and the accompanying materials > * are licensed and made available under the terms and conditions of the BSD License > @@ -38,6 +38,9 @@ > > #define S1_BASE 0x40000000000 > > +#define RASC_BASE (0x5000) > +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ > +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ Character encoding issues in comment. > > // > // ACPI table information used to initialize tables. > diff --git a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > index 49618f6559..5124714cb5 100644 > --- a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h > @@ -30,6 +30,10 @@ > // Max NUMA node number for each node type > #define MAX_NUM_PER_TYPE 8 > > +#define RASC_BASE (0x5000) > +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ > +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ > + Character encoding issues in comment. > // for acpi > #define NODE_IN_SOCKET 2 > #define CORE_NUM_PER_SOCKET 32 > diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > index 2626751a0d..f2491315a8 100644 > --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > @@ -1,7 +1,7 @@ > /** @file > * > -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. > -* Copyright (c) 2015, Linaro Limited. All rights reserved. > +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. > +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. > * > * This program and the accompanying materials > * are licensed and made available under the terms and conditions of the BSD License > @@ -31,6 +31,10 @@ > #define MAX_NUM_PER_TYPE 8 > > > +#define RASC_BASE (0x1800) > +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x58) /* configuration register for Rank statistical information */ > +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xD4) /* configuration register for Sparing level */ > + Much nicer comments. > // for acpi > #define NODE_IN_SOCKET 2 > #define CORE_NUM_PER_SOCKET 48 > -- > 2.17.0 >
在 8/2/2018 6:12 PM, Leif Lindholm 写道: > On Thu, Aug 02, 2018 at 09:46:13AM +0800, Ming wrote: >> I am sorry for the first issue, the modify FIRMWARE_VER patch is add >> alone just befor send out the patchset. >> >> For generating acpi table, I use acpica-tools 20180508 version and it works. >> I think acpica-tools are not backward compatibility and confused about acpica-tools. > > Yes, it's a real pain. We used to have lots of issues with this, but > the last couple of years have been less bad. > Some platforms moved from .asl to .aslc to get around this. > > I can confirm using 20180508 version resolves this issue. > And that 20180629 does not work :( > Unfortunately that won't currently work with our AMD overdrive > platforms. But we'll have to live with that for now. > > However, I notice the D02 build is now broken, due to the removal of > Silicon/Hisilicon/Drivers/PciHostBridgeDxe. I guess this is not a huge > issue, and maybe it is time to retire that platform anyway. > If so, could you create a set removing D02 and the bits only used by > it? > > / > Leif > Yes, D02 is not need to maintain now. I will send the removing patch set later. Ming
On Tue, Jul 24, 2018 at 03:09:14PM +0800, Ming Huang wrote: > From: Luqi Jiang <jiangluqi@huawei.com> > > This driver provide a means for the platform to > convey error information to OSPM. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Luqi Jiang <jiangluqi@huawei.com> > Signed-off-by: Ming Huang <ming.huang@linaro.org> > Signed-off-by: Heyi Guo <heyi.guo@linaro.org> > --- > Platform/Hisilicon/D06/D06.dsc | 1 + > Platform/Hisilicon/D06/D06.fdf | 1 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 92 +++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 48 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 63 ++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 86 +++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 42 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 326 +++++++++++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 154 ++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 320 +++++++++++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 100 ++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 379 ++++++++++++++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 145 ++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 98 +++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 58 +++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c | 303 ++++++++++++++++ > Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h | 28 ++ > 17 files changed, 2244 insertions(+) > > diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc > index 28dd7926f4..0a7681915c 100644 > --- a/Platform/Hisilicon/D06/D06.dsc > +++ b/Platform/Hisilicon/D06/D06.dsc > @@ -344,6 +344,7 @@ > Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf > Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > > + Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > # > # Usb Support > diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf > index ec424d49ed..264f717d9d 100644 > --- a/Platform/Hisilicon/D06/D06.fdf > +++ b/Platform/Hisilicon/D06/D06.fdf > @@ -251,6 +251,7 @@ READ_LOCK_STATUS = TRUE > > INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf > INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf > + INF Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > > INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c > new file mode 100644 > index 0000000000..1b108c9881 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c > @@ -0,0 +1,92 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > +#include <Library/OemConfigData.h> > +#include <Library/UefiRuntimeServicesTableLib.h> > +#include "Apei.h" > +#include "Bert/bert.h" Bert.h. > +#include "Einj/einj.h" Einj.h. > +#include "Erst/erst.h" Erst.h. > +#include "Hest/hest.h" Hest.h. > + > +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL; > +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL; > +APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; TrustedFirmware. Struct, rather than Struc. But also, Struct isn't a very descriptive name. We already know it's some form of struct. What about Context? Data? > + > +EFI_STATUS > +EFIAPI > +ApeiEntryPoint( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > +) > +{ > + EFI_STATUS Status; > + ARM_SMC_ARGS SmcRegs = {0}; > + UINTN Size = sizeof (OEM_CONFIG_DATA); > + OEM_CONFIG_DATA SetupData; > + > + Status = gRT->GetVariable ( > + OEM_CONFIG_NAME, > + &gOemConfigGuid, > + NULL, > + &Size, > + &SetupData > + ); > + if (EFI_ERROR (Status)) { > + SetupData.EnRasSupport = 1; > + DEBUG ((DEBUG_ERROR, "[%a]GetVariable %r.Get default variable value\n", __FUNCTION__, Status)); Quite long lines in this function. Please wrap at 80. > + } > + if (!SetupData.EnRasSupport) { > + return EFI_ABORTED; > + } > + if (PcdGet64 (PcdTrustedFirmwareEnable) == 0) { > + return EFI_ABORTED; > + } > + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status = gBS->AllocatePool ( > + EfiReservedMemoryType, > + sizeof(APEI_TRUSTFIRMWARE_STRUCTURE), Space before (. Please search and replace throughout this patch. > + (VOID**)&mApeiTrustfirmwareStruc > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + gBS->SetMem ( > + mApeiTrustfirmwareStruc, > + sizeof (APEI_TRUSTFIRMWARE_STRUCTURE), > + 0 > + ); > + Status = EFI_SUCCESS; > + Status |= OemInitBertTable (ImageHandle); > + Status |= OemInitHestTable (ImageHandle); > + Status |= OemInitErstTable (); > + Status |= OemInitEinjTable (); > + // smc call > + DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); > + if (Status == EFI_SUCCESS) { > + SmcRegs.Arg0 = PRIVATE_ARM_SMC_ID_APEI; > + SmcRegs.Arg1 = (UINTN)mApeiTrustfirmwareStruc; > + ArmCallSmc (&SmcRegs); > + } > + DEBUG ((DEBUG_INFO, "Acpi Apei init done.\n")); > + return EFI_SUCCESS; > +} > + > + > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > new file mode 100644 > index 0000000000..39f028b203 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > @@ -0,0 +1,48 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > +#ifndef _APEI_H_ > +#define _APEI_H_ > + > +#include <Hi1620Platform.h> > +#include <IndustryStandard/Acpi.h> > +#include <Library/ArmSmcLib.h> > +#include <Library/BaseMemoryLib.h> > +#include <Library/DebugLib.h> > +#include <Library/IoLib.h> > +#include <Library/MemoryAllocationLib.h> > +#include <Library/UefiBootServicesTableLib.h> > +#include <Library/UefiLib.h> > +#include <Protocol/AcpiSystemDescriptionTable.h> > +#include <Protocol/AcpiTable.h> I am not generally a fan of including header files not needed by the header file itself. Please move those to the individual .c files. This includes including _this_ file in all of the xxxx.h files, where not needed. > + > +#define EFI_ACPI_MAX_NUM_TABLES 20 > +#define PRIVATE_ARM_SMC_ID_APEI 0x83000100 > +#define PRIVATE_ARM_SMC_ID_APEI_S 0x83000101 > + > +typedef struct { > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestCorrectedErrorGhesV2; > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestFatalErrorGhesV2; > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestRecoverableErrorGhesV2; > + EFI_PHYSICAL_ADDRESS HestTableAddress; > + EFI_PHYSICAL_ADDRESS EinjTableAddress; > + EFI_PHYSICAL_ADDRESS EinjDataStruct; > + VOID *ErstContext; > +} APEI_TRUSTFIRMWARE_STRUCTURE; This really ought to be APEI_TRUSTED_FIRMWARE_STRUCTURE. (And this is where the orderFile comes in handy: letting struct definitions be reviewed before their use.) > + > +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; > +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; > +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; > + > + > +#endif // _APEI_H_ > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > new file mode 100644 > index 0000000000..c80bcbcacc > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > @@ -0,0 +1,63 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. 2018? Please update throughout. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +[defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = AcpiApei > + FILE_GUID = E9570C39-EF68-4fc6-B921-C1954A87CCD2 > + MODULE_TYPE = DXE_DRIVER > + VERSION_STRING = 1.0 > + ENTRY_POINT = ApeiEntryPoint > + > +[sources.common] > + Apei.c Apei.h? > + Bert/bert.c > + Bert/bert.h > + Einj/einj.c > + Einj/einj.h > + Erst/erst.c > + Erst/erst.h > + Hest/hest.c > + Hest/hest.h > + ErrorSource/Ghes.c > + ErrorSource/Ghes.h > + OemApeiHi1620.c > + > +[Packages] > + ArmPkg/ArmPkg.dec > + MdePkg/MdePkg.dec > + Silicon/Hisilicon/HisiPkg.dec > + > +[LibraryClasses] > + ArmSmcLib > + BaseMemoryLib > + DebugLib > + HobLib > + TimerLib > + UefiDriverEntryPoint > + UefiRuntimeServicesTableLib > + > +[Guids] > + gOemConfigGuid > + > +[Protocols] > + gEfiAcpiSdtProtocolGuid > + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED > + > +[Pcd] > + gHisiTokenSpaceGuid.PcdCpldBaseAddress > + gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable > + > +[Depex] > + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c > new file mode 100644 > index 0000000000..ff87e56cf5 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c > @@ -0,0 +1,86 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include "bert.h" > +#include "./ErrorSource/Ghes.h" Drop the "./". > + > +VOID > +BertSetAcpiTable ( > + IN BERT_CONTEXT *Context > +) > +{ > + UINTN AcpiTableHandle; > + EFI_STATUS Status; > + if (Context == NULL) { > + return; > + } > + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER* Bert = Context->BertHeader; > + Bert->Header.Checksum = CalculateCheckSum8 ((UINT8*)(Bert), Bert->Header.Length); > + AcpiTableHandle = 0; > + Status = mAcpiTableProtocol->InstallAcpiTable ( > + mAcpiTableProtocol, > + Bert, > + Bert->Header.Length, > + &AcpiTableHandle); > + ASSERT_EFI_ERROR (Status); > + return; > +} > + > +BOOLEAN > +BertAddGenericErrorData ( > + IN EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER *Bert, > + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, > + IN VOID *GenericErrorData, > + IN UINT32 SizeOfGenericErrorData, > + IN ERROR_SEVERITY ErrorSeverity, > + IN BOOLEAN Correctable > +) > +{ > + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: \n", __FUNCTION__, __LINE__)); > + BOOLEAN Status = ErrorBlockAddErrorData ( > + (VOID*)Bert->BootErrorRegion, > + Bert->BootErrorRegionLength, > + TypeOfErrorData, > + GenericErrorData, > + SizeOfGenericErrorData, > + ErrorSeverity, > + Correctable); > + return Status; > +} > + > +EFI_STATUS > +BertHeaderCreator ( > + IN BERT_CONTEXT *Context, > + IN UINT32 ErrorBlockSize > +) > +{ > + if (Context == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + Context->BertHeader = AllocateZeroPool (sizeof (EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER)); > + Context->Block = AllocateReservedZeroPool (ErrorBlockSize); > + Context->BlockSize = ErrorBlockSize; > + *Context->BertHeader = (EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER) { > + ARM_ACPI_HEADER ( > + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE, > + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER, > + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION > + ), > + Context->BlockSize, > + (UINT64)Context->Block > + }; > + return EFI_SUCCESS; > +} > + > + > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h > new file mode 100644 > index 0000000000..af38a765bd > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h > @@ -0,0 +1,42 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#ifndef _BERT_H_ > +#define _BERT_H_ > + > +#include "Apei.h" > +#include <Guid/Cper.h> > + > +typedef struct _BERT_CONTEXT { > + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER *BertHeader; // pointer to best header 'best headr' -> 'bert header'? But anyway, the variable name is descriptive enough that the comment is not needed. > + VOID *Block; > + UINT32 BlockSize; // allocated memory size for bert's error block > +} BERT_CONTEXT; > + > +EFI_STATUS > +OemInitBertTable ( > + IN EFI_HANDLE ImageHandle > +); > +VOID > +BertSetAcpiTable ( > + IN BERT_CONTEXT *Context > +); > +EFI_STATUS > +BertHeaderCreator ( > + BERT_CONTEXT *Context, > + UINT32 ErrorBlockSize > +); > + > + > +#endif // _BERT_H_ > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c > new file mode 100644 > index 0000000000..898863718b > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c > @@ -0,0 +1,326 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > +#include "einj.h" > +#include "OemApeiHi1620.h" > + > + > +EINJ_TABLE mEinj = { > + { > + ARM_ACPI_HEADER( > + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE, > + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER, > + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION > + ), > + sizeof(EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER), > + 0x0, > + { > + 0x0, > + 0x0, > + 0x0 > + }, > + EINJ_ACTION_NO > + }, > + { > + { > + // 0 EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION > + EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + EINJ_BEGIN_OPERATION_VALUE, > + EINJ_WRITE_MASK > + }, > + { > + // 1 EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE > + EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE, > + EFI_ACPI_6_0_EINJ_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + EINJ_READ_MASK > + }, > + { > + // 2 EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE > + EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + EINJ_WRITE_MASK > + }, > + { > + // 3 EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE > + EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE, > + EFI_ACPI_6_0_EINJ_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + 0xFFFFFFFF > + }, > + { > + // 4 EFI_ACPI_6_0_EINJ_END_OPERATION > + EFI_ACPI_6_0_EINJ_END_OPERATION, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + EINJ_END_OPERATION_VALUE, > + 0xFFFFFFFF > + }, > + { > + // 5 EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION > + EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 32, > + 0, > + EFI_ACPI_6_0_DWORD, > + GPIO1_BASE + GPIO_INT_MASK //0x40070008//0x4d000F00//GPIO0_BASE + GPIO0_SWPORT_DR_OFFSET > + }, > + 0, > + 0xFFFFFFFF //BIT0 > + }, > + { > + // 6 EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS > + EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS, > + EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0x01, > + 0x01 > + }, > + { > + // 7 EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS > + EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS, > + EFI_ACPI_6_0_EINJ_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + 0x3 > + }, > + { > + // 8 EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS > + EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + 0xFFFFFF > + }, > + { > + // 9 EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS > + EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS, > + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, > + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + 0xFFFFFF > + } > + } > +}; > + > +EINJ_TRIGGER_ERROR_ACTION mEinjTriggerErrorAction = { > + { > + sizeof(EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE), > + 0, > + sizeof(EINJ_TRIGGER_ERROR_ACTION), > + EINJ_TRIGGER_ERROR_ACTION_NO > + }, > + { > + { > + EFI_ACPI_6_0_EINJ_TRIGGER_ERROR, > + EFI_ACPI_6_0_EINJ_NOOP, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_DWORD, > + 0 > + }, > + 0, > + 0 > + } > + } > +}; > + > + > +VOID > +EinjSetAcpiTable( > + EINJ_CONTEXT *Context > +) > +{ > + UINTN AcpiTableHandle; > + EFI_STATUS Status; > + UINT8 Checksum; > + EFI_ACPI_SDT_HEADER *Table; > + EFI_ACPI_TABLE_VERSION TableVersion; > + UINTN TableKey; > + UINTN i; > + //gBS->CloseEvent(Event); > + Context->EINJ->EinjTableHeader.Header.Length = sizeof (EINJ_TABLE); //mEinj.EinjTableHeader.Header.Length = sizeof(EINJ_TABLE); Delete the commented out code. > + Checksum = CalculateCheckSum8 ((UINT8*)(Context->EINJ), Context->EINJ->EinjTableHeader.Header.Length); Wrap. > + Context->EINJ->EinjTableHeader.Header.Checksum = Checksum; > + AcpiTableHandle = 0; > + Status = mAcpiTableProtocol->InstallAcpiTable ( > + mAcpiTableProtocol, > + Context->EINJ, > + Context->EINJ->EinjTableHeader.Header.Length, > + &AcpiTableHandle > + ); > + for (i = 0; i < EFI_ACPI_MAX_NUM_TABLES; i++) { > + Status = mAcpiSdtProtocol->GetAcpiTable(i, &Table, &TableVersion, &TableKey); > + if (EFI_ERROR (Status)) { > + break; > + } > + if (Table->Signature != EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE) { > + continue; > + } > + mApeiTrustfirmwareStruc->EinjTableAddress = (EFI_PHYSICAL_ADDRESS)Table; > + mApeiTrustfirmwareStruc->EinjDataStruct = (EFI_PHYSICAL_ADDRESS)Context->EinjData; > + } > + ASSERT_EFI_ERROR (Status) ; > +} > +//V2 > +EFI_STATUS > +EinjHeaderCreator( > + EINJ_CONTEXT *Context > +) > +{ > + EFI_STATUS Status; > + EINJ_DATA_STRUCTURE *EinjData = NULL; > + Status = gBS->AllocatePool ( > + EfiReservedMemoryType, > + sizeof (EINJ_DATA_STRUCTURE), > + (VOID**)(&EinjData) > + ); Drop the redundant parentheses. > + if (EFI_ERROR (Status)) { > + return Status; > + } > + gBS->SetMem ( > + EinjData, > + sizeof (EINJ_DATA_STRUCTURE), > + 0 > + ); > + > + DEBUG ((DEBUG_INFO, "EINJ EinjData is at 0x%X,size =0x%x\n", EinjData, sizeof (EINJ_DATA_STRUCTURE))); > + EinjData->TriggerErrorActionTablePtr = (EINJ_TRIGGER_ERROR_ACTION*)(&(EinjData->TriggerErrorActionTable)); > + gBS->CopyMem (EinjData->TriggerErrorActionTablePtr, &mEinjTriggerErrorAction, sizeof (EINJ_TRIGGER_ERROR_ACTION)); Many very long lines in this function. Please wrap. > + EinjData->OperationBegin = 0; > + EinjData->ErrorType = 0; > + EinjData->ErrorCapabilities = 0xFFF; > + EinjData->BusyStatus = 0; > + EinjData->CommandStatus = 0; > + mEinj.EinjInstructionEntry[0].RegisterRegion.Address = (UINT64)(&(EinjData->OperationBegin)); > + mEinj.EinjInstructionEntry[1].RegisterRegion.Address = (UINT64)(&(EinjData->TriggerErrorActionTablePtr)); > + mEinj.EinjInstructionEntry[2].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorType)); > + mEinj.EinjInstructionEntry[3].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorCapabilities)); > + mEinj.EinjInstructionEntry[4].RegisterRegion.Address = (UINT64)(&(EinjData->OperationBegin)); > + mEinj.EinjInstructionEntry[6].RegisterRegion.Address = (UINT64)(&(EinjData->BusyStatus)); > + mEinj.EinjInstructionEntry[7].RegisterRegion.Address = (UINT64)(&(EinjData->CommandStatus)); > + mEinj.EinjInstructionEntry[8].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorTypeWithAddress)); > + mEinj.EinjInstructionEntry[9].RegisterRegion.Address = (UINT64)(&(EinjData->Timming)); > + EinjData->ErrorTypeWithAddress.VendorErrorTypeOffset > + = (UINT32)((UINTN) & (EinjData->VendorErrorTypeExtension) - (UINTN) & (EinjData->ErrorTypeWithAddress)); No spaces around '&'. > + // Drop empty comment. (But do leave a blank line.) > + Context->EinjData = EinjData; > + Context->EINJ = &mEinj; > + Context->ExecuteOperationEntry = &mEinj.EinjInstructionEntry[5]; > + Context->GetErrorTypeEntry = &mEinj.EinjInstructionEntry[3]; > + return EFI_SUCCESS; > +} > + > + > +EFI_STATUS > +EinjConfigErrorInjectCapability( > + EINJ_CONTEXT* Context, > + UINT32 BitsSupportedErrorType > +) > +{ > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY* KeyEntry; > + UINT32* EinjCapablity; > + > + KeyEntry = Context->GetErrorTypeEntry; > + EinjCapablity = (UINT32*)KeyEntry->RegisterRegion.Address; > + *EinjCapablity = BitsSupportedErrorType; > + KeyEntry->Value = BitsSupportedErrorType; > + return EFI_SUCCESS; > +} > + > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > new file mode 100644 > index 0000000000..a5342b600f > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > @@ -0,0 +1,154 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#ifndef _EINJ_H_ > +#define _EINJ_H_ > + > +#include "Apei.h" > + > +#define EINJ_ACTION_NO 10 > +#define EINJ_BEGIN_OPERATION_VALUE 0xFFFF > +#define EINJ_END_OPERATION_VALUE 0 > +#define EINJ_WRITE_MASK 0xFFFFFFFF > +#define EINJ_READ_VALUE 0xFFFF > +#define EINJ_READ_MASK 0xFFFFFFFF > + > +#define EINJ_TRIGGER_ERROR_ACTION_NO 1 > + > +#define EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 > +#define EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS 0x09 > + > + > +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; > +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; > +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; > + > +// > +// Error Type Definition > +// > +#define EINJ_PROCESSOR_CORRECTABLE BIT0 > +#define EINJ_PROCESSOR_UNCORRECTABLE_NONFATAL BIT1 > +#define EINJ_PROCESSOR_UNCORRECTABLE_FATAL BIT2 > +#define EINJ_MEMORY_CORRECTABLE BIT3 > +#define EINJ_MEMORY_UNCORRECTABLE_NONFATAL BIT4 > +#define EINJ_MEMORY_UNCORRECTABLE_FATAL BIT5 > +#define EINJ_PCIE_CORRECTABLE BIT6 > +#define EINJ_PCIE_UNCORRECTABLE_NONFATAL BIT7 > +#define EINJ_PCIE_UNCORRECTABLE_FATAL BIT8 > +#define EINJ_PLATFORM_CORRECTABLE BIT9 > +#define EINJ_PLATFORM_UNCORRECTABLE_NONFATAL BIT10 > +#define EINJ_PLATFORM_UNCORRECTABLE_FATAL BIT11 > +#define EINJ_VENDOR_DEFINED_ERROR_TYPE BIT31 > + > +// > +#define EINJ_PROCESSOR_APIC_VALID BIT0 > +#define EINJ_MEMORY_ADDRESS_VALID BIT1 > +#define EINJ_PCIE_SBDF_VALID BIT2 > + > +//CPER > +#define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 > + > +#define EFI_GENERIC_ERROR_PROC_ISA_ARM32 0x03 > +#define EFI_GENERIC_ERROR_PROC_ISA_ARM64 0x04 Surely these should be added to MdePkg/Include/Guid/Cper.h instead? Please submit a patch. > + > +/// > +/// EINJ Table > +/// > + > + > +typedef struct { > + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER EinjTableHeader; > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY EinjInstructionEntry[EINJ_ACTION_NO]; > +} EINJ_TABLE; > + > +typedef struct { > + EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE TriggerErrorHeader; > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY ErrorInstructionEntry[EINJ_TRIGGER_ERROR_ACTION_NO]; > +} EINJ_TRIGGER_ERROR_ACTION; > + > +typedef struct { > + UINT32 Reserved: 8; > + UINT32 Function: 3; > + UINT32 Device: 5; > + UINT32 PrimaryOrDeviceBus: 8; > + UINT32 Segment: 8; > +} EINJ_PCIE_SBDF; > + > +typedef struct { > + UINT32 ErrorType; > + UINT32 VendorErrorTypeOffset; > + UINT32 Flags; > + UINT32 ApicId; > + UINT64 MemAddress; > + UINT64 MemAddressRange; > + EINJ_PCIE_SBDF PcieSBDF; > +} EINJ_SET_ERROR_TYPE_WITH_ADDRESS; > + > +typedef struct { > + UINT32 Length; > + UINT32 SBDF; > + UINT16 VendorId; > + UINT16 DeviceId; > + UINT8 RevId; > + UINT8 Reserved[3]; > +} EINJ_VENDOR_ERROR_TYPE; > + > +typedef struct { > + UINT64 OperationBegin; > + UINT64 ErrorType; > + UINT64 ErrorCapabilities;// TODO: modified to uint32 Is it 32-bit or 64-bit? If it needs to be 32-bit, make it so - don't say you intend to do so in future. > + UINT64 BusyStatus; > + UINT64 CommandStatus; > + UINT64 Timming; > + EINJ_TRIGGER_ERROR_ACTION *TriggerErrorActionTablePtr; > + EINJ_SET_ERROR_TYPE_WITH_ADDRESS ErrorTypeWithAddress; > + EINJ_VENDOR_ERROR_TYPE VendorErrorTypeExtension; > + EINJ_TRIGGER_ERROR_ACTION TriggerErrorActionTable; > +} EINJ_DATA_STRUCTURE; > + > +// V2 > +typedef struct _EINJ_CONTEXT { > + EINJ_TABLE *EINJ; // pointer to EINJ header > + EINJ_DATA_STRUCTURE *EinjData; > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY *GetErrorTypeEntry;// error injection capabilities > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY *ExecuteOperationEntry; > +} EINJ_CONTEXT; > + > + > +EFI_STATUS > +InitEinjTable(VOID); > +// Version2 > +EFI_STATUS > +EinjConfigErrorInjectCapability( > + EINJ_CONTEXT *Context, > + UINT32 BitsSupportedErrorType > +); > +EFI_STATUS > +EinjHeaderCreator( > + EINJ_CONTEXT *Context > +); > +/***OEM***/ > +EFI_STATUS > +OemInitEinjTable(VOID); > +EFI_STATUS > +OemEinjConfigExecuteOperationEntry( > + EINJ_CONTEXT *Context > +); > +VOID > +EinjSetAcpiTable( > + EINJ_CONTEXT *Context > +); > + > + > +#endif // _EINJ_H_ > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c > new file mode 100644 > index 0000000000..338f56c0a2 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c > @@ -0,0 +1,320 @@ > +/** @file > +* > +* Copyright (c) 2018 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#include <Uefi/UefiBaseType.h> > +#include <Guid/Cper.h> > +#include "Ghes.h" > + > +#define READ_ACK_PRESERVE 0xFFFFFFFE > +#define READ_ACK_WRITE 0x1 > + > +EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* > +ErrorBlockInitial( > + VOID *Block, > + UINT32 Severity > +) > +{ > + EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* BlockHeader = Block; > + BlockHeader->BlockStatus = (EFI_ACPI_6_1_ERROR_BLOCK_STATUS) {0, 0, 0, 0, 0}; > + BlockHeader->RawDataOffset = 0; > + BlockHeader->RawDataLength = 0; > + BlockHeader->DataLength = 0;//sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE); > + BlockHeader->ErrorSeverity = Severity; > + return BlockHeader; > +} > + > + > +BOOLEAN > +ErrorBlockUpdateStatusStructure( > + VOID *ErrorBlock > +) > +{ > + if (ErrorBlock == NULL) { > + return FALSE; > + } > + IN EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE *BlockHeader = ErrorBlock; > + VOID *EntriesBegin = ErrorBlock + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE); > + if (BlockHeader->BlockStatus.ErrorDataEntryCount == 0) { > + //memset(EntriesBegin, 0, BlockHeader->DataLength); > + gBS->SetMem(EntriesBegin, BlockHeader->DataLength, 0); > + BlockHeader->RawDataLength = 0; > + BlockHeader->RawDataOffset = 0; > + BlockHeader->DataLength = 0; > + } > + return TRUE; > +} > + > + > +BOOLEAN > +ErrorBlockAddErrorData( > + IN VOID *ErrorBlock, > + IN UINT32 MaxBlockLength, > + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, > + IN VOID *GenericErrorData, > + IN UINT32 SizeOfGenericErrorData, > + IN ERROR_SEVERITY ErrorSeverity, > + IN BOOLEAN Correctable > +) > +{ > + if (ErrorBlock == NULL || GenericErrorData == NULL) { > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Invalid Param \n", __FUNCTION__, __LINE__)); > + return FALSE; > + } > + EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE* Entry; > + EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* BlockHeader = ErrorBlock; > + EFI_ACPI_6_1_ERROR_BLOCK_STATUS* BlockStatus = &BlockHeader->BlockStatus; > + (VOID)ErrorBlockUpdateStatusStructure(ErrorBlock); > + UINT32 ExpectedNewDataLength = BlockHeader->DataLength + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + SizeOfGenericErrorData; > + if (sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE) + ExpectedNewDataLength > MaxBlockLength) { Wrap long lines. > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Out of BlockSize \n", __FUNCTION__, __LINE__)); > + return FALSE; > + } > + // guid > + EFI_GUID Guid; > + switch (TypeOfErrorData) { > + case PROCESSOR_GENERIC: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID; > + break; > + case PROCESSOR_ARM: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID; > + break; > + case PLATFORM_MEMORY: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID; > + break; > + case PLATFORM_MEMORY2: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID; > + break; > + case PCIE_EXPRESS: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCIE_GUID; > + break; > + case FIRMWARE_ERROR: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID; > + break; > + case PCI_BUS: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID; > + break; > + case PCI_COMPONENT: > + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCI_DEVICE_GUID; > + break; > + default: > + return FALSE; > + } > + //Block Status > + if (Correctable == TRUE) { > + if (BlockStatus->CorrectableErrorValid == 0) { > + BlockStatus->CorrectableErrorValid = 1; > + } else { > + BlockStatus->MultipleCorrectableErrors = 1; > + } > + } else { > + if (BlockStatus->UncorrectableErrorValid == 0) { > + BlockStatus->UncorrectableErrorValid = 1; > + } else { > + BlockStatus->MultipleUncorrectableErrors = 1; > + } > + } > + BlockStatus->ErrorDataEntryCount++; > + // Entry > + Entry = (EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE*)(ErrorBlock + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE) + BlockHeader->DataLength); > + gBS->SetMem(Entry, sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE), 0); > + gBS->CopyMem(&Entry->SectionType, &Guid, sizeof(EFI_GUID)); > + Entry->ErrorSeverity = ErrorSeverity; > + Entry->Revision = EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_REVISION; > + Entry->ErrorDataLength = SizeOfGenericErrorData; > + VOID* GenericErrorDataFollowEntry = (VOID*)Entry + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE); Wrap long lines. > + gBS->CopyMem(GenericErrorDataFollowEntry, GenericErrorData, SizeOfGenericErrorData); > + // BlockHeader > + BlockHeader->RawDataOffset = 0; > + BlockHeader->RawDataLength = 0; > + BlockHeader->DataLength = ExpectedNewDataLength; > + return TRUE; > +} > + > +VOID > +GhesV2Initial( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, > + UINT32 BlockLength > +) > +{ > + if (GhesV2 == NULL) { > + return; > + } > + *GhesV2 = (EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE) { > + .Type = EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_VERSION_2, > + .SourceId = 0, > + .RelatedSourceId = 0xFFFF, > + .Flags = 0, > + .Enabled = 1, > + .NumberOfRecordsToPreAllocate = 1,//ERROR BLOCK > + .MaxSectionsPerRecord = 1,// Num Entries(section) > + .MaxRawDataLength = BlockLength, // Max Size Of a Raw Data > + .ErrorStatusAddress = { > + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, > + .RegisterBitWidth = 64, > + .RegisterBitOffset = 0, > + .AccessSize = EFI_ACPI_6_1_QWORD, > + .Address = 0 > + }, > + .NotificationStructure = { > + .Type = EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV, > + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE), > + .ConfigurationWriteEnable = {0, 0, 0, 0, 0, 0, 0} , > + .PollInterval = 0, > + .Vector = 0, > + .SwitchToPollingThresholdValue = 0, > + .SwitchToPollingThresholdWindow = 0, > + .ErrorThresholdValue = 0, > + .ErrorThresholdWindow = 0 > + }, > + .ErrorStatusBlockLength = BlockLength, > + .ReadAckRegister = { > + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, > + .RegisterBitWidth = 64, > + .RegisterBitOffset = 0, > + .AccessSize = EFI_ACPI_6_1_QWORD, > + .Address = 0 > + }, > + .ReadAckPreserve = READ_ACK_PRESERVE, > + .ReadAckWrite = READ_ACK_WRITE > + }; > + return; > +} > + > +VOID > +GhesV2AddNotification( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *This, > + UINT8 Type > +) > +{ > + This->NotificationStructure = (EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE) { > + .Type = Type, > + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE), > + .ConfigurationWriteEnable = { > + .Type = 0, > + .PollInterval = 1, > + .SwitchToPollingThresholdValue = 1, > + .SwitchToPollingThresholdWindow = 1, > + .ErrorThresholdValue = 1, > + .ErrorThresholdWindow = 1 > + }, > + .PollInterval = 20, > + .Vector = 0, > + .SwitchToPollingThresholdValue = 0, > + .SwitchToPollingThresholdWindow = 0, > + .ErrorThresholdValue = 0, > + .ErrorThresholdWindow = 0 > + }; > + return; > +} > + > +EFI_STATUS > +GhesV2LinkErrorBlock( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, > + GHES_REGISTER *Register, > + VOID *ErrorBlock > +) > +{ > + if (ErrorBlock == NULL || Register == NULL || GhesV2 == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + Register->ErrorStatusBlockAddress = (UINTN)ErrorBlock; > + GhesV2->ErrorStatusAddress.Address = (UINTN) & (Register->ErrorStatusBlockAddress); > + Register->AckRegister = READ_ACK_WRITE; > + GhesV2->ReadAckRegister.Address = (UINT64) & (Register->AckRegister); No spaces around '&' when used as the addressof operator. > + return EFI_SUCCESS; > +} > + > + > +VOID GhesV1Initial( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *GhesV1, > + UINT32 BlockLength > +) > +{ > + if (GhesV1 == NULL) { > + return; > + } > + *GhesV1 = (EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE) { > + .Type = EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR, > + .SourceId = 0, > + .RelatedSourceId = 0xFFFF, > + .Flags = 0, > + .Enabled = 1, > + .NumberOfRecordsToPreAllocate = 1,//ERROR BLOCK > + .MaxSectionsPerRecord = 1,// Num Entries(section) > + .MaxRawDataLength = BlockLength, // Max Size Of a Raw Data > + .ErrorStatusAddress = { > + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, > + .RegisterBitWidth = 64, > + .RegisterBitOffset = 0, > + .AccessSize = EFI_ACPI_6_1_QWORD, > + .Address = 0 > + }, > + .NotificationStructure = { > + .Type = EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV, > + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE), > + .ConfigurationWriteEnable = {0, 0, 0, 0, 0, 0, 0}, > + .PollInterval = 0, > + .Vector = 0, > + .SwitchToPollingThresholdValue = 0, > + .SwitchToPollingThresholdWindow = 0, > + .ErrorThresholdValue = 0, > + .ErrorThresholdWindow = 0 > + }, > + .ErrorStatusBlockLength = BlockLength, > + }; > + return; > +} > + > +VOID > +GhesV1AddNotification( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, > + UINT8 Type > +) > +{ > + This->NotificationStructure = (EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE) { > + .Type = Type, > + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE), > + .ConfigurationWriteEnable = { > + .Type = 0, > + .PollInterval = 1, > + .SwitchToPollingThresholdValue = 1, > + .SwitchToPollingThresholdWindow = 1, > + .ErrorThresholdValue = 1, > + .ErrorThresholdWindow = 1 > + }, > + .PollInterval = 20, > + .Vector = 0, > + .SwitchToPollingThresholdValue = 0, > + .SwitchToPollingThresholdWindow = 0, > + .ErrorThresholdValue = 0, > + .ErrorThresholdWindow = 0 > + }; > + return; > +} > + > +EFI_STATUS GhesV1LinkErrorBlock( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, > + UINT64 *ptrBlockAddress, > + VOID *ErrorBlock > +) > +{ > + if (ErrorBlock == NULL || ptrBlockAddress == NULL || This == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + *ptrBlockAddress = (UINTN)ErrorBlock; > + This->ErrorStatusAddress.Address = (UINTN) ptrBlockAddress; > + return EFI_SUCCESS; > +} > + > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h > new file mode 100644 > index 0000000000..20d9e55e7f > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h > @@ -0,0 +1,100 @@ > + > +#ifndef GENERIC_HARDWARE_ERROR_SOURCE > +#define GENERIC_HARDWARE_ERROR_SOURCE > +#include "Apei.h" > + > + > +typedef struct { > + UINT64 AckRegister; > + UINT64 ErrorStatusBlockAddress; > +} GHES_REGISTER; > + > +typedef enum { > + PROCESSOR_GENERIC = 0, > + PROCESSOR_IA32_X64 = 1, > + PROCESSOR_IPF = 2, > + PROCESSOR_ARM = 3, > + PLATFORM_MEMORY = 4, > + PLATFORM_MEMORY2 = 5, > + PCIE_EXPRESS = 6, > + FIRMWARE_ERROR = 7, > + PCI_BUS = 8, > + PCI_COMPONENT = 9 > +} EFI_CPER_SECTION_TYPE; > +typedef enum { > + RECOVERABLE = 0, > + FATAL = 1, > + CORRECTED = 2, > + NONE = 3 > +} ERROR_SEVERITY; > +#define ERROR_SEVERITY_RECOVERABLE 0 > +#define ERROR_SEVERITY_FATAL 1 > +#define ERROR_SEVERITY_CORRECTED 2 > +#define ERROR_SEVERITY_NONE 3 Why not use the ones defined by <IndustryStandard/Acpi##.h> ? > + > +EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* > +ErrorBlockInitial( > + VOID *Block, > + UINT32 Severity > +); > +BOOLEAN ErrorBlockAddErrorData ( > + IN VOID *ErrorBlock, > + IN UINT32 MaxBlockLength, > + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, > + IN VOID *GenericErrorData, > + IN UINT32 SizeOfGenericErrorData, > + IN ERROR_SEVERITY ErrorSeverity, > + IN BOOLEAN Correctable > +); > +BOOLEAN ErrorBlockAddErrorData ( > + IN VOID *ErrorBlock, > + IN UINT32 MaxBlockLength, > + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, > + IN VOID *GenericErrorData, > + IN UINT32 SizeOfGenericErrorData, > + IN ERROR_SEVERITY ErrorSeverity, > + IN BOOLEAN Correctable > +); > + > +VOID > +GhesV2Initial ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, > + UINT32 BlockLength > +); > + > +/** > +@param type - one of HARDWARE_ERROR_NOTIFICATION Type, GSIV For ARM,and SCI for X86, > + Notice: Windows OS hadn't support to GSIV, 20171026 > +*/ > +VOID > +GhesV2AddNotification ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *This, > + UINT8 Type > +); > + > + > +EFI_STATUS > +GhesV2LinkErrorBlock ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, > + GHES_REGISTER *Register, > + VOID *ErrorBlock > +); > +VOID > +GhesV1Initial ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *GhesV1, > + UINT32 BlockLength > +); > +VOID > +GhesV1AddNotification ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, > + UINT8 Type > +); > +EFI_STATUS > +GhesV1LinkErrorBlock ( > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, > + UINT64 *ptrBlockAddress, > + VOID *ErrorBlock > +); > + > + > +#endif > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c > new file mode 100644 > index 0000000000..514a259a54 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c > @@ -0,0 +1,379 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > +#include "erst.h" > +#include <Guid/Cper.h> > + > +typedef struct { > + EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER ErstTableHeader; > + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY ErstInstructionEntry[ERST_ACTION_NO]; > +} ERST_TABLE; > + > +ERST_TABLE mErst = { > + { > + ARM_ACPI_HEADER( > + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE, > + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER, > + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION > + ), > + sizeof(EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER), > + { > + 0x0, > + 0x0, > + 0x0, > + 0x0 > + }, > + ERST_ACTION_NO, > + }, > + { > + { > + // 0 EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION > + EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + ERST_BEGIN_WRITE_VALUE, > + ERST_BEGIN_WRITE_MASK > + }, > + { > + // 1 EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION > + EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + ERST_BEGIN_READ_VALUE, > + ERST_BEGIN_READ_MASK > + }, > + { > + // 2 EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION > + EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + ERST_BEGIN_CLEAR_VALUE, > + ERST_BEGIN_CLEAR_MASK > + }, > + { > + // 3 EFI_ACPI_6_0_ERST_END_OPERATION > + EFI_ACPI_6_0_ERST_END_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, > + EFI_ACPI_6_0_ERST_PRESERVE_REGISTER, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + ERST_END_OPERATION_VALUE, > + ERST_END_OPERATION_MASK > + }, > + { > + // 4 EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET > + EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // 5 EFI_ACPI_6_0_ERST_EXECUTE_OPERATION > + EFI_ACPI_6_0_ERST_EXECUTE_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_DWORD, > + 0x94730000 > + }, > + 0x0002, > + 0x0002 > + }, > + { > + // 6 EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS > + EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS, > + EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0x00000001, > + 0x00000001 > + }, > + { > + // 7 EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS > + EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // 8 EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER > + EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // 9 EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER > + EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // A EFI_ACPI_6_0_ERST_GET_RECORD_COUNT > + EFI_ACPI_6_0_ERST_GET_RECORD_COUNT, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // B EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION > + EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // C RESERVED > + 0x0C, > + EFI_ACPI_6_0_ERST_WRITE_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // D EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE > + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // E EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH > + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + }, > + { > + // F EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES > + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES, > + EFI_ACPI_6_0_ERST_READ_REGISTER, > + 0, > + 0, > + { > + EFI_ACPI_6_0_SYSTEM_MEMORY, > + 64, > + 0, > + EFI_ACPI_6_0_QWORD, > + 0 > + }, > + 0, > + ERST_MASK > + } > + } > +}; > + > +VOID > +ErstSetAcpiTable ( > + ERST_BOOT_CONTEXT *Context > +) > +{ > + UINTN AcpiTableHandle; > + EFI_STATUS Status; > + UINT8 Checksum; > + mErst.ErstTableHeader.Header.Length = sizeof (ERST_TABLE); > + Checksum = CalculateCheckSum8((UINT8*)(&mErst), mErst.ErstTableHeader.Header.Length); > + mErst.ErstTableHeader.Header.Checksum = Checksum; > + AcpiTableHandle = 0; > + Status = mAcpiTableProtocol->InstallAcpiTable ( > + mAcpiTableProtocol, > + &mErst, > + mErst.ErstTableHeader.Header.Length, > + &AcpiTableHandle > + ); > + ASSERT_EFI_ERROR (Status) ; > +} > + > +EFI_STATUS > +ErstHeaderCreator ( > + ERST_BOOT_CONTEXT *Context, > + UINT64 BufferSize,//ERST_DATASTORE_SIZE > + VOID *NvRamAddrRange, > + UINT64 NvRamAllRecordLength, > + UINT64 NvRamAddrRangeLength > +) > +{ > + EFI_STATUS Status = EFI_SUCCESS; > + ERST_RT_CONTEXT *ErstRtCtx; > + // > + ErstRtCtx = AllocateReservedZeroPool (sizeof (ERST_RT_CONTEXT)); > + ErstRtCtx->Operation = ERST_END_OPERATION; > + ErstRtCtx->RecordOffset = 0; > + ErstRtCtx->BusyStatus = 0; > + ErstRtCtx->CommandStatus = 0; > + ErstRtCtx->KeyRecordId = 0; > + ErstRtCtx->MaxTimeOfExecuteOperation = (UINT64)(-1); Better to use MAX_UINT64. > + ErstRtCtx->RecordCount = 0; > + ErstRtCtx->ErrorLogAddressRange = (UINT64) AllocateReservedZeroPool (BufferSize); No space after (UINT64). > + ErstRtCtx->ErrorLogAddressRangeLength = BufferSize; > + ErstRtCtx->ErrorLogAttributes = 0; > + ErstRtCtx->NvRamLogAddrRange = NvRamAddrRange; > + ErstRtCtx->NvRamLogAddrRangeLength = NvRamAddrRangeLength; > + ErstRtCtx->NvRamRecordOffset = 0; > + ErstRtCtx->NvRamNextVallidRecordId = (UINT64)(-1); Better to use MAX_UINT64. > + ErstRtCtx->NvRamNextValidRecordOffset = 0; > + ErstRtCtx->NvRamAllRecordLength = NvRamAllRecordLength; > + mErst.ErstInstructionEntry[0].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); > + mErst.ErstInstructionEntry[1].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); > + mErst.ErstInstructionEntry[2].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); > + mErst.ErstInstructionEntry[3].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); > + mErst.ErstInstructionEntry[4].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->RecordOffset)); > + mErst.ErstInstructionEntry[6].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->BusyStatus)); > + mErst.ErstInstructionEntry[7].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->CommandStatus)); > + mErst.ErstInstructionEntry[8].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->NvRamNextVallidRecordId)); > + mErst.ErstInstructionEntry[9].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->KeyRecordId)); > + mErst.ErstInstructionEntry[10].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->RecordCount)); > + mErst.ErstInstructionEntry[11].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->DummyWrite)); > + mErst.ErstInstructionEntry[12].RegisterRegion.Address = 0; > + mErst.ErstInstructionEntry[13].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAddressRange)); > + mErst.ErstInstructionEntry[14].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAddressRangeLength)); > + mErst.ErstInstructionEntry[15].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAttributes)); > + Context->ErstHeader = (EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER*)&mErst; > + Context->ExecuteOperationEntry = &(mErst.ErstInstructionEntry[5]); > + Context->GetErrorLogAddrRangeAttributes = &(mErst.ErstInstructionEntry[15]); > + Context->Rt = ErstRtCtx; > + return Status; > +}; > + > +VOID > +SetAttributeOfErrorLogAddressRange ( > + ERST_BOOT_CONTEXT *Context, > + UINT64 Attribute > +) > +{ > + Context->Rt->ErrorLogAttributes = Attribute & 0x7; What's that 0x7? > + return; > +} > + > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h > new file mode 100644 > index 0000000000..1dfa4f4245 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h > @@ -0,0 +1,145 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#ifndef _ERST_H_ > +#define _ERST_H_ > + > +#include "Apei.h" > + > +#define ERST_STATUS_SUCCESS EFI_ACPI_6_1_ERST_STATUS_SUCCESS > +#define ERST_STATUS_NOT_ENOUGH_SPACE EFI_ACPI_6_1_ERST_STATUS_NOT_ENOUGH_SPACE > +#define ERST_STATUS_HARDWARE_NOT_AVAILABLE EFI_ACPI_6_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE > +#define ERST_STATUS_FAILED EFI_ACPI_6_1_ERST_STATUS_FAILED > +#define ERST_STATUS_RECORD_STORE_EMPTY EFI_ACPI_6_1_ERST_STATUS_RECORD_STORE_EMPTY > +#define ERST_STATUS_RECORD_NOT_FOUND EFI_ACPI_6_1_ERST_STATUS_RECORD_NOT_FOUND > + > +#define ERST_BEGIN_WRITE_VALUE 0x01 > +#define ERST_BEGIN_WRITE_MASK 0xFFFFFFFFFFFFFFFF > +#define ERST_BEGIN_READ_VALUE 0x02 > +#define ERST_BEGIN_READ_MASK 0xFFFFFFFFFFFFFFFF > +#define ERST_BEGIN_CLEAR_VALUE 0x03 > +#define ERST_BEGIN_CLEAR_MASK 0xFFFFFFFFFFFFFFFF > +#define ERST_END_OPERATION_VALUE 0x04 > +#define ERST_END_OPERATION_MASK 0xFFFFFFFFFFFFFFFF > +#define ERST_MASK 0xFFFFFFFFFFFFFFFF > + > +#define ERST_BEGIN_WRITE_OPERATION EFI_ACPI_6_1_ERST_BEGIN_WRITE_OPERATION > +#define ERST_BEGIN_READ_OPERATION EFI_ACPI_6_1_ERST_BEGIN_READ_OPERATION > +#define ERST_BEGIN_CLEAR_OPERATION EFI_ACPI_6_1_ERST_BEGIN_CLEAR_OPERATION > +#define ERST_END_OPERATION EFI_ACPI_6_1_ERST_END_OPERATION > +#define ERST_BEGIN_DUMMY_WRITE_OPERATION EFI_ACPI_6_1_ERST_BEGIN_DUMMY_WRITE_OPERATION > + > +#define ERST_ACTION_NO 16 > + > +#define ERST_RECORD_FREE 0x00 > +#define ERST_RECORD_INUSE 0x01 > + > +#define ERST_RECORD_STORE_IN_NVRAM 0 > +#define ERST_RECORD_STORE_IN_MEM 1 > +#define ERST_RECORD_STORE_IN_SPI_FLASH 2 > + > +#define ERST_LOG_ATTR_NVRAM 0x02 > + > +typedef struct { > + UINT64 OperationId; > + UINT64 RecordOffset; > + UINT64 BusyStatus; > + UINT64 CommandStatus; > + UINT64 GetRecordId; > + UINT64 SetRecordId; > + UINT64 RecordCount; > + UINT64 DummyWrite; > + UINT64 Reserved; > + UINT64 ErrorLogAddrRange; > + UINT64 ErrorLogAddrRangeLength; > + UINT64 ErrorLogAttributes; > + UINT64 NvRamLogAddrNext; > + UINT64 NvRamLogSizeRemain; > +} ERST_DATA_STRUCTURE; > + > +typedef struct { > + UINT16 Signature; > + UINT16 Data0; > + UINT16 Data1; > + UINT8 Data2; > + UINT8 Attributes; //0: free > +} ERST_ERROR_RECORD_INFO; > + > +/// > +/// ERST Table > +/// > + > + > + > +typedef struct _ERST_CONTEXT { > + UINT64 Operation; // WRITE,READ,CLEAR,END, > + UINT64 DummyWrite;//DUMMY_WRITE_OPEATION > + UINT64 RecordOffset; // Offset form the buffer(error log adress range) > + UINT32 BusyStatus; > + UINT32 CommandStatus; > + UINT64 KeyRecordId; //OS Set the Record ID To Read/Write/Search > + UINT64 MaxTimeOfExecuteOperation; > + UINT64 RecordCount; // Num of Record In NVRAM > + UINT64 ErrorLogAddressRange; // Address Of Range Top > + UINT64 ErrorLogAddressRangeLength; // Address Of Range Top > + UINT64 ErrorLogAttributes; > + VOID *NvRamLogAddrRange; > + UINT64 NvRamLogAddrRangeLength; > + UINT64 NvRamRecordOffset; > + UINT64 NvRamNextVallidRecordId; //Get RecordId entry > + UINT64 NvRamNextValidRecordOffset; > + UINT64 NvRamAllRecordLength; > +} ERST_RT_CONTEXT; Please align the comments a bit better. > + > +typedef struct _ERST_BOOT_CONTEXT { > + EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER *ErstHeader; > + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *ExecuteOperationEntry; > + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *GetErrorLogAddrRangeAttributes; > + ERST_RT_CONTEXT *Rt; > +} ERST_BOOT_CONTEXT; > + > +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; > +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; > + > +EFI_STATUS > +ErstHeaderCreator( > + ERST_BOOT_CONTEXT *Context, > + UINT64 BufferSize,//ERST_DATASTORE_SIZE > + VOID *NvRamAddrRange, > + UINT64 NvRamAllRecordLength, > + UINT64 NvRamAddrRangeLength > +); > + > +VOID > +SetAttributeOfErrorLogAddressRange ( > + ERST_BOOT_CONTEXT *Context, > + UINT64 Attribute > +); > + > +/***OEM***/ > +EFI_STATUS > +OemInitErstTable (VOID); > + > +EFI_STATUS > +OemErstConfigExecuteOperationEntry ( > + ERST_BOOT_CONTEXT *Context > +); > + > +VOID > +ErstSetAcpiTable ( > + ERST_BOOT_CONTEXT *Context > +); > + > + > +#endif // _ERST_H_ > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c > new file mode 100644 > index 0000000000..76296de95d > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c > @@ -0,0 +1,98 @@ > +#include "ErrorSource/Ghes.h" > +#include "hest.h" > + > +EFI_STATUS HestAddErrorSourceDescriptor ( > + IN OUT HEST_CONTEXT *Context, > + IN VOID *ErrorSourceDescriptor, > + IN UINT32 SizeOfDescriptor > +) > +{ > + UINT16 *pSourceId; > + VOID *Descriptor; > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; > + > + if ((Context == NULL) || (ErrorSourceDescriptor == NULL)) { > + return EFI_INVALID_PARAMETER; > + } > + HestHeader = Context->HestHeader; > + if (HestHeader->Header.Length + SizeOfDescriptor > Context->OccupiedMemorySize) { > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: Hest Size Too small\n", __FUNCTION__, __LINE__)); > + return EFI_BUFFER_TOO_SMALL; > + } > + Descriptor = (UINT8*)HestHeader + HestHeader->Header.Length; > + gBS->CopyMem ((VOID*)Descriptor , ErrorSourceDescriptor, SizeOfDescriptor); > + pSourceId = Descriptor + sizeof (UINT16); > + *pSourceId = HestHeader->ErrorSourceCount; > + HestHeader->Header.Length += SizeOfDescriptor; > + HestHeader->ErrorSourceCount++; > + Context->KeyErrorSource = Descriptor; > + return EFI_SUCCESS; > +} > + > +VOID > +HestSetAcpiTable( > + IN HEST_CONTEXT *Context > +) > +{ > + UINTN AcpiTableHandle; > + EFI_STATUS Status; > + UINT8 Checksum; > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; > + EFI_ACPI_SDT_HEADER *Table; > + EFI_ACPI_TABLE_VERSION TableVersion; > + UINTN TableKey; > + UINT32 i; I. > + if (Context == NULL) { > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: ERROR\n", __FUNCTION__, __LINE__)); > + return; > + } > + > + HestHeader = Context->HestHeader; > + Checksum = CalculateCheckSum8 ((UINT8*)(HestHeader), HestHeader->Header.Length); > + HestHeader->Header.Checksum = Checksum; > + AcpiTableHandle = 0; > + // see AcpiTableProtocol.c InstallAcpiTable > + Status = mAcpiTableProtocol->InstallAcpiTable ( > + mAcpiTableProtocol, > + HestHeader, > + HestHeader->Header.Length, > + &AcpiTableHandle); > + for (i = 0; i < EFI_ACPI_MAX_NUM_TABLES; i++) { > + Status = mAcpiSdtProtocol->GetAcpiTable (i, &Table, &TableVersion, &TableKey); > + if (EFI_ERROR (Status)) { > + break; > + } > + if (Table->Signature != EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE) { > + continue; > + } > + mApeiTrustfirmwareStruc->HestTableAddress = (EFI_PHYSICAL_ADDRESS)Table; > + DEBUG ((DEBUG_ERROR, "Acpi HestSetAcpiTable Table = 0x%x.\n", (EFI_PHYSICAL_ADDRESS)Table)); > + } > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]:OUT %llx, IN %llx \n", __FUNCTION__, __LINE__, AcpiTableHandle, Context->HestHeader)); > + // TBD free Hest Buffer If the buffer needs freeing, free it. Don't talk about it. > + return; > +} > + > +EFI_STATUS > +HestHeaderCreator( > + HEST_CONTEXT *Context, > + UINT32 PreAllocatedHestSize > +) > +{ > + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: \n", __FUNCTION__, __LINE__)); > + if (PreAllocatedHestSize < sizeof (EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER)) { > + return EFI_BUFFER_TOO_SMALL; > + } > + Context->HestHeader = AllocateReservedZeroPool (PreAllocatedHestSize); > + *Context->HestHeader = (EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER) { > + ARM_ACPI_HEADER ( > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE, > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER, > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION > + ), > + 0x0 > + }; > + Context->KeyErrorSource = Context->HestHeader + 1; > + Context->OccupiedMemorySize = PreAllocatedHestSize; > + return EFI_SUCCESS; > +} > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h > new file mode 100644 > index 0000000000..09fe985025 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h > @@ -0,0 +1,58 @@ > +/** @file > +* > +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > +* > +* This program and the accompanying materials > +* are licensed and made available under the terms and conditions of the BSD License > +* which accompanies this distribution. The full text of the license may be found at > +* http://opensource.org/licenses/bsd-license.php > +* > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +* > +**/ > + > +#ifndef _HEST_H_ > +#define _HEST_H_ > + > +#include "Apei.h" > + > + > +typedef struct _HEST_CONTEXT { > + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; // pointer to hest header > + UINT32 OccupiedMemorySize; // allocated memory size for hest > + VOID *KeyErrorSource; // key error source, valtile > +} HEST_CONTEXT; > + > +EFI_STATUS > +HestAddErrorSourceDescriptor ( > + IN OUT HEST_CONTEXT *Context, > + IN VOID *ErrorSourceDescriptor, > + IN UINT32 SizeOfDescriptor > +); > +VOID > +HestSetAcpiTable ( > + IN HEST_CONTEXT *Context > +); > +EFI_STATUS > +HestHeaderCreator ( > + HEST_CONTEXT *Context, > + UINT32 PreAllocatedHestSize > +); > + > +/** > +* OEM Interface declaration > +* 1.Interface is not realized default > +* 2.OEM should implement this interface > +*/ > +extern > +VOID > +OemHestInitialNotification (VOID); > + > +extern > +EFI_STATUS > +OemInitHestTable( > + IN EFI_HANDLE ImageHandle > +); > + > +#endif // _HEST_H_ > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c > new file mode 100644 > index 0000000000..3eb28b9549 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c > @@ -0,0 +1,303 @@ > +#include <Guid/Cper.h> > +#include <Uefi/UefiBaseType.h> > +#include "Bert/bert.h" > +#include "Einj/einj.h" > +#include "ErrorSource/Ghes.h" > +#include "Erst/erst.h" > +#include "Hest/hest.h" > +#include "OemApeiHi1620.h" > + > +VOID > +GpioCombInit ( > + UINTN Base, > + UINT32 Pin > +) > +{ > + UINT32 Val = MmioRead32 (Base + GPIO_INT_MASK); > + MmioWrite32 (Base + GPIO_INT_MASK, Val | Pin); > + Val = MmioRead32 (Base + GPIO_INT_EN); > + MmioWrite32 (Base + GPIO_INT_EN, Val | Pin); > + Val = MmioRead32 (Base + GPIO_SWPORT_DDR); > + MmioWrite32 (Base + GPIO_SWPORT_DDR, Val & (~Pin)); > + Val = MmioRead32 (Base + GPIO_INT_TYPE); > + MmioWrite32 (Base + GPIO_INT_TYPE, Val & (~Pin)); > + Val = MmioRead32 (Base + GPIO_INT_POLARITY); > + MmioWrite32 (Base + GPIO_INT_POLARITY, Val | Pin); > + Val = MmioRead32 (Base + GPIO_LS_SYNC); > + MmioWrite32 (Base + GPIO_LS_SYNC, Val & (~Pin)); > + MmioWrite32 (Base + GPIO_INT_COMB, 1); > + return; > +} > +/************************************************ > +*************** HEST *************** > +************************************************/ > + > +/***************************************************************************** > +* @param EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE* GhesV2,Vector of GhesV2 > +* @param UINT8 NumOfGhesV2 > +* @param_out > +* @retval EFI_STATUS > +*****************************************************************************/ > +EFI_STATUS > +GhesV2ContextForHest ( > + IN EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE GhesV2[MAX_GHES], > + IN UINT8 NumOfGhesV2 > +) > +{ > + // ensuce the size is expected > + if ((GhesV2 == NULL) || (NumOfGhesV2 != MAX_GHES)) { > + return EFI_INVALID_PARAMETER; > + } > + //current?? only 1 block per ghes is supported > + UINT8 NumOfBlockPerGhes = 1; When are you intending to add support for more? If not imminently, just leave this overhead out for now. > + UINT8 iter = 0; I. > + UINT32 BlockMemorySize = MAX_GHES * (sizeof (GHES_REGISTER) + NumOfBlockPerGhes * GENERIC_HARDWARE_ERROR_BLOCK_SIZE); > + UINT32 ErrorSeverityArray[MAX_GHES] = {ERROR_SEVERITY_RECOVERABLE, ERROR_SEVERITY_FATAL, ERROR_SEVERITY_CORRECTED}; Wrap long lines. > + VOID *ErrorBlockHead; > + VOID *ErrorBlock; > + VOID *BlockMemory; > + GHES_REGISTER *GhesRegisters; > + EFI_STATUS Status = EFI_SUCCESS; > + Status = gBS->AllocatePool ( > + EfiReservedMemoryType, > + BlockMemorySize, > + & BlockMemory No space after '&'. > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + gBS->SetMem ( > + BlockMemory, > + BlockMemorySize, > + 0 > + ); Above call would easily fit on a single line. > + GhesRegisters = BlockMemory; > + ErrorBlockHead = BlockMemory + MAX_GHES * sizeof (GHES_REGISTER); > + ErrorBlock = ErrorBlockHead; > + for (iter = 0; iter < MAX_GHES; iter++) { > + GhesV2Initial (&GhesV2[iter], GENERIC_HARDWARE_ERROR_BLOCK_SIZE); > + GhesV2AddNotification (&GhesV2[iter], EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV); > + ErrorBlockInitial (ErrorBlock, ErrorSeverityArray[iter]); > + GhesV2LinkErrorBlock (&GhesV2[iter], &GhesRegisters[iter], ErrorBlock); > + ErrorBlock += GhesV2[iter].ErrorStatusBlockLength; > + } > + return EFI_SUCCESS; > +} > +/***************************************************************************** > +* @param EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE* GhesV2,Vector of GhesV2 > +* @param UINT8 NumOfGhesV2 > +* @param_out > +* @retval EFI_STATUS > +*****************************************************************************/ > + > +EFI_STATUS > +GhesV1ContextForHest( > + IN EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE GhesV1[MAX_GHES], > + IN UINT8 NumOfGhesV1 > +) > +{ > + // ensuce the size is expected > + if ((GhesV1 == NULL) || (NumOfGhesV1 != MAX_GHES)) { > + return EFI_INVALID_PARAMETER; > + } > + //current?? only 1 block per ghes is supported > + UINT8 NumOfBlockPerGhes = 1; Same as for previous function. > + UINT8 iter = 0; I. > + UINT32 BlockMemorySize = MAX_GHES * (sizeof (UINT64) + NumOfBlockPerGhes * GENERIC_HARDWARE_ERROR_BLOCK_SIZE); > + UINT32 ErrorSeverityArray[MAX_GHES] = {ERROR_SEVERITY_RECOVERABLE, ERROR_SEVERITY_FATAL, ERROR_SEVERITY_CORRECTED}; Wrap long lines. > + VOID *ErrorBlockHead; > + VOID *ErrorBlock; > + VOID *BlockMemory; > + UINT64 *ptrBlockAddress; > + EFI_STATUS Status = EFI_SUCCESS; > + Status = gBS->AllocatePool ( > + EfiReservedMemoryType, > + BlockMemorySize, > + & BlockMemory No space after '&'. > + ); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + gBS->SetMem ( > + BlockMemory, > + BlockMemorySize, > + 0 > + ); Unwrap short lone. > + ptrBlockAddress = BlockMemory; > + ErrorBlockHead = BlockMemory + MAX_GHES * sizeof (UINT64); > + ErrorBlock = ErrorBlockHead; > + for (iter = 0; iter < MAX_GHES; iter++) { > + GhesV1Initial (&GhesV1[iter], GENERIC_HARDWARE_ERROR_BLOCK_SIZE); > + GhesV1AddNotification (&GhesV1[iter], EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV); > + ErrorBlockInitial (ErrorBlock, ErrorSeverityArray[iter]); > + GhesV1LinkErrorBlock (&GhesV1[iter], &ptrBlockAddress[iter], ErrorBlock); > + ErrorBlock += GhesV1[iter].ErrorStatusBlockLength; > + } > + return EFI_SUCCESS; > +} > + > +VOID > +OemHestInitialNotification () > +{ > + // GPIO init > + // use int_msk to simulate > + UINTN Base = IOMUX_REG_BASE; > + //GPIO9, in document 'PhosphorV680 Totemiomux' iomg051, > + //Set GPIO9 to pad_ex_int1 > + MmioWrite32(Base + IOMG051, PAD_EX_INT1); Spave before '('. > + return; > +} > + > +VOID > +OemEinjInitialNotification () > +{ > + UINTN Base = IOMUX_REG_BASE; > + //use TB_GPIO_PIN10 for EINJ > + MmioWrite32 (Base + IOMG052, PAD_EX_INT1); > + return; > +} > + > +EFI_STATUS > +OemInitHestTable( > + IN EFI_HANDLE ImageHandle > +) > +{ > + EFI_STATUS Status = EFI_SUCCESS; > + HEST_CONTEXT HestContext; > + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE GhesV2[MAX_GHES]; > + Status = HestHeaderCreator (&HestContext, HEST_TABLE_SIZE); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status = GhesV2ContextForHest(GhesV2, MAX_GHES); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[0], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); > + mApeiTrustfirmwareStruc->HestRecoverableErrorGhesV2 = HestContext.KeyErrorSource; > + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[1], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); > + mApeiTrustfirmwareStruc->HestFatalErrorGhesV2 = HestContext.KeyErrorSource; > + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[2], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); Very long lines. Pelase wrap. (space after sizeof - apply throughout) > + mApeiTrustfirmwareStruc->HestCorrectedErrorGhesV2 = HestContext.KeyErrorSource; > + OemHestInitialNotification (); > + HestSetAcpiTable (&HestContext); > + return Status; > +} > +/************************************************ > +*************** BERT *************** > +************************************************/ > + > +EFI_STATUS > +OemInitBertTable ( > + IN EFI_HANDLE ImageHandle > +) > +{ > + BERT_CONTEXT Context; > + BOOLEAN Status; > + Status = BertHeaderCreator (&Context, BOOT_ERROR_REGION_SIZE); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + ErrorBlockInitial (Context.Block, ERROR_SEVERITY_NONE); > + BertSetAcpiTable (&Context); > + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); > + return EFI_SUCCESS; > +} > +/************************************************ > +*************** EINJ *************** > +************************************************/ > +EFI_STATUS > +OemEinjConfigExecuteOperationEntry ( > + EINJ_CONTEXT *Context > +) > +{ > + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY* KeyEntry = Context->ExecuteOperationEntry; > + OemEinjInitialNotification (); > + //use TB_GPIO_PIN10 for EINJ > + KeyEntry->RegisterRegion.Address = PcdGet64 (PcdCpldBaseAddress) + CPLD_GPIO10_INT_OFFSET; > + KeyEntry->Mask = CPLD_MASK; > + KeyEntry->Value = CPLD_VALUE; > + return EFI_SUCCESS; > +} > + > +EFI_STATUS > +OemInitEinjTable( > +) > +{ > + EFI_STATUS Status; > + EINJ_CONTEXT Context; > + Status = EinjHeaderCreator (&Context); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + (VOID)EinjConfigErrorInjectCapability (&Context, 0xFFF);// TBD > + (VOID)OemEinjConfigExecuteOperationEntry (&Context); > + EinjSetAcpiTable (&Context); > + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: %d\n", __FUNCTION__, __LINE__, Status)); > + return EFI_SUCCESS; > +} > +/************************************************ > +*************** ERST *************** > +************************************************/ > + > +EFI_STATUS > +OemErstConfigExecuteOperationEntry( > + ERST_BOOT_CONTEXT *Context > +) > +{ > + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *KeyEntry; > + KeyEntry = Context->ExecuteOperationEntry; > + KeyEntry->RegisterRegion.Address = GPIO1_BASE + GPIO_INT_MASK; //GPIO0_BASE + GPIO0_SWPORT_DR_OFFSET I don't understand the purpose of the comment. > + KeyEntry->Value = 0x10; > + KeyEntry->Mask = 0xFFFFFFFF; > + GpioCombInit (GPIO1_BASE, 0xFFFF); > + return EFI_SUCCESS; > +} > + > +BOOLEAN > +GetNvRamRegion( > + OUT VOID **NvRamAddrRange, > + OUT UINT64 *NvRamAddrRangeLength > +) > +{ > + /***TODO: > + *1. Search ER Record In > + *2. if found, return addr and length > + *3. if not found, allocal new space for record > + ***/ This isn't a wiki. Feel free to write a (much more) detailed comment describing the function and its current shortcomings. However, comments in functions should describe what the code is doing. Not what it is not doing. > + UINT32 Store = ERST_RECORD_STORE_IN_MEM; > + switch (Store) { > + case (ERST_RECORD_STORE_IN_NVRAM): > + break; > + case (ERST_RECORD_STORE_IN_MEM): > + * NvRamAddrRangeLength = ERST_DATASTORE_SIZE; > + * NvRamAddrRange = AllocateReservedZeroPool (ERST_DATASTORE_SIZE);// TODO should be real no-volatile ram See above. > + break; > + case (ERST_RECORD_STORE_IN_SPI_FLASH): > + break; > + default: > + ; > + } > + return TRUE; > +} > + > +/***OEM***/ > +EFI_STATUS > +OemInitErstTable( > +) > +{ > + EFI_STATUS Status = ERST_STATUS_SUCCESS; > + ERST_BOOT_CONTEXT Context; > + UINT64 BufferSize = ERST_DATASTORE_SIZE; > + VOID *NvRamAddrRange; > + UINT64 NvRamAddrRangeLength; > + UINT64 NvRamAllRecordLength; > + > + GetNvRamRegion (&NvRamAddrRange, &NvRamAddrRangeLength);// TODO > + NvRamAllRecordLength = 0; //TODO get length of exist records In NvRam No TODO. See previous function. > + Status = ErstHeaderCreator (&Context, BufferSize , NvRamAddrRange, NvRamAllRecordLength, NvRamAddrRangeLength); Wrap long line. / Leif > + OemErstConfigExecuteOperationEntry (&Context); > + mApeiTrustfirmwareStruc->ErstContext = (VOID*)Context.Rt; > + ErstSetAcpiTable (&Context); > + return Status; > +}; > diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h > new file mode 100644 > index 0000000000..0488bdc050 > --- /dev/null > +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h > @@ -0,0 +1,28 @@ > +#ifndef OEM_APEI_HI1620_H_H > +#define OEM_APEI_HI1620_H_H > +#define GPIO0_BASE 0x94100000 > +#define GPIO1_BASE 0x94110000 > +#define GPIO_INT_MASK 0x34 > +#define GPIO_INT_EN 0x30 > +#define GPIO_SWPORT_DDR 0x04 > +#define GPIO_INT_TYPE 0x38 > +#define GPIO_INT_POLARITY 0x3c > +#define GPIO_LS_SYNC 0x60 > +#define GPIO_INT_COMB 0xffc > +#define IOMUX_REG_BASE 0x94190000 > +#define IOMG051 0xCC > +#define IOMG052 0xD0 > +#define PAD_EX_INT1 0x4 > +#define CPLD_GPIO10_INT_OFFSET 0xfc > +#define CPLD_BASE_ADDR 0x80000000 > +#define CPLD_MASK 0x01030000 > +#define CPLD_VALUE 0x01020000 > + > +#define MAX_GHES 3 > +#define GENERIC_HARDWARE_ERROR_BLOCK_SIZE 0x1000 > +#define HEST_TABLE_SIZE 0x2000 > +#define BOOT_ERROR_REGION_SIZE 0x1000 > +#define GPIO_HEST_NOTIFIED_PIN BIT8 > + > +#define ERST_DATASTORE_SIZE 0x2000 > +#endif > -- > 2.17.0 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
在 8/4/2018 5:34 PM, Leif Lindholm 写道: > On Tue, Jul 24, 2018 at 03:09:10PM +0800, Ming Huang wrote: >> From: Sun Yuanchen <sunyuanchen@huawei.com> >> >> Move some RAS macros definition to PlatformArch.h for >> unifying D0x > > Minor comments below. > However, I would still prefer for this to be split up into a > refactoring patch for d03/d05, and then simpley introduced when the > d06 files are added. OK, do it in v2. > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Sun Yuanchen <sunyuanchen@huawei.com> >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> >> --- >> Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 7 +++++-- >> Silicon/Hisilicon/Hi1616/Include/PlatformArch.h | 4 ++++ >> Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 8 ++++++-- >> 3 files changed, 15 insertions(+), 4 deletions(-) >> >> diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> index 4843b60536..5198e3efff 100644 >> --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> @@ -1,7 +1,7 @@ >> /** @file >> * >> -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. >> -* Copyright (c) 2015, Linaro Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. >> * >> * This program and the accompanying materials >> * are licensed and made available under the terms and conditions of the BSD License >> @@ -38,6 +38,9 @@ >> >> #define S1_BASE 0x40000000000 >> >> +#define RASC_BASE (0x5000) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ > > Character encoding issues in comment. > >> >> // >> // ACPI table information used to initialize tables. >> diff --git a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> index 49618f6559..5124714cb5 100644 >> --- a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> @@ -30,6 +30,10 @@ >> // Max NUMA node number for each node type >> #define MAX_NUM_PER_TYPE 8 >> >> +#define RASC_BASE (0x5000) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ >> + > > Character encoding issues in comment. > >> // for acpi >> #define NODE_IN_SOCKET 2 >> #define CORE_NUM_PER_SOCKET 32 >> diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> index 2626751a0d..f2491315a8 100644 >> --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> @@ -1,7 +1,7 @@ >> /** @file >> * >> -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. >> -* Copyright (c) 2015, Linaro Limited. All rights reserved. >> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. >> * >> * This program and the accompanying materials >> * are licensed and made available under the terms and conditions of the BSD License >> @@ -31,6 +31,10 @@ >> #define MAX_NUM_PER_TYPE 8 >> >> >> +#define RASC_BASE (0x1800) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x58) /* configuration register for Rank statistical information */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xD4) /* configuration register for Sparing level */ >> + > > Much nicer comments. > >> // for acpi >> #define NODE_IN_SOCKET 2 >> #define CORE_NUM_PER_SOCKET 48 >> -- >> 2.17.0 >>
在 8/4/2018 10:47 PM, Leif Lindholm 写道: > On Tue, Jul 24, 2018 at 03:09:14PM +0800, Ming Huang wrote: >> From: Luqi Jiang <jiangluqi@huawei.com> >> >> This driver provide a means for the platform to >> convey error information to OSPM. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Luqi Jiang <jiangluqi@huawei.com> >> Signed-off-by: Ming Huang <ming.huang@linaro.org> >> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> >> --- >> Platform/Hisilicon/D06/D06.dsc | 1 + >> Platform/Hisilicon/D06/D06.fdf | 1 + >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 92 +++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 48 +++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 63 ++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 86 +++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 42 +++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 326 +++++++++++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 154 ++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 320 +++++++++++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 100 ++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 379 ++++++++++++++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 145 ++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 98 +++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 58 +++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c | 303 ++++++++++++++++ >> Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h | 28 ++ >> 17 files changed, 2244 insertions(+) >> >> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc >> index 28dd7926f4..0a7681915c 100644 >> --- a/Platform/Hisilicon/D06/D06.dsc >> +++ b/Platform/Hisilicon/D06/D06.dsc >> @@ -344,6 +344,7 @@ >> Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf >> >> + Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >> Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf >> # >> # Usb Support >> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf >> index ec424d49ed..264f717d9d 100644 >> --- a/Platform/Hisilicon/D06/D06.fdf >> +++ b/Platform/Hisilicon/D06/D06.fdf >> @@ -251,6 +251,7 @@ READ_LOCK_STATUS = TRUE >> >> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf >> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf >> + INF Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >> >> INF Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf >> >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c >> new file mode 100644 >> index 0000000000..1b108c9881 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c >> @@ -0,0 +1,92 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> +#include <Library/OemConfigData.h> >> +#include <Library/UefiRuntimeServicesTableLib.h> >> +#include "Apei.h" >> +#include "Bert/bert.h" > > Bert.h. > >> +#include "Einj/einj.h" > > Einj.h. > >> +#include "Erst/erst.h" > > Erst.h. > >> +#include "Hest/hest.h" > > Hest.h. In my mind, it will fail to build by delete Hest/, but it work. I will delete them in v2. > >> + >> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL; >> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL; >> +APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; > > TrustedFirmware. > Struct, rather than Struc. > But also, Struct isn't a very descriptive name. We already know it's > some form of struct. What about Context? Data? I think Data is good. > >> + >> +EFI_STATUS >> +EFIAPI >> +ApeiEntryPoint( >> + IN EFI_HANDLE ImageHandle, >> + IN EFI_SYSTEM_TABLE *SystemTable >> +) >> +{ >> + EFI_STATUS Status; >> + ARM_SMC_ARGS SmcRegs = {0}; >> + UINTN Size = sizeof (OEM_CONFIG_DATA); >> + OEM_CONFIG_DATA SetupData; >> + >> + Status = gRT->GetVariable ( >> + OEM_CONFIG_NAME, >> + &gOemConfigGuid, >> + NULL, >> + &Size, >> + &SetupData >> + ); >> + if (EFI_ERROR (Status)) { >> + SetupData.EnRasSupport = 1; >> + DEBUG ((DEBUG_ERROR, "[%a]GetVariable %r.Get default variable value\n", __FUNCTION__, Status)); > > Quite long lines in this function. Please wrap at 80. > >> + } >> + if (!SetupData.EnRasSupport) { >> + return EFI_ABORTED; >> + } >> + if (PcdGet64 (PcdTrustedFirmwareEnable) == 0) { >> + return EFI_ABORTED; >> + } >> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + Status = gBS->AllocatePool ( >> + EfiReservedMemoryType, >> + sizeof(APEI_TRUSTFIRMWARE_STRUCTURE), > > Space before (. Please search and replace throughout this patch. OK > >> + (VOID**)&mApeiTrustfirmwareStruc >> + ); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + gBS->SetMem ( >> + mApeiTrustfirmwareStruc, >> + sizeof (APEI_TRUSTFIRMWARE_STRUCTURE), >> + 0 >> + ); >> + Status = EFI_SUCCESS; >> + Status |= OemInitBertTable (ImageHandle); >> + Status |= OemInitHestTable (ImageHandle); >> + Status |= OemInitErstTable (); >> + Status |= OemInitEinjTable (); >> + // smc call >> + DEBUG ((DEBUG_INFO, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); >> + if (Status == EFI_SUCCESS) { >> + SmcRegs.Arg0 = PRIVATE_ARM_SMC_ID_APEI; >> + SmcRegs.Arg1 = (UINTN)mApeiTrustfirmwareStruc; >> + ArmCallSmc (&SmcRegs); >> + } >> + DEBUG ((DEBUG_INFO, "Acpi Apei init done.\n")); >> + return EFI_SUCCESS; >> +} >> + >> + >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h >> new file mode 100644 >> index 0000000000..39f028b203 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h >> @@ -0,0 +1,48 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> +#ifndef _APEI_H_ >> +#define _APEI_H_ >> + >> +#include <Hi1620Platform.h> >> +#include <IndustryStandard/Acpi.h> >> +#include <Library/ArmSmcLib.h> >> +#include <Library/BaseMemoryLib.h> >> +#include <Library/DebugLib.h> >> +#include <Library/IoLib.h> >> +#include <Library/MemoryAllocationLib.h> >> +#include <Library/UefiBootServicesTableLib.h> >> +#include <Library/UefiLib.h> >> +#include <Protocol/AcpiSystemDescriptionTable.h> >> +#include <Protocol/AcpiTable.h> > > I am not generally a fan of including header files not needed by the > header file itself. Please move those to the individual .c files> > This includes including _this_ file in all of the xxxx.h files, where > not needed. OK > >> + >> +#define EFI_ACPI_MAX_NUM_TABLES 20 >> +#define PRIVATE_ARM_SMC_ID_APEI 0x83000100 >> +#define PRIVATE_ARM_SMC_ID_APEI_S 0x83000101 >> + >> +typedef struct { >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestCorrectedErrorGhesV2; >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestFatalErrorGhesV2; >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *HestRecoverableErrorGhesV2; >> + EFI_PHYSICAL_ADDRESS HestTableAddress; >> + EFI_PHYSICAL_ADDRESS EinjTableAddress; >> + EFI_PHYSICAL_ADDRESS EinjDataStruct; >> + VOID *ErstContext; >> +} APEI_TRUSTFIRMWARE_STRUCTURE; > > This really ought to be APEI_TRUSTED_FIRMWARE_STRUCTURE. > (And this is where the orderFile comes in handy: letting struct > definitions be reviewed before their use.) Change it to APEI_TRUSTED_FIRMWARE_STRUCTURE in v2. > >> + >> +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; >> +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; >> +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; >> + >> + >> +#endif // _APEI_H_ >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >> new file mode 100644 >> index 0000000000..c80bcbcacc >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf >> @@ -0,0 +1,63 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > > 2018? Please update throughout. OK > >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +[defines] >> + INF_VERSION = 0x0001001A >> + BASE_NAME = AcpiApei >> + FILE_GUID = E9570C39-EF68-4fc6-B921-C1954A87CCD2 >> + MODULE_TYPE = DXE_DRIVER >> + VERSION_STRING = 1.0 >> + ENTRY_POINT = ApeiEntryPoint >> + >> +[sources.common] >> + Apei.c > > Apei.h? As Apei.h is included by Apei.c, so I think Apei.h is no need to add here. > >> + Bert/bert.c >> + Bert/bert.h >> + Einj/einj.c >> + Einj/einj.h >> + Erst/erst.c >> + Erst/erst.h >> + Hest/hest.c >> + Hest/hest.h >> + ErrorSource/Ghes.c >> + ErrorSource/Ghes.h >> + OemApeiHi1620.c >> + >> +[Packages] >> + ArmPkg/ArmPkg.dec >> + MdePkg/MdePkg.dec >> + Silicon/Hisilicon/HisiPkg.dec >> + >> +[LibraryClasses] >> + ArmSmcLib >> + BaseMemoryLib >> + DebugLib >> + HobLib >> + TimerLib >> + UefiDriverEntryPoint >> + UefiRuntimeServicesTableLib >> + >> +[Guids] >> + gOemConfigGuid >> + >> +[Protocols] >> + gEfiAcpiSdtProtocolGuid >> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED >> + >> +[Pcd] >> + gHisiTokenSpaceGuid.PcdCpldBaseAddress >> + gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable >> + >> +[Depex] >> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c >> new file mode 100644 >> index 0000000000..ff87e56cf5 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c >> @@ -0,0 +1,86 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#include "bert.h" >> +#include "./ErrorSource/Ghes.h" > > Drop the "./". > >> + >> +VOID >> +BertSetAcpiTable ( >> + IN BERT_CONTEXT *Context >> +) >> +{ >> + UINTN AcpiTableHandle; >> + EFI_STATUS Status; >> + if (Context == NULL) { >> + return; >> + } >> + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER* Bert = Context->BertHeader; >> + Bert->Header.Checksum = CalculateCheckSum8 ((UINT8*)(Bert), Bert->Header.Length); >> + AcpiTableHandle = 0; >> + Status = mAcpiTableProtocol->InstallAcpiTable ( >> + mAcpiTableProtocol, >> + Bert, >> + Bert->Header.Length, >> + &AcpiTableHandle); >> + ASSERT_EFI_ERROR (Status); >> + return; >> +} >> + >> +BOOLEAN >> +BertAddGenericErrorData ( >> + IN EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER *Bert, >> + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, >> + IN VOID *GenericErrorData, >> + IN UINT32 SizeOfGenericErrorData, >> + IN ERROR_SEVERITY ErrorSeverity, >> + IN BOOLEAN Correctable >> +) >> +{ >> + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: \n", __FUNCTION__, __LINE__)); >> + BOOLEAN Status = ErrorBlockAddErrorData ( >> + (VOID*)Bert->BootErrorRegion, >> + Bert->BootErrorRegionLength, >> + TypeOfErrorData, >> + GenericErrorData, >> + SizeOfGenericErrorData, >> + ErrorSeverity, >> + Correctable); >> + return Status; >> +} >> + >> +EFI_STATUS >> +BertHeaderCreator ( >> + IN BERT_CONTEXT *Context, >> + IN UINT32 ErrorBlockSize >> +) >> +{ >> + if (Context == NULL) { >> + return EFI_INVALID_PARAMETER; >> + } >> + Context->BertHeader = AllocateZeroPool (sizeof (EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER)); >> + Context->Block = AllocateReservedZeroPool (ErrorBlockSize); >> + Context->BlockSize = ErrorBlockSize; >> + *Context->BertHeader = (EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER) { >> + ARM_ACPI_HEADER ( >> + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE, >> + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER, >> + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION >> + ), >> + Context->BlockSize, >> + (UINT64)Context->Block >> + }; >> + return EFI_SUCCESS; >> +} >> + >> + >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h >> new file mode 100644 >> index 0000000000..af38a765bd >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h >> @@ -0,0 +1,42 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#ifndef _BERT_H_ >> +#define _BERT_H_ >> + >> +#include "Apei.h" >> +#include <Guid/Cper.h> >> + >> +typedef struct _BERT_CONTEXT { >> + EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER *BertHeader; // pointer to best header > > 'best headr' -> 'bert header'? > But anyway, the variable name is descriptive enough that the comment > is not needed. OK, delete it in v2 > >> + VOID *Block; >> + UINT32 BlockSize; // allocated memory size for bert's error block >> +} BERT_CONTEXT; >> + >> +EFI_STATUS >> +OemInitBertTable ( >> + IN EFI_HANDLE ImageHandle >> +); >> +VOID >> +BertSetAcpiTable ( >> + IN BERT_CONTEXT *Context >> +); >> +EFI_STATUS >> +BertHeaderCreator ( >> + BERT_CONTEXT *Context, >> + UINT32 ErrorBlockSize >> +); >> + >> + >> +#endif // _BERT_H_ >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c >> new file mode 100644 >> index 0000000000..898863718b >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c >> @@ -0,0 +1,326 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> +#include "einj.h" >> +#include "OemApeiHi1620.h" >> + >> + >> +EINJ_TABLE mEinj = { >> + { >> + ARM_ACPI_HEADER( >> + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE, >> + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER, >> + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION >> + ), >> + sizeof(EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER), >> + 0x0, >> + { >> + 0x0, >> + 0x0, >> + 0x0 >> + }, >> + EINJ_ACTION_NO >> + }, >> + { >> + { >> + // 0 EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION >> + EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + EINJ_BEGIN_OPERATION_VALUE, >> + EINJ_WRITE_MASK >> + }, >> + { >> + // 1 EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE >> + EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE, >> + EFI_ACPI_6_0_EINJ_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + EINJ_READ_MASK >> + }, >> + { >> + // 2 EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE >> + EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + EINJ_WRITE_MASK >> + }, >> + { >> + // 3 EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE >> + EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE, >> + EFI_ACPI_6_0_EINJ_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + 0xFFFFFFFF >> + }, >> + { >> + // 4 EFI_ACPI_6_0_EINJ_END_OPERATION >> + EFI_ACPI_6_0_EINJ_END_OPERATION, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + EINJ_END_OPERATION_VALUE, >> + 0xFFFFFFFF >> + }, >> + { >> + // 5 EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION >> + EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 32, >> + 0, >> + EFI_ACPI_6_0_DWORD, >> + GPIO1_BASE + GPIO_INT_MASK //0x40070008//0x4d000F00//GPIO0_BASE + GPIO0_SWPORT_DR_OFFSET >> + }, >> + 0, >> + 0xFFFFFFFF //BIT0 >> + }, >> + { >> + // 6 EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS >> + EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS, >> + EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0x01, >> + 0x01 >> + }, >> + { >> + // 7 EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS >> + EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS, >> + EFI_ACPI_6_0_EINJ_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + 0x3 >> + }, >> + { >> + // 8 EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS >> + EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + 0xFFFFFF >> + }, >> + { >> + // 9 EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS >> + EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS, >> + EFI_ACPI_6_0_EINJ_WRITE_REGISTER, >> + EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + 0xFFFFFF >> + } >> + } >> +}; >> + >> +EINJ_TRIGGER_ERROR_ACTION mEinjTriggerErrorAction = { >> + { >> + sizeof(EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE), >> + 0, >> + sizeof(EINJ_TRIGGER_ERROR_ACTION), >> + EINJ_TRIGGER_ERROR_ACTION_NO >> + }, >> + { >> + { >> + EFI_ACPI_6_0_EINJ_TRIGGER_ERROR, >> + EFI_ACPI_6_0_EINJ_NOOP, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_DWORD, >> + 0 >> + }, >> + 0, >> + 0 >> + } >> + } >> +}; >> + >> + >> +VOID >> +EinjSetAcpiTable( >> + EINJ_CONTEXT *Context >> +) >> +{ >> + UINTN AcpiTableHandle; >> + EFI_STATUS Status; >> + UINT8 Checksum; >> + EFI_ACPI_SDT_HEADER *Table; >> + EFI_ACPI_TABLE_VERSION TableVersion; >> + UINTN TableKey; >> + UINTN i; >> + //gBS->CloseEvent(Event); >> + Context->EINJ->EinjTableHeader.Header.Length = sizeof (EINJ_TABLE); //mEinj.EinjTableHeader.Header.Length = sizeof(EINJ_TABLE); > > Delete the commented out code. OK > >> + Checksum = CalculateCheckSum8 ((UINT8*)(Context->EINJ), Context->EINJ->EinjTableHeader.Header.Length); > > Wrap. > >> + Context->EINJ->EinjTableHeader.Header.Checksum = Checksum; >> + AcpiTableHandle = 0; >> + Status = mAcpiTableProtocol->InstallAcpiTable ( >> + mAcpiTableProtocol, >> + Context->EINJ, >> + Context->EINJ->EinjTableHeader.Header.Length, >> + &AcpiTableHandle >> + ); >> + for (i = 0; i < EFI_ACPI_MAX_NUM_TABLES; i++) { >> + Status = mAcpiSdtProtocol->GetAcpiTable(i, &Table, &TableVersion, &TableKey); >> + if (EFI_ERROR (Status)) { >> + break; >> + } >> + if (Table->Signature != EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE) { >> + continue; >> + } >> + mApeiTrustfirmwareStruc->EinjTableAddress = (EFI_PHYSICAL_ADDRESS)Table; >> + mApeiTrustfirmwareStruc->EinjDataStruct = (EFI_PHYSICAL_ADDRESS)Context->EinjData; >> + } >> + ASSERT_EFI_ERROR (Status) ; >> +} >> +//V2 >> +EFI_STATUS >> +EinjHeaderCreator( >> + EINJ_CONTEXT *Context >> +) >> +{ >> + EFI_STATUS Status; >> + EINJ_DATA_STRUCTURE *EinjData = NULL; >> + Status = gBS->AllocatePool ( >> + EfiReservedMemoryType, >> + sizeof (EINJ_DATA_STRUCTURE), >> + (VOID**)(&EinjData) >> + ); > > Drop the redundant parentheses. > >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + gBS->SetMem ( >> + EinjData, >> + sizeof (EINJ_DATA_STRUCTURE), >> + 0 >> + ); >> + >> + DEBUG ((DEBUG_INFO, "EINJ EinjData is at 0x%X,size =0x%x\n", EinjData, sizeof (EINJ_DATA_STRUCTURE))); >> + EinjData->TriggerErrorActionTablePtr = (EINJ_TRIGGER_ERROR_ACTION*)(&(EinjData->TriggerErrorActionTable)); >> + gBS->CopyMem (EinjData->TriggerErrorActionTablePtr, &mEinjTriggerErrorAction, sizeof (EINJ_TRIGGER_ERROR_ACTION)); > > Many very long lines in this function. Please wrap. OK, modify it in v2. > >> + EinjData->OperationBegin = 0; >> + EinjData->ErrorType = 0; >> + EinjData->ErrorCapabilities = 0xFFF; >> + EinjData->BusyStatus = 0; >> + EinjData->CommandStatus = 0; >> + mEinj.EinjInstructionEntry[0].RegisterRegion.Address = (UINT64)(&(EinjData->OperationBegin)); >> + mEinj.EinjInstructionEntry[1].RegisterRegion.Address = (UINT64)(&(EinjData->TriggerErrorActionTablePtr)); >> + mEinj.EinjInstructionEntry[2].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorType)); >> + mEinj.EinjInstructionEntry[3].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorCapabilities)); >> + mEinj.EinjInstructionEntry[4].RegisterRegion.Address = (UINT64)(&(EinjData->OperationBegin)); >> + mEinj.EinjInstructionEntry[6].RegisterRegion.Address = (UINT64)(&(EinjData->BusyStatus)); >> + mEinj.EinjInstructionEntry[7].RegisterRegion.Address = (UINT64)(&(EinjData->CommandStatus)); >> + mEinj.EinjInstructionEntry[8].RegisterRegion.Address = (UINT64)(&(EinjData->ErrorTypeWithAddress)); >> + mEinj.EinjInstructionEntry[9].RegisterRegion.Address = (UINT64)(&(EinjData->Timming)); >> + EinjData->ErrorTypeWithAddress.VendorErrorTypeOffset >> + = (UINT32)((UINTN) & (EinjData->VendorErrorTypeExtension) - (UINTN) & (EinjData->ErrorTypeWithAddress)); > > No spaces around '&'. > >> + // > > Drop empty comment. (But do leave a blank line.) > >> + Context->EinjData = EinjData; >> + Context->EINJ = &mEinj; >> + Context->ExecuteOperationEntry = &mEinj.EinjInstructionEntry[5]; >> + Context->GetErrorTypeEntry = &mEinj.EinjInstructionEntry[3]; >> + return EFI_SUCCESS; >> +} >> + >> + >> +EFI_STATUS >> +EinjConfigErrorInjectCapability( >> + EINJ_CONTEXT* Context, >> + UINT32 BitsSupportedErrorType >> +) >> +{ >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY* KeyEntry; >> + UINT32* EinjCapablity; >> + >> + KeyEntry = Context->GetErrorTypeEntry; >> + EinjCapablity = (UINT32*)KeyEntry->RegisterRegion.Address; >> + *EinjCapablity = BitsSupportedErrorType; >> + KeyEntry->Value = BitsSupportedErrorType; >> + return EFI_SUCCESS; >> +} >> + >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h >> new file mode 100644 >> index 0000000000..a5342b600f >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h >> @@ -0,0 +1,154 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#ifndef _EINJ_H_ >> +#define _EINJ_H_ >> + >> +#include "Apei.h" >> + >> +#define EINJ_ACTION_NO 10 >> +#define EINJ_BEGIN_OPERATION_VALUE 0xFFFF >> +#define EINJ_END_OPERATION_VALUE 0 >> +#define EINJ_WRITE_MASK 0xFFFFFFFF >> +#define EINJ_READ_VALUE 0xFFFF >> +#define EINJ_READ_MASK 0xFFFFFFFF >> + >> +#define EINJ_TRIGGER_ERROR_ACTION_NO 1 >> + >> +#define EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 >> +#define EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS 0x09 >> + >> + >> +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; >> +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; >> +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; >> + >> +// >> +// Error Type Definition >> +// >> +#define EINJ_PROCESSOR_CORRECTABLE BIT0 >> +#define EINJ_PROCESSOR_UNCORRECTABLE_NONFATAL BIT1 >> +#define EINJ_PROCESSOR_UNCORRECTABLE_FATAL BIT2 >> +#define EINJ_MEMORY_CORRECTABLE BIT3 >> +#define EINJ_MEMORY_UNCORRECTABLE_NONFATAL BIT4 >> +#define EINJ_MEMORY_UNCORRECTABLE_FATAL BIT5 >> +#define EINJ_PCIE_CORRECTABLE BIT6 >> +#define EINJ_PCIE_UNCORRECTABLE_NONFATAL BIT7 >> +#define EINJ_PCIE_UNCORRECTABLE_FATAL BIT8 >> +#define EINJ_PLATFORM_CORRECTABLE BIT9 >> +#define EINJ_PLATFORM_UNCORRECTABLE_NONFATAL BIT10 >> +#define EINJ_PLATFORM_UNCORRECTABLE_FATAL BIT11 >> +#define EINJ_VENDOR_DEFINED_ERROR_TYPE BIT31 >> + >> +// >> +#define EINJ_PROCESSOR_APIC_VALID BIT0 >> +#define EINJ_MEMORY_ADDRESS_VALID BIT1 >> +#define EINJ_PCIE_SBDF_VALID BIT2 >> + >> +//CPER >> +#define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 >> + >> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM32 0x03 >> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM64 0x04 > > Surely these should be added to MdePkg/Include/Guid/Cper.h instead? > Please submit a patch. OK, should this macro be add to MdePkg/Include/Guid/Cper.h ? EFI_GENERIC_ERROR_PROC_TYPE_ARM > >> + >> +/// >> +/// EINJ Table >> +/// >> + >> + >> +typedef struct { >> + EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER EinjTableHeader; >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY EinjInstructionEntry[EINJ_ACTION_NO]; >> +} EINJ_TABLE; >> + >> +typedef struct { >> + EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE TriggerErrorHeader; >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY ErrorInstructionEntry[EINJ_TRIGGER_ERROR_ACTION_NO]; >> +} EINJ_TRIGGER_ERROR_ACTION; >> + >> +typedef struct { >> + UINT32 Reserved: 8; >> + UINT32 Function: 3; >> + UINT32 Device: 5; >> + UINT32 PrimaryOrDeviceBus: 8; >> + UINT32 Segment: 8; >> +} EINJ_PCIE_SBDF; >> + >> +typedef struct { >> + UINT32 ErrorType; >> + UINT32 VendorErrorTypeOffset; >> + UINT32 Flags; >> + UINT32 ApicId; >> + UINT64 MemAddress; >> + UINT64 MemAddressRange; >> + EINJ_PCIE_SBDF PcieSBDF; >> +} EINJ_SET_ERROR_TYPE_WITH_ADDRESS; >> + >> +typedef struct { >> + UINT32 Length; >> + UINT32 SBDF; >> + UINT16 VendorId; >> + UINT16 DeviceId; >> + UINT8 RevId; >> + UINT8 Reserved[3]; >> +} EINJ_VENDOR_ERROR_TYPE; >> + >> +typedef struct { >> + UINT64 OperationBegin; >> + UINT64 ErrorType; >> + UINT64 ErrorCapabilities;// TODO: modified to uint32 > > Is it 32-bit or 64-bit? If it needs to be 32-bit, make it so - don't > say you intend to do so in future. It is 64-bit, I will delete the comment. > >> + UINT64 BusyStatus; >> + UINT64 CommandStatus; >> + UINT64 Timming; >> + EINJ_TRIGGER_ERROR_ACTION *TriggerErrorActionTablePtr; >> + EINJ_SET_ERROR_TYPE_WITH_ADDRESS ErrorTypeWithAddress; >> + EINJ_VENDOR_ERROR_TYPE VendorErrorTypeExtension; >> + EINJ_TRIGGER_ERROR_ACTION TriggerErrorActionTable; >> +} EINJ_DATA_STRUCTURE; >> + >> +// V2 >> +typedef struct _EINJ_CONTEXT { >> + EINJ_TABLE *EINJ; // pointer to EINJ header >> + EINJ_DATA_STRUCTURE *EinjData; >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY *GetErrorTypeEntry;// error injection capabilities >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY *ExecuteOperationEntry; >> +} EINJ_CONTEXT; >> + >> + >> +EFI_STATUS >> +InitEinjTable(VOID); >> +// Version2 >> +EFI_STATUS >> +EinjConfigErrorInjectCapability( >> + EINJ_CONTEXT *Context, >> + UINT32 BitsSupportedErrorType >> +); >> +EFI_STATUS >> +EinjHeaderCreator( >> + EINJ_CONTEXT *Context >> +); >> +/***OEM***/ >> +EFI_STATUS >> +OemInitEinjTable(VOID); >> +EFI_STATUS >> +OemEinjConfigExecuteOperationEntry( >> + EINJ_CONTEXT *Context >> +); >> +VOID >> +EinjSetAcpiTable( >> + EINJ_CONTEXT *Context >> +); >> + >> + >> +#endif // _EINJ_H_ >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c >> new file mode 100644 >> index 0000000000..338f56c0a2 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c >> @@ -0,0 +1,320 @@ >> +/** @file >> +* >> +* Copyright (c) 2018 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#include <Uefi/UefiBaseType.h> >> +#include <Guid/Cper.h> >> +#include "Ghes.h" >> + >> +#define READ_ACK_PRESERVE 0xFFFFFFFE >> +#define READ_ACK_WRITE 0x1 >> + >> +EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* >> +ErrorBlockInitial( >> + VOID *Block, >> + UINT32 Severity >> +) >> +{ >> + EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* BlockHeader = Block; >> + BlockHeader->BlockStatus = (EFI_ACPI_6_1_ERROR_BLOCK_STATUS) {0, 0, 0, 0, 0}; >> + BlockHeader->RawDataOffset = 0; >> + BlockHeader->RawDataLength = 0; >> + BlockHeader->DataLength = 0;//sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE); >> + BlockHeader->ErrorSeverity = Severity; >> + return BlockHeader; >> +} >> + >> + >> +BOOLEAN >> +ErrorBlockUpdateStatusStructure( >> + VOID *ErrorBlock >> +) >> +{ >> + if (ErrorBlock == NULL) { >> + return FALSE; >> + } >> + IN EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE *BlockHeader = ErrorBlock; >> + VOID *EntriesBegin = ErrorBlock + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE); >> + if (BlockHeader->BlockStatus.ErrorDataEntryCount == 0) { >> + //memset(EntriesBegin, 0, BlockHeader->DataLength); >> + gBS->SetMem(EntriesBegin, BlockHeader->DataLength, 0); >> + BlockHeader->RawDataLength = 0; >> + BlockHeader->RawDataOffset = 0; >> + BlockHeader->DataLength = 0; >> + } >> + return TRUE; >> +} >> + >> + >> +BOOLEAN >> +ErrorBlockAddErrorData( >> + IN VOID *ErrorBlock, >> + IN UINT32 MaxBlockLength, >> + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, >> + IN VOID *GenericErrorData, >> + IN UINT32 SizeOfGenericErrorData, >> + IN ERROR_SEVERITY ErrorSeverity, >> + IN BOOLEAN Correctable >> +) >> +{ >> + if (ErrorBlock == NULL || GenericErrorData == NULL) { >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Invalid Param \n", __FUNCTION__, __LINE__)); >> + return FALSE; >> + } >> + EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE* Entry; >> + EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* BlockHeader = ErrorBlock; >> + EFI_ACPI_6_1_ERROR_BLOCK_STATUS* BlockStatus = &BlockHeader->BlockStatus; >> + (VOID)ErrorBlockUpdateStatusStructure(ErrorBlock); >> + UINT32 ExpectedNewDataLength = BlockHeader->DataLength + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + SizeOfGenericErrorData; >> + if (sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE) + ExpectedNewDataLength > MaxBlockLength) { > > Wrap long lines. > >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]Out of BlockSize \n", __FUNCTION__, __LINE__)); >> + return FALSE; >> + } >> + // guid >> + EFI_GUID Guid; >> + switch (TypeOfErrorData) { >> + case PROCESSOR_GENERIC: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID; >> + break; >> + case PROCESSOR_ARM: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID; >> + break; >> + case PLATFORM_MEMORY: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID; >> + break; >> + case PLATFORM_MEMORY2: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID; >> + break; >> + case PCIE_EXPRESS: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCIE_GUID; >> + break; >> + case FIRMWARE_ERROR: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID; >> + break; >> + case PCI_BUS: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID; >> + break; >> + case PCI_COMPONENT: >> + Guid = (EFI_GUID)EFI_ERROR_SECTION_PCI_DEVICE_GUID; >> + break; >> + default: >> + return FALSE; >> + } >> + //Block Status >> + if (Correctable == TRUE) { >> + if (BlockStatus->CorrectableErrorValid == 0) { >> + BlockStatus->CorrectableErrorValid = 1; >> + } else { >> + BlockStatus->MultipleCorrectableErrors = 1; >> + } >> + } else { >> + if (BlockStatus->UncorrectableErrorValid == 0) { >> + BlockStatus->UncorrectableErrorValid = 1; >> + } else { >> + BlockStatus->MultipleUncorrectableErrors = 1; >> + } >> + } >> + BlockStatus->ErrorDataEntryCount++; >> + // Entry >> + Entry = (EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE*)(ErrorBlock + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE) + BlockHeader->DataLength); >> + gBS->SetMem(Entry, sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE), 0); >> + gBS->CopyMem(&Entry->SectionType, &Guid, sizeof(EFI_GUID)); >> + Entry->ErrorSeverity = ErrorSeverity; >> + Entry->Revision = EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_REVISION; >> + Entry->ErrorDataLength = SizeOfGenericErrorData; >> + VOID* GenericErrorDataFollowEntry = (VOID*)Entry + sizeof(EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE); > > Wrap long lines. > >> + gBS->CopyMem(GenericErrorDataFollowEntry, GenericErrorData, SizeOfGenericErrorData); >> + // BlockHeader >> + BlockHeader->RawDataOffset = 0; >> + BlockHeader->RawDataLength = 0; >> + BlockHeader->DataLength = ExpectedNewDataLength; >> + return TRUE; >> +} >> + >> +VOID >> +GhesV2Initial( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, >> + UINT32 BlockLength >> +) >> +{ >> + if (GhesV2 == NULL) { >> + return; >> + } >> + *GhesV2 = (EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE) { >> + .Type = EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_VERSION_2, >> + .SourceId = 0, >> + .RelatedSourceId = 0xFFFF, >> + .Flags = 0, >> + .Enabled = 1, >> + .NumberOfRecordsToPreAllocate = 1,//ERROR BLOCK >> + .MaxSectionsPerRecord = 1,// Num Entries(section) >> + .MaxRawDataLength = BlockLength, // Max Size Of a Raw Data >> + .ErrorStatusAddress = { >> + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, >> + .RegisterBitWidth = 64, >> + .RegisterBitOffset = 0, >> + .AccessSize = EFI_ACPI_6_1_QWORD, >> + .Address = 0 >> + }, >> + .NotificationStructure = { >> + .Type = EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV, >> + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE), >> + .ConfigurationWriteEnable = {0, 0, 0, 0, 0, 0, 0} , >> + .PollInterval = 0, >> + .Vector = 0, >> + .SwitchToPollingThresholdValue = 0, >> + .SwitchToPollingThresholdWindow = 0, >> + .ErrorThresholdValue = 0, >> + .ErrorThresholdWindow = 0 >> + }, >> + .ErrorStatusBlockLength = BlockLength, >> + .ReadAckRegister = { >> + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, >> + .RegisterBitWidth = 64, >> + .RegisterBitOffset = 0, >> + .AccessSize = EFI_ACPI_6_1_QWORD, >> + .Address = 0 >> + }, >> + .ReadAckPreserve = READ_ACK_PRESERVE, >> + .ReadAckWrite = READ_ACK_WRITE >> + }; >> + return; >> +} >> + >> +VOID >> +GhesV2AddNotification( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *This, >> + UINT8 Type >> +) >> +{ >> + This->NotificationStructure = (EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE) { >> + .Type = Type, >> + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE), >> + .ConfigurationWriteEnable = { >> + .Type = 0, >> + .PollInterval = 1, >> + .SwitchToPollingThresholdValue = 1, >> + .SwitchToPollingThresholdWindow = 1, >> + .ErrorThresholdValue = 1, >> + .ErrorThresholdWindow = 1 >> + }, >> + .PollInterval = 20, >> + .Vector = 0, >> + .SwitchToPollingThresholdValue = 0, >> + .SwitchToPollingThresholdWindow = 0, >> + .ErrorThresholdValue = 0, >> + .ErrorThresholdWindow = 0 >> + }; >> + return; >> +} >> + >> +EFI_STATUS >> +GhesV2LinkErrorBlock( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, >> + GHES_REGISTER *Register, >> + VOID *ErrorBlock >> +) >> +{ >> + if (ErrorBlock == NULL || Register == NULL || GhesV2 == NULL) { >> + return EFI_INVALID_PARAMETER; >> + } >> + >> + Register->ErrorStatusBlockAddress = (UINTN)ErrorBlock; >> + GhesV2->ErrorStatusAddress.Address = (UINTN) & (Register->ErrorStatusBlockAddress); >> + Register->AckRegister = READ_ACK_WRITE; >> + GhesV2->ReadAckRegister.Address = (UINT64) & (Register->AckRegister); > > No spaces around '&' when used as the addressof operator. > >> + return EFI_SUCCESS; >> +} >> + >> + >> +VOID GhesV1Initial( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *GhesV1, >> + UINT32 BlockLength >> +) >> +{ >> + if (GhesV1 == NULL) { >> + return; >> + } >> + *GhesV1 = (EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE) { >> + .Type = EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR, >> + .SourceId = 0, >> + .RelatedSourceId = 0xFFFF, >> + .Flags = 0, >> + .Enabled = 1, >> + .NumberOfRecordsToPreAllocate = 1,//ERROR BLOCK >> + .MaxSectionsPerRecord = 1,// Num Entries(section) >> + .MaxRawDataLength = BlockLength, // Max Size Of a Raw Data >> + .ErrorStatusAddress = { >> + .AddressSpaceId = EFI_ACPI_6_1_SYSTEM_MEMORY, >> + .RegisterBitWidth = 64, >> + .RegisterBitOffset = 0, >> + .AccessSize = EFI_ACPI_6_1_QWORD, >> + .Address = 0 >> + }, >> + .NotificationStructure = { >> + .Type = EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV, >> + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE), >> + .ConfigurationWriteEnable = {0, 0, 0, 0, 0, 0, 0}, >> + .PollInterval = 0, >> + .Vector = 0, >> + .SwitchToPollingThresholdValue = 0, >> + .SwitchToPollingThresholdWindow = 0, >> + .ErrorThresholdValue = 0, >> + .ErrorThresholdWindow = 0 >> + }, >> + .ErrorStatusBlockLength = BlockLength, >> + }; >> + return; >> +} >> + >> +VOID >> +GhesV1AddNotification( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, >> + UINT8 Type >> +) >> +{ >> + This->NotificationStructure = (EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE) { >> + .Type = Type, >> + .Length = sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE), >> + .ConfigurationWriteEnable = { >> + .Type = 0, >> + .PollInterval = 1, >> + .SwitchToPollingThresholdValue = 1, >> + .SwitchToPollingThresholdWindow = 1, >> + .ErrorThresholdValue = 1, >> + .ErrorThresholdWindow = 1 >> + }, >> + .PollInterval = 20, >> + .Vector = 0, >> + .SwitchToPollingThresholdValue = 0, >> + .SwitchToPollingThresholdWindow = 0, >> + .ErrorThresholdValue = 0, >> + .ErrorThresholdWindow = 0 >> + }; >> + return; >> +} >> + >> +EFI_STATUS GhesV1LinkErrorBlock( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, >> + UINT64 *ptrBlockAddress, >> + VOID *ErrorBlock >> +) >> +{ >> + if (ErrorBlock == NULL || ptrBlockAddress == NULL || This == NULL) { >> + return EFI_INVALID_PARAMETER; >> + } >> + *ptrBlockAddress = (UINTN)ErrorBlock; >> + This->ErrorStatusAddress.Address = (UINTN) ptrBlockAddress; >> + return EFI_SUCCESS; >> +} >> + >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h >> new file mode 100644 >> index 0000000000..20d9e55e7f >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h >> @@ -0,0 +1,100 @@ >> + >> +#ifndef GENERIC_HARDWARE_ERROR_SOURCE >> +#define GENERIC_HARDWARE_ERROR_SOURCE >> +#include "Apei.h" >> + >> + >> +typedef struct { >> + UINT64 AckRegister; >> + UINT64 ErrorStatusBlockAddress; >> +} GHES_REGISTER; >> + >> +typedef enum { >> + PROCESSOR_GENERIC = 0, >> + PROCESSOR_IA32_X64 = 1, >> + PROCESSOR_IPF = 2, >> + PROCESSOR_ARM = 3, >> + PLATFORM_MEMORY = 4, >> + PLATFORM_MEMORY2 = 5, >> + PCIE_EXPRESS = 6, >> + FIRMWARE_ERROR = 7, >> + PCI_BUS = 8, >> + PCI_COMPONENT = 9 >> +} EFI_CPER_SECTION_TYPE; >> +typedef enum { >> + RECOVERABLE = 0, >> + FATAL = 1, >> + CORRECTED = 2, >> + NONE = 3 >> +} ERROR_SEVERITY; >> +#define ERROR_SEVERITY_RECOVERABLE 0 >> +#define ERROR_SEVERITY_FATAL 1 >> +#define ERROR_SEVERITY_CORRECTED 2 >> +#define ERROR_SEVERITY_NONE 3 > > Why not use the ones defined by <IndustryStandard/Acpi##.h> ? Good idea, modify it in v2. > >> + >> +EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE* >> +ErrorBlockInitial( >> + VOID *Block, >> + UINT32 Severity >> +); >> +BOOLEAN ErrorBlockAddErrorData ( >> + IN VOID *ErrorBlock, >> + IN UINT32 MaxBlockLength, >> + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, >> + IN VOID *GenericErrorData, >> + IN UINT32 SizeOfGenericErrorData, >> + IN ERROR_SEVERITY ErrorSeverity, >> + IN BOOLEAN Correctable >> +); >> +BOOLEAN ErrorBlockAddErrorData ( >> + IN VOID *ErrorBlock, >> + IN UINT32 MaxBlockLength, >> + IN EFI_CPER_SECTION_TYPE TypeOfErrorData, >> + IN VOID *GenericErrorData, >> + IN UINT32 SizeOfGenericErrorData, >> + IN ERROR_SEVERITY ErrorSeverity, >> + IN BOOLEAN Correctable >> +); >> + >> +VOID >> +GhesV2Initial ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, >> + UINT32 BlockLength >> +); >> + >> +/** >> +@param type - one of HARDWARE_ERROR_NOTIFICATION Type, GSIV For ARM,and SCI for X86, >> + Notice: Windows OS hadn't support to GSIV, 20171026 >> +*/ >> +VOID >> +GhesV2AddNotification ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *This, >> + UINT8 Type >> +); >> + >> + >> +EFI_STATUS >> +GhesV2LinkErrorBlock ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *GhesV2, >> + GHES_REGISTER *Register, >> + VOID *ErrorBlock >> +); >> +VOID >> +GhesV1Initial ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *GhesV1, >> + UINT32 BlockLength >> +); >> +VOID >> +GhesV1AddNotification ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, >> + UINT8 Type >> +); >> +EFI_STATUS >> +GhesV1LinkErrorBlock ( >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE *This, >> + UINT64 *ptrBlockAddress, >> + VOID *ErrorBlock >> +); >> + >> + >> +#endif >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c >> new file mode 100644 >> index 0000000000..514a259a54 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c >> @@ -0,0 +1,379 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> +#include "erst.h" >> +#include <Guid/Cper.h> >> + >> +typedef struct { >> + EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER ErstTableHeader; >> + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY ErstInstructionEntry[ERST_ACTION_NO]; >> +} ERST_TABLE; >> + >> +ERST_TABLE mErst = { >> + { >> + ARM_ACPI_HEADER( >> + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE, >> + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER, >> + EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION >> + ), >> + sizeof(EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER), >> + { >> + 0x0, >> + 0x0, >> + 0x0, >> + 0x0 >> + }, >> + ERST_ACTION_NO, >> + }, >> + { >> + { >> + // 0 EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION >> + EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + ERST_BEGIN_WRITE_VALUE, >> + ERST_BEGIN_WRITE_MASK >> + }, >> + { >> + // 1 EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION >> + EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + ERST_BEGIN_READ_VALUE, >> + ERST_BEGIN_READ_MASK >> + }, >> + { >> + // 2 EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION >> + EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + ERST_BEGIN_CLEAR_VALUE, >> + ERST_BEGIN_CLEAR_MASK >> + }, >> + { >> + // 3 EFI_ACPI_6_0_ERST_END_OPERATION >> + EFI_ACPI_6_0_ERST_END_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, >> + EFI_ACPI_6_0_ERST_PRESERVE_REGISTER, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + ERST_END_OPERATION_VALUE, >> + ERST_END_OPERATION_MASK >> + }, >> + { >> + // 4 EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET >> + EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // 5 EFI_ACPI_6_0_ERST_EXECUTE_OPERATION >> + EFI_ACPI_6_0_ERST_EXECUTE_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_DWORD, >> + 0x94730000 >> + }, >> + 0x0002, >> + 0x0002 >> + }, >> + { >> + // 6 EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS >> + EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS, >> + EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0x00000001, >> + 0x00000001 >> + }, >> + { >> + // 7 EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS >> + EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // 8 EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER >> + EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // 9 EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER >> + EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // A EFI_ACPI_6_0_ERST_GET_RECORD_COUNT >> + EFI_ACPI_6_0_ERST_GET_RECORD_COUNT, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // B EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION >> + EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // C RESERVED >> + 0x0C, >> + EFI_ACPI_6_0_ERST_WRITE_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // D EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE >> + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // E EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH >> + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + }, >> + { >> + // F EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES >> + EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES, >> + EFI_ACPI_6_0_ERST_READ_REGISTER, >> + 0, >> + 0, >> + { >> + EFI_ACPI_6_0_SYSTEM_MEMORY, >> + 64, >> + 0, >> + EFI_ACPI_6_0_QWORD, >> + 0 >> + }, >> + 0, >> + ERST_MASK >> + } >> + } >> +}; >> + >> +VOID >> +ErstSetAcpiTable ( >> + ERST_BOOT_CONTEXT *Context >> +) >> +{ >> + UINTN AcpiTableHandle; >> + EFI_STATUS Status; >> + UINT8 Checksum; >> + mErst.ErstTableHeader.Header.Length = sizeof (ERST_TABLE); >> + Checksum = CalculateCheckSum8((UINT8*)(&mErst), mErst.ErstTableHeader.Header.Length); >> + mErst.ErstTableHeader.Header.Checksum = Checksum; >> + AcpiTableHandle = 0; >> + Status = mAcpiTableProtocol->InstallAcpiTable ( >> + mAcpiTableProtocol, >> + &mErst, >> + mErst.ErstTableHeader.Header.Length, >> + &AcpiTableHandle >> + ); >> + ASSERT_EFI_ERROR (Status) ; >> +} >> + >> +EFI_STATUS >> +ErstHeaderCreator ( >> + ERST_BOOT_CONTEXT *Context, >> + UINT64 BufferSize,//ERST_DATASTORE_SIZE >> + VOID *NvRamAddrRange, >> + UINT64 NvRamAllRecordLength, >> + UINT64 NvRamAddrRangeLength >> +) >> +{ >> + EFI_STATUS Status = EFI_SUCCESS; >> + ERST_RT_CONTEXT *ErstRtCtx; >> + // >> + ErstRtCtx = AllocateReservedZeroPool (sizeof (ERST_RT_CONTEXT)); >> + ErstRtCtx->Operation = ERST_END_OPERATION; >> + ErstRtCtx->RecordOffset = 0; >> + ErstRtCtx->BusyStatus = 0; >> + ErstRtCtx->CommandStatus = 0; >> + ErstRtCtx->KeyRecordId = 0; >> + ErstRtCtx->MaxTimeOfExecuteOperation = (UINT64)(-1); > > Better to use MAX_UINT64. OK > >> + ErstRtCtx->RecordCount = 0; >> + ErstRtCtx->ErrorLogAddressRange = (UINT64) AllocateReservedZeroPool (BufferSize); > > No space after (UINT64). > >> + ErstRtCtx->ErrorLogAddressRangeLength = BufferSize; >> + ErstRtCtx->ErrorLogAttributes = 0; >> + ErstRtCtx->NvRamLogAddrRange = NvRamAddrRange; >> + ErstRtCtx->NvRamLogAddrRangeLength = NvRamAddrRangeLength; >> + ErstRtCtx->NvRamRecordOffset = 0; >> + ErstRtCtx->NvRamNextVallidRecordId = (UINT64)(-1); > > Better to use MAX_UINT64. > >> + ErstRtCtx->NvRamNextValidRecordOffset = 0; >> + ErstRtCtx->NvRamAllRecordLength = NvRamAllRecordLength; >> + mErst.ErstInstructionEntry[0].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); >> + mErst.ErstInstructionEntry[1].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); >> + mErst.ErstInstructionEntry[2].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); >> + mErst.ErstInstructionEntry[3].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->Operation)); >> + mErst.ErstInstructionEntry[4].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->RecordOffset)); >> + mErst.ErstInstructionEntry[6].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->BusyStatus)); >> + mErst.ErstInstructionEntry[7].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->CommandStatus)); >> + mErst.ErstInstructionEntry[8].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->NvRamNextVallidRecordId)); >> + mErst.ErstInstructionEntry[9].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->KeyRecordId)); >> + mErst.ErstInstructionEntry[10].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->RecordCount)); >> + mErst.ErstInstructionEntry[11].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->DummyWrite)); >> + mErst.ErstInstructionEntry[12].RegisterRegion.Address = 0; >> + mErst.ErstInstructionEntry[13].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAddressRange)); >> + mErst.ErstInstructionEntry[14].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAddressRangeLength)); >> + mErst.ErstInstructionEntry[15].RegisterRegion.Address = (UINT64)(&(ErstRtCtx->ErrorLogAttributes)); >> + Context->ErstHeader = (EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER*)&mErst; >> + Context->ExecuteOperationEntry = &(mErst.ErstInstructionEntry[5]); >> + Context->GetErrorLogAddrRangeAttributes = &(mErst.ErstInstructionEntry[15]); >> + Context->Rt = ErstRtCtx; >> + return Status; >> +}; >> + >> +VOID >> +SetAttributeOfErrorLogAddressRange ( >> + ERST_BOOT_CONTEXT *Context, >> + UINT64 Attribute >> +) >> +{ >> + Context->Rt->ErrorLogAttributes = Attribute & 0x7; > > What's that 0x7? I do't know really. This function is not called anywhere, so I will drop this function. > >> + return; >> +} >> + >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h >> new file mode 100644 >> index 0000000000..1dfa4f4245 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h >> @@ -0,0 +1,145 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#ifndef _ERST_H_ >> +#define _ERST_H_ >> + >> +#include "Apei.h" >> + >> +#define ERST_STATUS_SUCCESS EFI_ACPI_6_1_ERST_STATUS_SUCCESS >> +#define ERST_STATUS_NOT_ENOUGH_SPACE EFI_ACPI_6_1_ERST_STATUS_NOT_ENOUGH_SPACE >> +#define ERST_STATUS_HARDWARE_NOT_AVAILABLE EFI_ACPI_6_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE >> +#define ERST_STATUS_FAILED EFI_ACPI_6_1_ERST_STATUS_FAILED >> +#define ERST_STATUS_RECORD_STORE_EMPTY EFI_ACPI_6_1_ERST_STATUS_RECORD_STORE_EMPTY >> +#define ERST_STATUS_RECORD_NOT_FOUND EFI_ACPI_6_1_ERST_STATUS_RECORD_NOT_FOUND >> + >> +#define ERST_BEGIN_WRITE_VALUE 0x01 >> +#define ERST_BEGIN_WRITE_MASK 0xFFFFFFFFFFFFFFFF >> +#define ERST_BEGIN_READ_VALUE 0x02 >> +#define ERST_BEGIN_READ_MASK 0xFFFFFFFFFFFFFFFF >> +#define ERST_BEGIN_CLEAR_VALUE 0x03 >> +#define ERST_BEGIN_CLEAR_MASK 0xFFFFFFFFFFFFFFFF >> +#define ERST_END_OPERATION_VALUE 0x04 >> +#define ERST_END_OPERATION_MASK 0xFFFFFFFFFFFFFFFF >> +#define ERST_MASK 0xFFFFFFFFFFFFFFFF >> + >> +#define ERST_BEGIN_WRITE_OPERATION EFI_ACPI_6_1_ERST_BEGIN_WRITE_OPERATION >> +#define ERST_BEGIN_READ_OPERATION EFI_ACPI_6_1_ERST_BEGIN_READ_OPERATION >> +#define ERST_BEGIN_CLEAR_OPERATION EFI_ACPI_6_1_ERST_BEGIN_CLEAR_OPERATION >> +#define ERST_END_OPERATION EFI_ACPI_6_1_ERST_END_OPERATION >> +#define ERST_BEGIN_DUMMY_WRITE_OPERATION EFI_ACPI_6_1_ERST_BEGIN_DUMMY_WRITE_OPERATION >> + >> +#define ERST_ACTION_NO 16 >> + >> +#define ERST_RECORD_FREE 0x00 >> +#define ERST_RECORD_INUSE 0x01 >> + >> +#define ERST_RECORD_STORE_IN_NVRAM 0 >> +#define ERST_RECORD_STORE_IN_MEM 1 >> +#define ERST_RECORD_STORE_IN_SPI_FLASH 2 >> + >> +#define ERST_LOG_ATTR_NVRAM 0x02 >> + >> +typedef struct { >> + UINT64 OperationId; >> + UINT64 RecordOffset; >> + UINT64 BusyStatus; >> + UINT64 CommandStatus; >> + UINT64 GetRecordId; >> + UINT64 SetRecordId; >> + UINT64 RecordCount; >> + UINT64 DummyWrite; >> + UINT64 Reserved; >> + UINT64 ErrorLogAddrRange; >> + UINT64 ErrorLogAddrRangeLength; >> + UINT64 ErrorLogAttributes; >> + UINT64 NvRamLogAddrNext; >> + UINT64 NvRamLogSizeRemain; >> +} ERST_DATA_STRUCTURE; >> + >> +typedef struct { >> + UINT16 Signature; >> + UINT16 Data0; >> + UINT16 Data1; >> + UINT8 Data2; >> + UINT8 Attributes; //0: free >> +} ERST_ERROR_RECORD_INFO; >> + >> +/// >> +/// ERST Table >> +/// >> + >> + >> + >> +typedef struct _ERST_CONTEXT { >> + UINT64 Operation; // WRITE,READ,CLEAR,END, >> + UINT64 DummyWrite;//DUMMY_WRITE_OPEATION >> + UINT64 RecordOffset; // Offset form the buffer(error log adress range) >> + UINT32 BusyStatus; >> + UINT32 CommandStatus; >> + UINT64 KeyRecordId; //OS Set the Record ID To Read/Write/Search >> + UINT64 MaxTimeOfExecuteOperation; >> + UINT64 RecordCount; // Num of Record In NVRAM >> + UINT64 ErrorLogAddressRange; // Address Of Range Top >> + UINT64 ErrorLogAddressRangeLength; // Address Of Range Top >> + UINT64 ErrorLogAttributes; >> + VOID *NvRamLogAddrRange; >> + UINT64 NvRamLogAddrRangeLength; >> + UINT64 NvRamRecordOffset; >> + UINT64 NvRamNextVallidRecordId; //Get RecordId entry >> + UINT64 NvRamNextValidRecordOffset; >> + UINT64 NvRamAllRecordLength; >> +} ERST_RT_CONTEXT; > > Please align the comments a bit better. OK > >> + >> +typedef struct _ERST_BOOT_CONTEXT { >> + EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER *ErstHeader; >> + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *ExecuteOperationEntry; >> + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *GetErrorLogAddrRangeAttributes; >> + ERST_RT_CONTEXT *Rt; >> +} ERST_BOOT_CONTEXT; >> + >> +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; >> +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; >> + >> +EFI_STATUS >> +ErstHeaderCreator( >> + ERST_BOOT_CONTEXT *Context, >> + UINT64 BufferSize,//ERST_DATASTORE_SIZE >> + VOID *NvRamAddrRange, >> + UINT64 NvRamAllRecordLength, >> + UINT64 NvRamAddrRangeLength >> +); >> + >> +VOID >> +SetAttributeOfErrorLogAddressRange ( >> + ERST_BOOT_CONTEXT *Context, >> + UINT64 Attribute >> +); >> + >> +/***OEM***/ >> +EFI_STATUS >> +OemInitErstTable (VOID); >> + >> +EFI_STATUS >> +OemErstConfigExecuteOperationEntry ( >> + ERST_BOOT_CONTEXT *Context >> +); >> + >> +VOID >> +ErstSetAcpiTable ( >> + ERST_BOOT_CONTEXT *Context >> +); >> + >> + >> +#endif // _ERST_H_ >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c >> new file mode 100644 >> index 0000000000..76296de95d >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c >> @@ -0,0 +1,98 @@ >> +#include "ErrorSource/Ghes.h" >> +#include "hest.h" >> + >> +EFI_STATUS HestAddErrorSourceDescriptor ( >> + IN OUT HEST_CONTEXT *Context, >> + IN VOID *ErrorSourceDescriptor, >> + IN UINT32 SizeOfDescriptor >> +) >> +{ >> + UINT16 *pSourceId; >> + VOID *Descriptor; >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; >> + >> + if ((Context == NULL) || (ErrorSourceDescriptor == NULL)) { >> + return EFI_INVALID_PARAMETER; >> + } >> + HestHeader = Context->HestHeader; >> + if (HestHeader->Header.Length + SizeOfDescriptor > Context->OccupiedMemorySize) { >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: Hest Size Too small\n", __FUNCTION__, __LINE__)); >> + return EFI_BUFFER_TOO_SMALL; >> + } >> + Descriptor = (UINT8*)HestHeader + HestHeader->Header.Length; >> + gBS->CopyMem ((VOID*)Descriptor , ErrorSourceDescriptor, SizeOfDescriptor); >> + pSourceId = Descriptor + sizeof (UINT16); >> + *pSourceId = HestHeader->ErrorSourceCount; >> + HestHeader->Header.Length += SizeOfDescriptor; >> + HestHeader->ErrorSourceCount++; >> + Context->KeyErrorSource = Descriptor; >> + return EFI_SUCCESS; >> +} >> + >> +VOID >> +HestSetAcpiTable( >> + IN HEST_CONTEXT *Context >> +) >> +{ >> + UINTN AcpiTableHandle; >> + EFI_STATUS Status; >> + UINT8 Checksum; >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; >> + EFI_ACPI_SDT_HEADER *Table; >> + EFI_ACPI_TABLE_VERSION TableVersion; >> + UINTN TableKey; >> + UINT32 i; > > I. > >> + if (Context == NULL) { >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: ERROR\n", __FUNCTION__, __LINE__)); >> + return; >> + } >> + >> + HestHeader = Context->HestHeader; >> + Checksum = CalculateCheckSum8 ((UINT8*)(HestHeader), HestHeader->Header.Length); >> + HestHeader->Header.Checksum = Checksum; >> + AcpiTableHandle = 0; >> + // see AcpiTableProtocol.c InstallAcpiTable >> + Status = mAcpiTableProtocol->InstallAcpiTable ( >> + mAcpiTableProtocol, >> + HestHeader, >> + HestHeader->Header.Length, >> + &AcpiTableHandle); >> + for (i = 0; i < EFI_ACPI_MAX_NUM_TABLES; i++) { >> + Status = mAcpiSdtProtocol->GetAcpiTable (i, &Table, &TableVersion, &TableKey); >> + if (EFI_ERROR (Status)) { >> + break; >> + } >> + if (Table->Signature != EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE) { >> + continue; >> + } >> + mApeiTrustfirmwareStruc->HestTableAddress = (EFI_PHYSICAL_ADDRESS)Table; >> + DEBUG ((DEBUG_ERROR, "Acpi HestSetAcpiTable Table = 0x%x.\n", (EFI_PHYSICAL_ADDRESS)Table)); >> + } >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]:OUT %llx, IN %llx \n", __FUNCTION__, __LINE__, AcpiTableHandle, Context->HestHeader)); >> + // TBD free Hest Buffer > > If the buffer needs freeing, free it. Don't talk about it. No buffer need to free, I will drop the comment. > >> + return; >> +} >> + >> +EFI_STATUS >> +HestHeaderCreator( >> + HEST_CONTEXT *Context, >> + UINT32 PreAllocatedHestSize >> +) >> +{ >> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL]: \n", __FUNCTION__, __LINE__)); >> + if (PreAllocatedHestSize < sizeof (EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER)) { >> + return EFI_BUFFER_TOO_SMALL; >> + } >> + Context->HestHeader = AllocateReservedZeroPool (PreAllocatedHestSize); >> + *Context->HestHeader = (EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER) { >> + ARM_ACPI_HEADER ( >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE, >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER, >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION >> + ), >> + 0x0 >> + }; >> + Context->KeyErrorSource = Context->HestHeader + 1; >> + Context->OccupiedMemorySize = PreAllocatedHestSize; >> + return EFI_SUCCESS; >> +} >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h >> new file mode 100644 >> index 0000000000..09fe985025 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h >> @@ -0,0 +1,58 @@ >> +/** @file >> +* >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >> +* >> +* This program and the accompanying materials >> +* are licensed and made available under the terms and conditions of the BSD License >> +* which accompanies this distribution. The full text of the license may be found at >> +* http://opensource.org/licenses/bsd-license.php >> +* >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> +* >> +**/ >> + >> +#ifndef _HEST_H_ >> +#define _HEST_H_ >> + >> +#include "Apei.h" >> + >> + >> +typedef struct _HEST_CONTEXT { >> + EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER *HestHeader; // pointer to hest header >> + UINT32 OccupiedMemorySize; // allocated memory size for hest >> + VOID *KeyErrorSource; // key error source, valtile >> +} HEST_CONTEXT; >> + >> +EFI_STATUS >> +HestAddErrorSourceDescriptor ( >> + IN OUT HEST_CONTEXT *Context, >> + IN VOID *ErrorSourceDescriptor, >> + IN UINT32 SizeOfDescriptor >> +); >> +VOID >> +HestSetAcpiTable ( >> + IN HEST_CONTEXT *Context >> +); >> +EFI_STATUS >> +HestHeaderCreator ( >> + HEST_CONTEXT *Context, >> + UINT32 PreAllocatedHestSize >> +); >> + >> +/** >> +* OEM Interface declaration >> +* 1.Interface is not realized default >> +* 2.OEM should implement this interface >> +*/ >> +extern >> +VOID >> +OemHestInitialNotification (VOID); >> + >> +extern >> +EFI_STATUS >> +OemInitHestTable( >> + IN EFI_HANDLE ImageHandle >> +); >> + >> +#endif // _HEST_H_ >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c >> new file mode 100644 >> index 0000000000..3eb28b9549 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c >> @@ -0,0 +1,303 @@ >> +#include <Guid/Cper.h> >> +#include <Uefi/UefiBaseType.h> >> +#include "Bert/bert.h" >> +#include "Einj/einj.h" >> +#include "ErrorSource/Ghes.h" >> +#include "Erst/erst.h" >> +#include "Hest/hest.h" >> +#include "OemApeiHi1620.h" >> + >> +VOID >> +GpioCombInit ( >> + UINTN Base, >> + UINT32 Pin >> +) >> +{ >> + UINT32 Val = MmioRead32 (Base + GPIO_INT_MASK); >> + MmioWrite32 (Base + GPIO_INT_MASK, Val | Pin); >> + Val = MmioRead32 (Base + GPIO_INT_EN); >> + MmioWrite32 (Base + GPIO_INT_EN, Val | Pin); >> + Val = MmioRead32 (Base + GPIO_SWPORT_DDR); >> + MmioWrite32 (Base + GPIO_SWPORT_DDR, Val & (~Pin)); >> + Val = MmioRead32 (Base + GPIO_INT_TYPE); >> + MmioWrite32 (Base + GPIO_INT_TYPE, Val & (~Pin)); >> + Val = MmioRead32 (Base + GPIO_INT_POLARITY); >> + MmioWrite32 (Base + GPIO_INT_POLARITY, Val | Pin); >> + Val = MmioRead32 (Base + GPIO_LS_SYNC); >> + MmioWrite32 (Base + GPIO_LS_SYNC, Val & (~Pin)); >> + MmioWrite32 (Base + GPIO_INT_COMB, 1); >> + return; >> +} >> +/************************************************ >> +*************** HEST *************** >> +************************************************/ >> + >> +/***************************************************************************** >> +* @param EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE* GhesV2,Vector of GhesV2 >> +* @param UINT8 NumOfGhesV2 >> +* @param_out >> +* @retval EFI_STATUS >> +*****************************************************************************/ >> +EFI_STATUS >> +GhesV2ContextForHest ( >> + IN EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE GhesV2[MAX_GHES], >> + IN UINT8 NumOfGhesV2 >> +) >> +{ >> + // ensuce the size is expected >> + if ((GhesV2 == NULL) || (NumOfGhesV2 != MAX_GHES)) { >> + return EFI_INVALID_PARAMETER; >> + } >> + //current?? only 1 block per ghes is supported >> + UINT8 NumOfBlockPerGhes = 1; > > When are you intending to add support for more? > If not imminently, just leave this overhead out for now. I think we have no plan to add support for more. So, drop that comment. > >> + UINT8 iter = 0; > > I. > >> + UINT32 BlockMemorySize = MAX_GHES * (sizeof (GHES_REGISTER) + NumOfBlockPerGhes * GENERIC_HARDWARE_ERROR_BLOCK_SIZE); >> + UINT32 ErrorSeverityArray[MAX_GHES] = {ERROR_SEVERITY_RECOVERABLE, ERROR_SEVERITY_FATAL, ERROR_SEVERITY_CORRECTED}; > > Wrap long lines. > >> + VOID *ErrorBlockHead; >> + VOID *ErrorBlock; >> + VOID *BlockMemory; >> + GHES_REGISTER *GhesRegisters; >> + EFI_STATUS Status = EFI_SUCCESS; >> + Status = gBS->AllocatePool ( >> + EfiReservedMemoryType, >> + BlockMemorySize, >> + & BlockMemory > > No space after '&'. > >> + ); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + gBS->SetMem ( >> + BlockMemory, >> + BlockMemorySize, >> + 0 >> + ); > > Above call would easily fit on a single line. > >> + GhesRegisters = BlockMemory; >> + ErrorBlockHead = BlockMemory + MAX_GHES * sizeof (GHES_REGISTER); >> + ErrorBlock = ErrorBlockHead; >> + for (iter = 0; iter < MAX_GHES; iter++) { >> + GhesV2Initial (&GhesV2[iter], GENERIC_HARDWARE_ERROR_BLOCK_SIZE); >> + GhesV2AddNotification (&GhesV2[iter], EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV); >> + ErrorBlockInitial (ErrorBlock, ErrorSeverityArray[iter]); >> + GhesV2LinkErrorBlock (&GhesV2[iter], &GhesRegisters[iter], ErrorBlock); >> + ErrorBlock += GhesV2[iter].ErrorStatusBlockLength; >> + } >> + return EFI_SUCCESS; >> +} >> +/***************************************************************************** >> +* @param EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE* GhesV2,Vector of GhesV2 >> +* @param UINT8 NumOfGhesV2 >> +* @param_out >> +* @retval EFI_STATUS >> +*****************************************************************************/ >> + >> +EFI_STATUS >> +GhesV1ContextForHest( >> + IN EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE GhesV1[MAX_GHES], >> + IN UINT8 NumOfGhesV1 >> +) >> +{ >> + // ensuce the size is expected >> + if ((GhesV1 == NULL) || (NumOfGhesV1 != MAX_GHES)) { >> + return EFI_INVALID_PARAMETER; >> + } >> + //current?? only 1 block per ghes is supported >> + UINT8 NumOfBlockPerGhes = 1; > > Same as for previous function. > >> + UINT8 iter = 0; > > I. > >> + UINT32 BlockMemorySize = MAX_GHES * (sizeof (UINT64) + NumOfBlockPerGhes * GENERIC_HARDWARE_ERROR_BLOCK_SIZE); >> + UINT32 ErrorSeverityArray[MAX_GHES] = {ERROR_SEVERITY_RECOVERABLE, ERROR_SEVERITY_FATAL, ERROR_SEVERITY_CORRECTED}; > > Wrap long lines. > >> + VOID *ErrorBlockHead; >> + VOID *ErrorBlock; >> + VOID *BlockMemory; >> + UINT64 *ptrBlockAddress; >> + EFI_STATUS Status = EFI_SUCCESS; >> + Status = gBS->AllocatePool ( >> + EfiReservedMemoryType, >> + BlockMemorySize, >> + & BlockMemory > > No space after '&'. > >> + ); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + gBS->SetMem ( >> + BlockMemory, >> + BlockMemorySize, >> + 0 >> + ); > > Unwrap short lone. > >> + ptrBlockAddress = BlockMemory; >> + ErrorBlockHead = BlockMemory + MAX_GHES * sizeof (UINT64); >> + ErrorBlock = ErrorBlockHead; >> + for (iter = 0; iter < MAX_GHES; iter++) { >> + GhesV1Initial (&GhesV1[iter], GENERIC_HARDWARE_ERROR_BLOCK_SIZE); >> + GhesV1AddNotification (&GhesV1[iter], EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV); >> + ErrorBlockInitial (ErrorBlock, ErrorSeverityArray[iter]); >> + GhesV1LinkErrorBlock (&GhesV1[iter], &ptrBlockAddress[iter], ErrorBlock); >> + ErrorBlock += GhesV1[iter].ErrorStatusBlockLength; >> + } >> + return EFI_SUCCESS; >> +} >> + >> +VOID >> +OemHestInitialNotification () >> +{ >> + // GPIO init >> + // use int_msk to simulate >> + UINTN Base = IOMUX_REG_BASE; >> + //GPIO9, in document 'PhosphorV680 Totemiomux' iomg051, >> + //Set GPIO9 to pad_ex_int1 >> + MmioWrite32(Base + IOMG051, PAD_EX_INT1); > > Spave before '('. > >> + return; >> +} >> + >> +VOID >> +OemEinjInitialNotification () >> +{ >> + UINTN Base = IOMUX_REG_BASE; >> + //use TB_GPIO_PIN10 for EINJ >> + MmioWrite32 (Base + IOMG052, PAD_EX_INT1); >> + return; >> +} >> + >> +EFI_STATUS >> +OemInitHestTable( >> + IN EFI_HANDLE ImageHandle >> +) >> +{ >> + EFI_STATUS Status = EFI_SUCCESS; >> + HEST_CONTEXT HestContext; >> + EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE GhesV2[MAX_GHES]; >> + Status = HestHeaderCreator (&HestContext, HEST_TABLE_SIZE); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + Status = GhesV2ContextForHest(GhesV2, MAX_GHES); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[0], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); >> + mApeiTrustfirmwareStruc->HestRecoverableErrorGhesV2 = HestContext.KeyErrorSource; >> + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[1], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); >> + mApeiTrustfirmwareStruc->HestFatalErrorGhesV2 = HestContext.KeyErrorSource; >> + Status |= HestAddErrorSourceDescriptor (&HestContext, &GhesV2[2], sizeof(EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE)); > > Very long lines. Pelase wrap. (space after sizeof - apply throughout) > >> + mApeiTrustfirmwareStruc->HestCorrectedErrorGhesV2 = HestContext.KeyErrorSource; >> + OemHestInitialNotification (); >> + HestSetAcpiTable (&HestContext); >> + return Status; >> +} >> +/************************************************ >> +*************** BERT *************** >> +************************************************/ >> + >> +EFI_STATUS >> +OemInitBertTable ( >> + IN EFI_HANDLE ImageHandle >> +) >> +{ >> + BERT_CONTEXT Context; >> + BOOLEAN Status; >> + Status = BertHeaderCreator (&Context, BOOT_ERROR_REGION_SIZE); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + ErrorBlockInitial (Context.Block, ERROR_SEVERITY_NONE); >> + BertSetAcpiTable (&Context); >> + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: %r\n", __FUNCTION__, __LINE__, Status)); >> + return EFI_SUCCESS; >> +} >> +/************************************************ >> +*************** EINJ *************** >> +************************************************/ >> +EFI_STATUS >> +OemEinjConfigExecuteOperationEntry ( >> + EINJ_CONTEXT *Context >> +) >> +{ >> + EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY* KeyEntry = Context->ExecuteOperationEntry; >> + OemEinjInitialNotification (); >> + //use TB_GPIO_PIN10 for EINJ >> + KeyEntry->RegisterRegion.Address = PcdGet64 (PcdCpldBaseAddress) + CPLD_GPIO10_INT_OFFSET; >> + KeyEntry->Mask = CPLD_MASK; >> + KeyEntry->Value = CPLD_VALUE; >> + return EFI_SUCCESS; >> +} >> + >> +EFI_STATUS >> +OemInitEinjTable( >> +) >> +{ >> + EFI_STATUS Status; >> + EINJ_CONTEXT Context; >> + Status = EinjHeaderCreator (&Context); >> + if (EFI_ERROR (Status)) { >> + return Status; >> + } >> + (VOID)EinjConfigErrorInjectCapability (&Context, 0xFFF);// TBD >> + (VOID)OemEinjConfigExecuteOperationEntry (&Context); >> + EinjSetAcpiTable (&Context); >> + DEBUG((DEBUG_ERROR, "[%a]:[%dL]: %d\n", __FUNCTION__, __LINE__, Status)); >> + return EFI_SUCCESS; >> +} >> +/************************************************ >> +*************** ERST *************** >> +************************************************/ >> + >> +EFI_STATUS >> +OemErstConfigExecuteOperationEntry( >> + ERST_BOOT_CONTEXT *Context >> +) >> +{ >> + EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY *KeyEntry; >> + KeyEntry = Context->ExecuteOperationEntry; >> + KeyEntry->RegisterRegion.Address = GPIO1_BASE + GPIO_INT_MASK; //GPIO0_BASE + GPIO0_SWPORT_DR_OFFSET > > I don't understand the purpose of the comment. It is useless and drop it in v2. > >> + KeyEntry->Value = 0x10; >> + KeyEntry->Mask = 0xFFFFFFFF; >> + GpioCombInit (GPIO1_BASE, 0xFFFF); >> + return EFI_SUCCESS; >> +} >> + >> +BOOLEAN >> +GetNvRamRegion( >> + OUT VOID **NvRamAddrRange, >> + OUT UINT64 *NvRamAddrRangeLength >> +) >> +{ >> + /***TODO: >> + *1. Search ER Record In >> + *2. if found, return addr and length >> + *3. if not found, allocal new space for record >> + ***/ > > This isn't a wiki. > Feel free to write a (much more) detailed comment describing the > function and its current shortcomings. > However, comments in functions should describe what the code is > doing. Not what it is not doing. I will all TODO comments in v2. > >> + UINT32 Store = ERST_RECORD_STORE_IN_MEM; >> + switch (Store) { >> + case (ERST_RECORD_STORE_IN_NVRAM): >> + break; >> + case (ERST_RECORD_STORE_IN_MEM): >> + * NvRamAddrRangeLength = ERST_DATASTORE_SIZE; >> + * NvRamAddrRange = AllocateReservedZeroPool (ERST_DATASTORE_SIZE);// TODO should be real no-volatile ram > > See above. > >> + break; >> + case (ERST_RECORD_STORE_IN_SPI_FLASH): >> + break; >> + default: >> + ; >> + } >> + return TRUE; >> +} >> + >> +/***OEM***/ >> +EFI_STATUS >> +OemInitErstTable( >> +) >> +{ >> + EFI_STATUS Status = ERST_STATUS_SUCCESS; >> + ERST_BOOT_CONTEXT Context; >> + UINT64 BufferSize = ERST_DATASTORE_SIZE; >> + VOID *NvRamAddrRange; >> + UINT64 NvRamAddrRangeLength; >> + UINT64 NvRamAllRecordLength; >> + >> + GetNvRamRegion (&NvRamAddrRange, &NvRamAddrRangeLength);// TODO >> + NvRamAllRecordLength = 0; //TODO get length of exist records In NvRam > > No TODO. See previous function. > >> + Status = ErstHeaderCreator (&Context, BufferSize , NvRamAddrRange, NvRamAllRecordLength, NvRamAddrRangeLength); > > Wrap long line. OK, all comments will apply in v2. Thanks. > > / > Leif > >> + OemErstConfigExecuteOperationEntry (&Context); >> + mApeiTrustfirmwareStruc->ErstContext = (VOID*)Context.Rt; >> + ErstSetAcpiTable (&Context); >> + return Status; >> +}; >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h >> new file mode 100644 >> index 0000000000..0488bdc050 >> --- /dev/null >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h >> @@ -0,0 +1,28 @@ >> +#ifndef OEM_APEI_HI1620_H_H >> +#define OEM_APEI_HI1620_H_H >> +#define GPIO0_BASE 0x94100000 >> +#define GPIO1_BASE 0x94110000 >> +#define GPIO_INT_MASK 0x34 >> +#define GPIO_INT_EN 0x30 >> +#define GPIO_SWPORT_DDR 0x04 >> +#define GPIO_INT_TYPE 0x38 >> +#define GPIO_INT_POLARITY 0x3c >> +#define GPIO_LS_SYNC 0x60 >> +#define GPIO_INT_COMB 0xffc >> +#define IOMUX_REG_BASE 0x94190000 >> +#define IOMG051 0xCC >> +#define IOMG052 0xD0 >> +#define PAD_EX_INT1 0x4 >> +#define CPLD_GPIO10_INT_OFFSET 0xfc >> +#define CPLD_BASE_ADDR 0x80000000 >> +#define CPLD_MASK 0x01030000 >> +#define CPLD_VALUE 0x01020000 >> + >> +#define MAX_GHES 3 >> +#define GENERIC_HARDWARE_ERROR_BLOCK_SIZE 0x1000 >> +#define HEST_TABLE_SIZE 0x2000 >> +#define BOOT_ERROR_REGION_SIZE 0x1000 >> +#define GPIO_HEST_NOTIFIED_PIN BIT8 >> + >> +#define ERST_DATASTORE_SIZE 0x2000 >> +#endif >> -- >> 2.17.0 >>
On Fri, Aug 10, 2018 at 10:46:34AM +0800, Ming wrote: > >> --- /dev/null > >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > >> +[sources.common] > >> + Apei.c > > > > Apei.h? > > As Apei.h is included by Apei.c, so I think Apei.h > is no need to add here. Will the build system still generate correct build dependencies if Apei.h is modified? > >> + Bert/bert.c > >> + Bert/bert.h And if so, why are these other .h files explicitly specified? > >> + Einj/einj.c > >> + Einj/einj.h > >> + Erst/erst.c > >> + Erst/erst.h > >> + Hest/hest.c > >> + Hest/hest.h > >> + ErrorSource/Ghes.c > >> + ErrorSource/Ghes.h > >> + OemApeiHi1620.c > >> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > >> new file mode 100644 > >> index 0000000000..a5342b600f > >> --- /dev/null > >> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h > >> @@ -0,0 +1,154 @@ > >> +/** @file > >> +* > >> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. > >> +* > >> +* This program and the accompanying materials > >> +* are licensed and made available under the terms and conditions of the BSD License > >> +* which accompanies this distribution. The full text of the license may be found at > >> +* http://opensource.org/licenses/bsd-license.php > >> +* > >> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > >> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > >> +* > >> +**/ > >> + > >> +#ifndef _EINJ_H_ > >> +#define _EINJ_H_ > >> + > >> +#include "Apei.h" > >> + > >> +#define EINJ_ACTION_NO 10 > >> +#define EINJ_BEGIN_OPERATION_VALUE 0xFFFF > >> +#define EINJ_END_OPERATION_VALUE 0 > >> +#define EINJ_WRITE_MASK 0xFFFFFFFF > >> +#define EINJ_READ_VALUE 0xFFFF > >> +#define EINJ_READ_MASK 0xFFFFFFFF > >> + > >> +#define EINJ_TRIGGER_ERROR_ACTION_NO 1 > >> + > >> +#define EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 > >> +#define EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS 0x09 > >> + > >> + > >> +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; > >> +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; > >> +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; > >> + > >> +// > >> +// Error Type Definition > >> +// > >> +#define EINJ_PROCESSOR_CORRECTABLE BIT0 > >> +#define EINJ_PROCESSOR_UNCORRECTABLE_NONFATAL BIT1 > >> +#define EINJ_PROCESSOR_UNCORRECTABLE_FATAL BIT2 > >> +#define EINJ_MEMORY_CORRECTABLE BIT3 > >> +#define EINJ_MEMORY_UNCORRECTABLE_NONFATAL BIT4 > >> +#define EINJ_MEMORY_UNCORRECTABLE_FATAL BIT5 > >> +#define EINJ_PCIE_CORRECTABLE BIT6 > >> +#define EINJ_PCIE_UNCORRECTABLE_NONFATAL BIT7 > >> +#define EINJ_PCIE_UNCORRECTABLE_FATAL BIT8 > >> +#define EINJ_PLATFORM_CORRECTABLE BIT9 > >> +#define EINJ_PLATFORM_UNCORRECTABLE_NONFATAL BIT10 > >> +#define EINJ_PLATFORM_UNCORRECTABLE_FATAL BIT11 > >> +#define EINJ_VENDOR_DEFINED_ERROR_TYPE BIT31 > >> + > >> +// > >> +#define EINJ_PROCESSOR_APIC_VALID BIT0 > >> +#define EINJ_MEMORY_ADDRESS_VALID BIT1 > >> +#define EINJ_PCIE_SBDF_VALID BIT2 > >> + > >> +//CPER > >> +#define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 > >> + > >> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM32 0x03 > >> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM64 0x04 > > > > Surely these should be added to MdePkg/Include/Guid/Cper.h instead? > > Please submit a patch. > > OK, should this macro be add to MdePkg/Include/Guid/Cper.h ? > EFI_GENERIC_ERROR_PROC_TYPE_ARM Yes please - I could have been more clear on that. / Leif _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
在 8/14/2018 11:39 PM, Leif Lindholm 写道: > On Fri, Aug 10, 2018 at 10:46:34AM +0800, Ming wrote: >>>> --- /dev/null >>>> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > >>>> +[sources.common] >>>> + Apei.c >>> >>> Apei.h? >> >> As Apei.h is included by Apei.c, so I think Apei.h >> is no need to add here. > > Will the build system still generate correct build dependencies if > Apei.h is modified? Yes > >>>> + Bert/bert.c >>>> + Bert/bert.h > > And if so, why are these other .h files explicitly specified? I will remove these .h files in v3. > >>>> + Einj/einj.c >>>> + Einj/einj.h >>>> + Erst/erst.c >>>> + Erst/erst.h >>>> + Hest/hest.c >>>> + Hest/hest.h >>>> + ErrorSource/Ghes.c >>>> + ErrorSource/Ghes.h >>>> + OemApeiHi1620.c > >>>> diff --git a/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h >>>> new file mode 100644 >>>> index 0000000000..a5342b600f >>>> --- /dev/null >>>> +++ b/Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h >>>> @@ -0,0 +1,154 @@ >>>> +/** @file >>>> +* >>>> +* Copyright (c) 2017 Hisilicon Limited. All rights reserved. >>>> +* >>>> +* This program and the accompanying materials >>>> +* are licensed and made available under the terms and conditions of the BSD License >>>> +* which accompanies this distribution. The full text of the license may be found at >>>> +* http://opensource.org/licenses/bsd-license.php >>>> +* >>>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >>>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >>>> +* >>>> +**/ >>>> + >>>> +#ifndef _EINJ_H_ >>>> +#define _EINJ_H_ >>>> + >>>> +#include "Apei.h" >>>> + >>>> +#define EINJ_ACTION_NO 10 >>>> +#define EINJ_BEGIN_OPERATION_VALUE 0xFFFF >>>> +#define EINJ_END_OPERATION_VALUE 0 >>>> +#define EINJ_WRITE_MASK 0xFFFFFFFF >>>> +#define EINJ_READ_VALUE 0xFFFF >>>> +#define EINJ_READ_MASK 0xFFFFFFFF >>>> + >>>> +#define EINJ_TRIGGER_ERROR_ACTION_NO 1 >>>> + >>>> +#define EFI_ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 >>>> +#define EFI_ACPI_EINJ_GET_EXCUTE_OPERATION_TIMINGS 0x09 >>>> + >>>> + >>>> +extern EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol; >>>> +extern EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol; >>>> +extern APEI_TRUSTFIRMWARE_STRUCTURE *mApeiTrustfirmwareStruc; >>>> + >>>> +// >>>> +// Error Type Definition >>>> +// >>>> +#define EINJ_PROCESSOR_CORRECTABLE BIT0 >>>> +#define EINJ_PROCESSOR_UNCORRECTABLE_NONFATAL BIT1 >>>> +#define EINJ_PROCESSOR_UNCORRECTABLE_FATAL BIT2 >>>> +#define EINJ_MEMORY_CORRECTABLE BIT3 >>>> +#define EINJ_MEMORY_UNCORRECTABLE_NONFATAL BIT4 >>>> +#define EINJ_MEMORY_UNCORRECTABLE_FATAL BIT5 >>>> +#define EINJ_PCIE_CORRECTABLE BIT6 >>>> +#define EINJ_PCIE_UNCORRECTABLE_NONFATAL BIT7 >>>> +#define EINJ_PCIE_UNCORRECTABLE_FATAL BIT8 >>>> +#define EINJ_PLATFORM_CORRECTABLE BIT9 >>>> +#define EINJ_PLATFORM_UNCORRECTABLE_NONFATAL BIT10 >>>> +#define EINJ_PLATFORM_UNCORRECTABLE_FATAL BIT11 >>>> +#define EINJ_VENDOR_DEFINED_ERROR_TYPE BIT31 >>>> + >>>> +// >>>> +#define EINJ_PROCESSOR_APIC_VALID BIT0 >>>> +#define EINJ_MEMORY_ADDRESS_VALID BIT1 >>>> +#define EINJ_PCIE_SBDF_VALID BIT2 >>>> + >>>> +//CPER >>>> +#define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 >>>> + >>>> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM32 0x03 >>>> +#define EFI_GENERIC_ERROR_PROC_ISA_ARM64 0x04 >>> >>> Surely these should be added to MdePkg/Include/Guid/Cper.h instead? >>> Please submit a patch. >> >> OK, should this macro be add to MdePkg/Include/Guid/Cper.h ? >> EFI_GENERIC_ERROR_PROC_TYPE_ARM > > Yes please - I could have been more clear on that. > > / > Leif >