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client-ip=2607:f8b0:4864:20::541; helo=mail-pg1-x541.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D2506209605A3 for ; Fri, 20 Jul 2018 01:03:10 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id x5-v6so6177913pgp.7 for ; Fri, 20 Jul 2018 01:03:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=n3eHr+0dX8IYX+3kUePFIsYPtCeILQNMh/Lm+P9RUhs=; b=La1Onny684Cld2JsXzBKOftHtKPaBWrtdvfR5S9jWtvMnWWL8KFT4zbMsUtOopgByN Qu+eSzROIMfUOzQaItP8C3SYfVlchij1/Rdh6mSoWvgLSwF3I+XxFOTPPnOuDzNH6ziL Qiwm9xtExfXxEqj47a6Cd81O0uPCWfo8426tM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; 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2 Change DEBUG log level; Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: pcihostbridge-v1 Heyi Guo (10): Hisilicon: Enable WARN and INFO debug message Hisilicon/D05/PlatformPciLib: fix misuse of macro Hisilicon/Pci: Move PciPlatform to common directory Hisilicon/PlatformPciLib: add segment for each root bridge Hisilicon: add PciHostBridgeLib Hisilicon: add PciCpuIo2Dxe Hisilicon: add PciSegmentLib for Hi161x Hisilicon/D0x: Switch to generic PciHostBridge driver Hisilicon: remove platform specific PciHostBridge Hisilicon/PlatformPciLib: clear redundant felds in RESOURCE_APPETURE Ming Huang (3): Hisilicon/Pci: Add two api for PciPlatform driver Hisilicon/Pci: move ATU configuration to PciPlatformLib Hisilicon/Pci: move EnlargeAtuConfig0() to PciPlatformLib Platform/Hisilicon/D03/D03.dsc | 13 +- Platform/Hisilicon/D03/D03.fdf | 5 +- .../D03/Drivers/PciPlatform/PciPlatform.h | 180 -- .../Library/PlatformPciLib/PlatformPciLib.c | 24 +- Platform/Hisilicon/D05/D05.dsc | 13 +- Platform/Hisilicon/D05/D05.fdf | 5 +- .../Library/PlatformPciLib/PlatformPciLib.c | 66 +- .../PciHostBridgeLib/PciHostBridgeLib.c | 304 +++ .../PciHostBridgeLib/PciHostBridgeLib.inf | 51 + .../Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c | 557 ++++ .../ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf | 48 + .../Drivers/PciHostBridgeDxe/PciHostBridge.c | 1659 ------------ .../Drivers/PciHostBridgeDxe/PciHostBridge.h | 528 ---- .../PciHostBridgeDxe/PciHostBridgeDxe.inf | 74 - .../PciHostBridgeDxe/PciRootBridgeIo.c | 2405 ----------------- .../Drivers/PciPlatform/PciPlatform.c | 45 + .../Drivers/PciPlatform/PciPlatform.inf | 1 + .../Hi161xPciPlatformLib.c | 384 +++ .../Hi161xPciPlatformLib.inf | 42 + .../Hi161xPciSegmentLib.inf | 36 + .../Hi161xPciSegmentLib/PciSegmentLib.c | 1503 ++++++++++ Silicon/Hisilicon/Hisilicon.dsc.inc | 8 +- .../Include/Library/PlatformPciLib.h | 3 +- 23 files changed, 3037 insertions(+), 4917 deletions(-) delete mode 100644 Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.h create mode 100644 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c create mode 100644 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf create mode 100644 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c create mode 100644 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf delete mode 100644 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c delete mode 100644 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h delete mode 100644 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf delete mode 100644 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c rename {Platform/Hisilicon/D03 => Silicon/Hisilicon}/Drivers/PciPlatform/PciPlatform.c (89%) rename {Platform/Hisilicon/D03 => Silicon/Hisilicon}/Drivers/PciPlatform/PciPlatform.inf (94%) create mode 100644 Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.c create mode 100644 Silicon/Hisilicon/Hi1610/Library/Hi161xPciPlatformLib/Hi161xPciPlatformLib.inf create mode 100644 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf create mode 100644 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c -- 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel