From patchwork Mon Jan 20 12:20:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 239810 List-Id: U-Boot discussion From: baruch at tkos.co.il (Baruch Siach) Date: Mon, 20 Jan 2020 14:20:07 +0200 Subject: [PATCH v2 02/10] arm: mvebu: clearfog: enable both DDR clocks In-Reply-To: References: Message-ID: Enabled both DDR clock signals to support Clearfog variants (currently, Clearfog GTR) that need both clocks. Reviewed-by: Stefan Roese Signed-off-by: Baruch Siach --- board/solidrun/clearfog/clearfog.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 03724fee10c1..8b6381194688 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -68,7 +68,10 @@ static struct mv_ddr_topology_map board_topology_map = { BUS_MASK_32BIT, /* Busses mask */ MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ { {0} }, /* raw spd data */ - {0} /* timing parameters */ + {0}, /* timing parameters */ + { {0} }, /* electrical configuration */ + {0,}, /* electrical parameters */ + 0x3, /* clock enable mask */ }; struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)