From patchwork Thu Feb 27 17:38:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 236960 List-Id: U-Boot discussion From: masahiroy at kernel.org (Masahiro Yamada) Date: Fri, 28 Feb 2020 02:38:46 +0900 Subject: [PATCH 1/3] ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL In-Reply-To: <20200214115442.7166-1-yamada.masahiro@socionext.com> References: <20200214115442.7166-1-yamada.masahiro@socionext.com> Message-ID: On Fri, Feb 14, 2020 at 8:55 PM Masahiro Yamada wrote: > > The comment /* deassert reset */ is wrong. It asserts the reset. > > It no longer needs to stay in SPL. The NAND controller reset is > handled in the driver. So, this assert can be moved to the > board_init() of U-Boot proper. > > Signed-off-by: Masahiro Yamada > --- > > arch/arm/mach-uniphier/Makefile | 1 + > arch/arm/mach-uniphier/board_init.c | 4 ++ > arch/arm/mach-uniphier/clk/clk-early-ld4.c | 7 ---- > arch/arm/mach-uniphier/init.h | 8 ++++ > arch/arm/mach-uniphier/nand-reset.c | 43 ++++++++++++++++++++++ > 5 files changed, 56 insertions(+), 7 deletions(-) > create mode 100644 arch/arm/mach-uniphier/nand-reset.c > > diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile > index 115af244cd55..769778cf5083 100644 > --- a/arch/arm/mach-uniphier/Makefile > +++ b/arch/arm/mach-uniphier/Makefile > @@ -22,6 +22,7 @@ endif > obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o > obj-y += pinctrl-glue.o > obj-$(CONFIG_MMC) += mmc-first-dev.o > +obj-$(CONFIG_NAND_DENALI) += nand-reset.o > obj-y += fdt-fixup.o > > endif > diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c > index 99727a300420..4f9cd6e722c1 100644 > --- a/arch/arm/mach-uniphier/board_init.c > +++ b/arch/arm/mach-uniphier/board_init.c > @@ -141,6 +141,10 @@ int board_init(void) > > support_card_late_init(); > > + led_puts("U4"); > + > + uniphier_nand_reset_assert(); > + > led_puts("Uboo"); > > return 0; > diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c > index f32f78dd26d8..0f9ce6509768 100644 > --- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c > +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c > @@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void) > { > u32 tmp; > > - /* deassert reset */ > - if (spl_boot_device() != BOOT_DEVICE_NAND) { > - tmp = readl(sc_base + SC_RSTCTRL); > - tmp &= ~SC_RSTCTRL_NRST_NAND; > - writel(tmp, sc_base + SC_RSTCTRL); > - }; > - > /* provide clocks */ > tmp = readl(sc_base + SC_CLKCTRL); > tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; > diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h > index 9dc5b885a5fe..3c77f4885348 100644 > --- a/arch/arm/mach-uniphier/init.h > +++ b/arch/arm/mach-uniphier/init.h > @@ -101,6 +101,14 @@ unsigned int uniphier_boot_device_raw(void); > int uniphier_have_internal_stm(void); > int uniphier_boot_from_backend(void); > int uniphier_pin_init(const char *pinconfig_name); > + > +#ifdef CONFIG_NAND_DENALI > +void uniphier_nand_reset_assert(void); > +#else > +static inline void uniphier_nand_reset_assert(void) > +{ > +} > +#endif > #ifdef CONFIG_ARM64 > void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size); > #else > diff --git a/arch/arm/mach-uniphier/nand-reset.c b/arch/arm/mach-uniphier/nand-reset.c > new file mode 100644 > index 000000000000..b8f75a5f189f > --- /dev/null > +++ b/arch/arm/mach-uniphier/nand-reset.c > @@ -0,0 +1,43 @@ > +// SPDX-License-Identifier: GPL-2.0 or later > +/* > + * Copyright (C) 2020 Socionext Inc. > + * Author: Masahiro Yamada > + */ > + > +#include > +#include > +#include > +#include > + > +#include "init.h" > + > +/* > + * Assert the Denali NAND controller reset if found. > + * > + * On LD4, the bootstrap process starts running after power-on reset regardless > + * of the boot mode, here the pin-mux is not necessarily set up for NAND, then > + * the controller is stuck. Assert the controller reset here, and should be > + * deasserted in the driver after the pin-mux is correctly handled. For other > + * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet > + * effective when the boot swap is on. So, the reset should be asserted anyway. > + */ > +void uniphier_nand_reset_assert(void) > +{ > + struct udevice *dev; > + struct reset_ctl_bulk resets; > + int ret; > + > + ret = uclass_find_first_device(UCLASS_MTD, &dev); > + if (ret) > + return; I changed this hunk as follows, and applied to u-boot-uniphier. index b8f75a5f18..11cadaabd8 100644 > + /* make sure this is the Denali NAND controller */ > + if (strcmp(dev->driver->name, "denali-nand-dt")) > + return; > + > + ret = reset_get_bulk(dev, &resets); > + if (ret) > + return; > + > + reset_assert_bulk(&resets); > +} > -- > 2.17.1 > --- a/arch/arm/mach-uniphier/nand-reset.c +++ b/arch/arm/mach-uniphier/nand-reset.c @@ -28,7 +28,7 @@ void uniphier_nand_reset_assert(void) int ret; ret = uclass_find_first_device(UCLASS_MTD, &dev); - if (ret) + if (ret || !dev) return; /* make sure this is the Denali NAND controller */