From patchwork Wed May 27 13:33:19 2020
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X-Patchwork-Submitter: =?UTF-8?Q?Benedikt-Alexander_Mokro=c3=9f?=
 <u-boot@bamkrs.de>
X-Patchwork-Id: 246725
List-Id: U-Boot discussion <u-boot.lists.denx.de>
From: u-boot at bamkrs.de (=?UTF-8?Q?Benedikt-Alexander_Mokro=c3=9f?=)
Date: Wed, 27 May 2020 15:33:19 +0200
Subject: [PATCH 2/2] sun8i-emac: Added sun8i-v3s-emac example to sun8i-v3s.dtsi
Message-ID: <6ffbd48d-a8f4-4247-817c-4fe25a8099ab@bamkrs.de>

This optional patch adds the needed device-tree node to sun8i-v3s.dtsi to enable
ethernet for sun8i-v3s boards.

Signed-off-by: Benedikt-Alexander Mokro? <u-boot at bamkrs.de>
---
  arch/arm/dts/sun8i-v3s.dtsi | 48 +++++++++++++++++++++++++++++++++++++
  1 file changed, 48 insertions(+)

diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
index ebefc0fefe..e6c090465a 100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -280,5 +280,53 @@
  			#interrupt-cells = <3>;
  			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  		};
+
+		emac: ethernet at 1c30000 {
+			compatible = "allwinner,sun8i-v3s-emac";
+			syscon = <&syscon>;
+			reg = <0x01c30000 0x104>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu RST_BUS_EMAC>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu CLK_BUS_EMAC>;
+			clock-names = "stmmaceth";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy-handle = <&int_mii_phy>;
+			phy = <&int_mii_phy>;
+			phy-mode = "mii";
+			allwinner,leds-active-low;
+			status = "disabled";
+			
+			mdio: mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+			};
+
+			mdio-mux {
+				compatible = "allwinner,sun8i-h3-mdio-mux";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mdio-parent-bus = <&mdio>;
+
+				int_mdio: mdio at 1 {
+					compatible = "allwinner,sun8i-h3-mdio-internal";
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					
+					int_mii_phy: ethernet-phy at 1 {
+						compatible = "ethernet-phy-ieee802.3-c22";
+						reg = <1>;
+						clocks = <&ccu CLK_BUS_EPHY>;
+						resets = <&ccu RST_BUS_EPHY>;
+						phy-is-integrated;
+					};
+				};
+			};
+		};
  	};
  };