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Mon, 30 Sep 2024 05:44:41 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e96a36597sm149362745e9.31.2024.09.30.05.44.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2024 05:44:40 -0700 (PDT) From: neil.armstrong@linaro.org Date: Mon, 30 Sep 2024 14:44:31 +0200 Subject: [PATCH v3 09/13] ufs: Sync possible UFS Quirks with Linux UFS driver MIME-Version: 1.0 Message-Id: <20240930-topic-ufs-enhancements-v3-9-58234f84ab89@linaro.org> References: <20240930-topic-ufs-enhancements-v3-0-58234f84ab89@linaro.org> In-Reply-To: <20240930-topic-ufs-enhancements-v3-0-58234f84ab89@linaro.org> To: Tom Rini , Bhupesh Sharma , Neha Malcom Francis Cc: Michal Simek , Marek Vasut , bmeng.cn@gmail.com, u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong , Venkatesh Yadav Abbarapu , Bhupesh Sharma X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=7573; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=q8fsmqgenbbQnBeevkHGjjRLOCaFmquIV/UAgOUc4GY=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm+p0rX+Gr+II5YcGNkhqwervTHmK1IEAtK1qlS55g rdCT/kiJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZvqdKwAKCRB33NvayMhJ0d9PD/ 9FFKLpewFsm5rq7p/yphUpNRebqWkgpoLKQ05TlJYcXAd5lAcQnS/pTn8kOLTRLlmdEoLP0FlCKrRK y2nNTOdTl6nbdgRtGzKYMppA84EQwgCAk0cCyXQw5S90jPSwk3xhr+ZSy0cqhbq8tNC93IvdedEtaW r2N28ZiZiVQ2eXnNCdRjj8Okl++tVCQ+NIBEBdJsoUjsrjGBNeaw+SLoKH2IqrXhaM1HpiQFVQjJDo AKNvfIu+6LQvsg0kEbQVK2WyMSqky/zm7fi9FHj1iJ+xgMksqJuwys+M/XCIL4seluGYS9KqQATzI2 9zbyrWpj2h0rrFz76MCoeGbfrpLgMpm3EeqMRgvLNneHrfqPBu62If7TAJ74aMJp1iaXomY2aSozVi k9LSNW9+JO5o4xs9R98qyJTK9/cga0oQ6Y5rpz5sO+CLSWE2yXA10W0zhd1nYncItvQiQZi4wf5PJL SFylCg2FSjvZVDq1Zcx61uJjFLWQChmtTltLlay43jKvYW3g4WwXJ5rS23Ohkzew2DU4tMUOXZKxy0 jyYC+VXpnB+0fB+F19fbXxI0PrpXb+V/hmGcmYIgfhSxfgBjeRnTERzM/PIeolIKaG9MmU3YNFKRbF 2mcmWY55+zJ6jDyTw9oahrB25WU2bfsxVG9qPLhPOtV17RZ4zY3UDN7AYlWw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Sync u-boot UFS driver to add all possible UFS Quirks as supported by Linux UFS driver as well. Synced with include/ufs/ufshcd.h from Linux v6.11 release Signed-off-by: Bhupesh Sharma Tested-by: Venkatesh Yadav Abbarapu --- drivers/ufs/ufs.h | 197 +++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 164 insertions(+), 33 deletions(-) diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index 555f8a6857d..c1c6d15db4a 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -703,6 +703,169 @@ struct ufs_hba_ops { int (*phy_initialization)(struct ufs_hba *hba); }; +enum ufshcd_quirks { + /* Interrupt aggregation support is broken */ + UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0, + + /* + * delay before each dme command is required as the unipro + * layer has shown instabilities + */ + UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1, + + /* + * If UFS host controller is having issue in processing LCC (Line + * Control Command) coming from device then enable this quirk. + * When this quirk is enabled, host controller driver should disable + * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE + * attribute of device to 0). + */ + UFSHCD_QUIRK_BROKEN_LCC = 1 << 2, + + /* + * The attribute PA_RXHSUNTERMCAP specifies whether or not the + * inbound Link supports unterminated line in HS mode. Setting this + * attribute to 1 fixes moving to HS gear. + */ + UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3, + + /* + * This quirk needs to be enabled if the host controller only allows + * accessing the peer dme attributes in AUTO mode (FAST AUTO or + * SLOW AUTO). + */ + UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4, + + /* + * This quirk needs to be enabled if the host controller doesn't + * advertise the correct version in UFS_VER register. If this quirk + * is enabled, standard UFS host driver will call the vendor specific + * ops (get_ufs_hci_version) to get the correct version. + */ + UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5, + + /* + * Clear handling for transfer/task request list is just opposite. + */ + UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6, + + /* + * This quirk needs to be enabled if host controller doesn't allow + * that the interrupt aggregation timer and counter are reset by s/w. + */ + UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7, + + /* + * This quirks needs to be enabled if host controller cannot be + * enabled via HCE register. + */ + UFSHCI_QUIRK_BROKEN_HCE = 1 << 8, + + /* + * This quirk needs to be enabled if the host controller regards + * resolution of the values of PRDTO and PRDTL in UTRD as byte. + */ + UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9, + + /* + * This quirk needs to be enabled if the host controller reports + * OCS FATAL ERROR with device error through sense data + */ + UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10, + + /* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it doesn't work. + */ + UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11, + + /* + * This quirk needs to disable manual flush for write booster + */ + UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12, + + /* + * This quirk needs to disable unipro timeout values + * before power mode change + */ + UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13, + + /* + * This quirk needs to be enabled if the host controller does not + * support UIC command + */ + UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15, + + /* + * This quirk needs to be enabled if the host controller cannot + * support physical host configuration. + */ + UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, + + /* + * This quirk needs to be enabled if the host controller has + * 64-bit addressing supported capability but it doesn't work. + */ + UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, + + /* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it's FASTAUTO only. + */ + UFSHCD_QUIRK_HIBERN_FASTAUTO = 1 << 18, + + /* + * This quirk needs to be enabled if the host controller needs + * to reinit the device after switching to maximum gear. + */ + UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH = 1 << 19, + + /* + * Some host raises interrupt (per queue) in addition to + * CQES (traditional) when ESI is disabled. + * Enable this quirk will disable CQES and use per queue interrupt. + */ + UFSHCD_QUIRK_MCQ_BROKEN_INTR = 1 << 20, + + /* + * Some host does not implement SQ Run Time Command (SQRTC) register + * thus need this quirk to skip related flow. + */ + UFSHCD_QUIRK_MCQ_BROKEN_RTC = 1 << 21, + + /* + * This quirk needs to be enabled if the host controller supports inline + * encryption but it needs to initialize the crypto capabilities in a + * nonstandard way and/or needs to override blk_crypto_ll_ops. If + * enabled, the standard code won't initialize the blk_crypto_profile; + * ufs_hba_variant_ops::init() must do it instead. + */ + UFSHCD_QUIRK_CUSTOM_CRYPTO_PROFILE = 1 << 22, + + /* + * This quirk needs to be enabled if the host controller supports inline + * encryption but does not support the CRYPTO_GENERAL_ENABLE bit, i.e. + * host controller initialization fails if that bit is set. + */ + UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE = 1 << 23, + + /* + * This quirk needs to be enabled if the host controller driver copies + * cryptographic keys into the PRDT in order to send them to hardware, + * and therefore the PRDT should be zeroized after each request (as per + * the standard best practice for managing keys). + */ + UFSHCD_QUIRK_KEYS_IN_PRDT = 1 << 24, + + /* + * This quirk indicates that the controller reports the value 1 (not + * supported) in the Legacy Single DoorBell Support (LSDBS) bit of the + * Controller Capabilities register although it supports the legacy + * single doorbell mode. + */ + UFSHCD_QUIRK_BROKEN_LSDBS_CAP = 1 << 25, +}; + struct ufs_hba { struct udevice *dev; void __iomem *mmio_base; @@ -711,39 +874,7 @@ struct ufs_hba { u32 capabilities; u32 version; u32 intr_mask; - u32 quirks; -/* - * If UFS host controller is having issue in processing LCC (Line - * Control Command) coming from device then enable this quirk. - * When this quirk is enabled, host controller driver should disable - * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE - * attribute of device to 0). - */ -#define UFSHCD_QUIRK_BROKEN_LCC BIT(0) - -/* - * This quirk needs to be enabled if the host controller has - * 64-bit addressing supported capability but it doesn't work. - */ -#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS BIT(1) - -/* - * This quirk needs to be enabled if the host controller has - * auto-hibernate capability but it's FASTAUTO only. - */ -#define UFSHCD_QUIRK_HIBERN_FASTAUTO BIT(2) - -/* - * This quirk needs to be enabled if the host controller has - * 64-bit addressing supported capability but it doesn't work. - */ -#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS 0x2 - -/* - * This quirk needs to be enabled if the host controller has - * auto-hibernate capability but it's FASTAUTO only. - */ -#define UFSHCD_QUIRK_HIBERN_FASTAUTO 0x4 + enum ufshcd_quirks quirks; /* Virtual memory reference */ struct utp_transfer_cmd_desc *ucdl;